JPH07321411A - Semiconductor device provided with v-groove structure - Google Patents

Abstract

PURPOSE:To easily obtain a quantum wire of good quality and to enhance the efficiency of a semiconductor device by a method wherein a groove whose cross section is V-shaped is formed in at least a part of a semiconductor substrate or of an epitaxial growht layer grown on the semiconductor substrate and an active layer is formed in the part of the bottom of the V-shaped groove. CONSTITUTION:A semiconductor device has a structure wherein an Al0.5Ga0.5As clad layer epitaxially grown on a GaAs (100) substrate is formed, a V-groove is formed in the clad layer, a GaAs active layer is formed and a second Al0.5Ga0.5As clad layer is formed additionally on the active layer. Then, the clad layer as the outside layer which comes into contact with the inside of a V-shaped structure on the slope of the V-groove has a relationship that the energy gap of the clad layer at the outside is larger than the energy gap of the clad layer at the inside. When such a structure is adoped, a current can be concentrated in the GaAs active layer situated at the bottom of the V-groove, and the structure can be used especially suitably for a laser diode or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, preferably a semiconductor device using the quantum effect.

[0002]

2. Description of the Related Art A semiconductor device having a quantum microstructure such as a quantum well, a quantum wire, and a quantum box is particularly preferably used as a semiconductor light emitting device, and has a low threshold current due to a quantization effect of electrons and holes. Excellent characteristics are obtained in high modulation band, high coherence characteristics, and the like.

As a method of forming a quantum wire, a quantum well structure is formed and then a fine photolithography method by electron beam exposure or the like and vertical etching by an ion beam are used in combination to form a wire.
A method of forming a V-shaped groove on the substrate shown in FIG. 4 and then growing a double hetero structure on the entire surface of the substrate having a groove having a V-shaped cross section (hereinafter referred to as “V groove”) is performed. There is.

[0004]

However, in the former method, the side wall of the groove is largely damaged by the processing, and the quality of the fine wire tends to be inferior. On the other hand, in the latter, the quantum wire can be selectively formed by utilizing the orientation dependence of the growth rate, but the bottom of the formed V groove is rounded depending on the composition of the portion where the V groove is to be formed. In some cases, during wet etching, an oxide film is formed on the etching surface during wet etching, it is contaminated with impurities, or the bottom of the V groove is rounded due to etching.

Therefore, there is a demand for a structure capable of easily obtaining a high quality quantum wire. In addition, improving the efficiency of semiconductor devices is also a current issue.

[0006]

The inventors of the present invention, as a result of intensive research, have found that such a problem can be solved by a specific structure, and have reached the present invention. That is, an object of the present invention is to provide a semiconductor device having a high-quality quantum wire, and an object thereof is to form a V-shaped cross section in at least a part of a semiconductor substrate or an epitaxial growth layer grown on the semiconductor substrate. A semiconductor device having a groove, wherein an active layer is provided at a bottom portion of the V-shaped groove, more preferably the semiconductor device having a structure in which the active layer is sandwiched by clad layers, The active layer has the semiconductor device having a quantum well structure, the inner and outer clad layers of the V-shaped structure that are in contact with each other at the slope of the V-shaped groove, and the energy gap of the outer clad layer is The semiconductor device having a structure that is larger than the energy gap of the inner clad layer, the semiconductor device in which the slope of the V-shaped groove is a {111} B plane, and the semiconductor device is V-shaped. The groove is easily achieved by the semiconductor device or the like formed by vapor phase etching.

The present invention will be described in detail below. The structure of the semiconductor device of the present invention is III-V compound semiconductor, II-VI.
It can be suitably used for group compound semiconductors and the like. The structure of the present invention is preferably used as an electronic element utilizing the conduction of carriers in the active region, and particularly preferably used as a light emitting semiconductor device.

The structure of the semiconductor device of the present invention will be described with reference to the explanatory view of the device of FIG. 1 grown on the III-V group (100) plane GaAs substrate prepared in the embodiment. (10
The (0) plane is used because the symmetry and straightness of the V-groove affect the symmetry and straightness of the quantum well. A substrate in any direction can be used as long as the symmetry and straightness of the quantum well are not affected. Of course, the same can be said for the off-angle direction. The V groove of the present invention is
It is provided on a substrate or an epitaxial layer grown on the substrate. The direction of the V groove is 10 ° from the <110> direction.
The following is preferable, and 5 ° or less is more preferable. 10
If it deviates from the <110> direction by more than °, the state of the side surface of the V groove is likely to be jagged and is not so preferable.

The active layer is provided at the bottom of the V groove. When the quantum well structure is used as the active layer, the thickness of the active layer is 20 nm for use as quantum wires.
The following is preferable, but it can be used up to about 50 nm. With respect to the composition and conductivity type of the active layer, any of those usually used can be used, and there is no particular limitation. In the present invention, since the active layer is provided on the bottom of the V-groove, it is possible to make a finer quantum wire.

In a preferred embodiment of the present invention, a clad layer epitaxially grown on the substrate is provided and V
A groove is provided to provide an active layer, and a second layer is formed on the active layer.
This is a structure in which a clad layer is provided. One of preferred structures of the present invention is that the inner and outer clad layers of the V-shaped structure which are in contact with each other at the slope of the V groove, the energy gap of the outer clad layer, and the energy gap of the inner clad layer. It has a larger relationship, and by adopting such a structure, the current can be concentrated in the active layer at the bottom of the V groove, so that it is particularly preferably used for a laser diode or the like.

The slope of the V groove is preferably the {111} B plane. The {111} B plane is III-V.
If it is a group compound semiconductor, only the group V has a surface {11
If the compound semiconductor is a II-VI group compound semiconductor, only the group VI becomes a {111} plane. This is because crystal growth generally does not easily occur on the {111} B plane, and it is easy to start growth from the bottom of the V groove.

The V groove of the present invention is preferably formed by vapor phase etching. This is because when the V groove is formed by wet etching as in the conventional case, the bottom of the V groove tends to have a rounded shape, and when impurities remain on the etching surface or an oxide film is formed on the etching surface, This is because it is difficult to obtain a high quality active layer even if the active layer is provided in contact with each other.

Needless to say, the V-groove may have a structure having no length in the longitudinal direction, such as an inverted pyramid shape. As an example of a preferred method of manufacturing the structure of the present invention, first, a layer to be the first cladding layer is epitaxially grown on the substrate. The growth method used at this time is preferably a metal organic chemical vapor deposition method (MOCVD method). A stripe-shaped silicon nitride film is formed on the surface of the epitaxial wafer by using a patterning process such as a photolithography method. At this time, the stripe direction of the silicon nitride film is preferably the <110> direction. After that, by introducing an etching gas into the reactor for metal organic chemical vapor deposition (MOCVD) method, in-situ gas etching of the first cladding layer is performed using the silicon nitride film as a mask, and the tip is sharply pointed. Forming a V-groove,
The quantum wires and the second cladding layer are continuously grown in the V groove without exposing the substrate to the air as it is. At this time, HCl is a suitable etching gas.
Further, when this method is used, impurities are not left on the etching surface or an oxide film is not formed, so that a high-quality active layer can be obtained even if the active layer is directly grown on the etching surface. .

Hereinafter, the present invention will be described in more detail with reference to examples, but the present invention is not limited to the examples as long as the gist thereof is not exceeded. (Example 1) First, on a (100) GaAs substrate, M
GaAs layer (0.5 μm), Al _{0.5 by} OCVD method
Ga _0.5 As (2 μm) and a GaAs layer (20 nm) were formed in this order. A silicon nitride film was formed on the surface of this epitaxial substrate by the PCVD method, and a silicon nitride film having a width of 1 μm extending in the [011] direction was masked by photolithography so as to be arranged at intervals of 1 μm. The masked sample was set again in the MOCVD apparatus. After setting, the temperature is raised to 700 ° C. in an arsine (AsH ₃ ) atmosphere, and then etching is performed using HCl gas.
V-grooves having {111} B planes on both side surfaces were formed. Immediately after stopping the etching, while maintaining the temperature at 700 ° C., trimethylgallium (TMG) was supplied to form a 4 nm GaAs active layer in the V groove, and trimethylaluminum (TMA) was also supplied together with TMG. 1
A μm Al _0.5 Ga _0.5 As clad layer was formed, and arsine and TMG were supplied again to form a 0.1 μm GaAs layer. An explanation of this manufacturing process is shown in FIG. At this time, since epitaxial growth is difficult on the {111} B plane, no growth occurs on the sidewall of the V groove, and as a result, a GaAs quantum wire is formed in the bottom of the V groove in a self-aligned manner. Also, during the growth, by supplying HCl at about 1 sccm, which is about the same mol as the Group III raw material, precipitation of AlGaAs polycrystals on the silicon nitride layer was prevented. The method of supplying HCl during the growth is suitably used especially when the aluminum composition of the GaAlAs layer is 0.4 or more,
Then, it becomes possible to selectively grow AlGaAs having a high aluminum composition, which is effective in confining carriers in the active layer.

The sample thus grown was observed by SEM. This state is schematically shown in FIG. The under-etching phenomenon in which the etching spreads under the silicon nitride mask did not occur, and the V-groove had a sharp V-groove at the tip. A GaAs thin wire having a width of 20 μm was embedded only in the bottom of the V groove. PL (photoluminescence) of this sample
When light emission was examined, light emission from the quantum wire was remarkably observed at both 77K and room temperature (300K). Of these, the data at room temperature are shown in FIG. These results show that we could easily obtain high quality quantum wires with little damage.

Example 2 A sample similar to that of Example 1 was prepared except that the composition of the buried cladding layer was changed to Al _0.3 Ga _0.7 As, and the emission intensity was examined. As a result, the emission intensity was clearly increased. Was given. It is considered that this is because the carriers in the V-grooves cannot get out of the V-grooves and concentrate in the active layer at the bottom of the V-grooves because the side walls of the V-grooves have energy barriers. Such an effect is considered to be advantageous when manufacturing a laser device or the like.

[0017]

According to the present invention, a high-quality quantum wire is
It can be easily obtained, and the efficiency of the semiconductor device can be improved.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing one mode created in Example 1 of the present invention.

FIG. 2 is an explanatory diagram of a manufacturing process used in Example 1 of the present invention.

FIG. 3 is a diagram showing a state of PL light emission at room temperature of the sample prepared in Example 1 of the present invention.

FIG. 4 is an explanatory diagram showing a typical example of a device using a conventional quantum wire.

Claims (6)

[Claims] 1. A semiconductor substrate or an epitaxial growth layer grown on a semiconductor substrate has a groove having a V-shaped cross section at least in part, and an active layer is provided at a bottom portion of the V-shaped groove. A semiconductor device characterized by: 2. The semiconductor device according to claim 1, wherein the active layer has a structure sandwiched by clad layers. 3. The semiconductor device according to claim 1, wherein the active layer has a quantum well structure. 4. An inner and outer clad layer having a V-shaped structure that is in contact with the slope of the V-shaped groove, wherein the energy gap of the outer clad layer is greater than the energy gap of the inner clad layer. The semiconductor device according to claim 1, wherein the semiconductor device has an enlarged structure. 5. The semiconductor device according to claim 1, wherein the slope of the V-shaped groove is a {111} B plane. 6. The semiconductor device according to claim 1, wherein the V-shaped groove is formed by vapor phase etching.