JPH0730524A - Receiver - Google Patents

Abstract

PURPOSE:To prevent production of mis-correction and to attain high quality transmission while keeping a transmission efficiency by executing error correction decoding processing when an output of a reception quality detection circuit is excellent and stopping the processing when the output is deteriorated. CONSTITUTION:A received signal is demodulated by a reception demodulator 2 and a code discrimination device 3 makes code discrimination into binary data and the result is inputted to a signal processing unit 8. Furthermore, the reception signal is inputted to a reception level detector 6, sampled by an A/D converter 7 and inputted to the processing unit 8. The processing unit 8 compares a reception level sampling value with respect to the error correction word in the reception this time with a threshold level and executes error correction decoding processing to the word when the sampled value is larger than the threshold level, and does not execute the processing when smaller. Furthermore, the processing unit 8 stores the word subject to error correction decoding by the reception this time to a memory and outputs reception data to an output terminal 5 when all words forming a signal are subject to error correction decoding.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention is used in mobile radio communications. In particular, it relates to a decoding error rate improving technique for a receiver that performs error correction decoding. INDUSTRIAL APPLICABILITY The present invention is suitable for use in the message decoding of a receiver for radio calling.

[0002]

2. Description of the Related Art A conventional example will be described with reference to FIGS. FIG. 9 is a block diagram of a conventional device. FIG. 10 is a diagram showing a multiple reception process and an error correction decoding process up to twice reception in the signal processor of the conventional example. In a radio selective calling method using a radio calling receiver generally called a pager, individually provided call codes and subsequent messages are repeatedly transmitted from the base station, and the radio calling receiver uses its own call code. This call code and the subsequent message are received in correspondence with the reception timing.

In FIG. 9, the signal received from the antenna 1 is demodulated by the reception demodulator 2 and is further code-judged by the code judging device 3 as binary data of "0" or "1". The signal processor 8 performs reception processing and error correction decoding processing on the binary data a plurality of times, and outputs the processed data to the output terminal 5 as reception data.

FIG. 10 shows an example of multiple reception processing and error correction decoding processing up to twice reception in the signal processor 8. In this example, the signal consists of four words A, B, C and D, which are regarded as one symbol. Let the first received word be represented by A ₁ , B ₁ , C ₁ , D ₁ . In addition, the error correction decoding result of each word received is “×” if the error correction decoding is not possible, “○” if the error correction decoding is not included after the error correction decoding, and error is included after the error correction decoding (hereinafter, Is referred to as an erroneous correction) by the symbol "△". FIG. 10A shows the reception quality and the result of error correction decoding in the first reception received at time t ₀ . A drop in the curve of the reception quality indicates that the reception quality is poor. The reception quality is poor near word C ₁ . At this time, in the error correction decoding result of each word,
It is assumed that a word that does not include an error after decoding is word A ₁ , a word that cannot be decoded is word B ₁ , and a word that causes erroneous correction is words C ₁ and D ₁ . In this case, the words A ₁ , C ₁ , and D ₁ that have been error-corrected and decoded do not need to be received next time, so they are stored in the memory in the signal processor 8, and only the word B is received and an error occurs thereafter. If corrective decoding is performed and error correction decoding of this word B is possible, it is combined with the words A ₁ , C ₁ and D ₁ already stored in the memory, and even if the maximum number of times of reception is not reached, the output terminal 5 It operates to output more received data.

FIG. 10B shows the reception quality and the error correction decoding result of the signal at time t ₀ + T. Here, T is a reception cycle. At time t ₀ + T, as shown in FIG. 10B, only the word B that cannot be decoded at time t ₀ is the target of error correction, and three of A, C, and D are non-targets of error correction. Becomes Assuming that the transmission quality at the time of receiving the word B ₂ is good and no error is included after decoding, the time t ₀ +
At T, all words A in one signal,
This means that the error correction decoding of B, C and D has been completed.

[0006] in FIG. 10 (c), shows the error-correction decoded result at time t _0, a material obtained by synthesizing the results at time t ₀ + T. At this time, the signal processor 8 performs error correction decoding with the signal composed of the words A ₁ , B ₂ , C ₁ , and D ₁ which are the synthesis result, and outputs the received data to the output terminal 5.

[0007]

However, as shown in this example, since the words C ₁ and D ₁ contain an error due to an erroneous correction, the signal cannot be correctly received. As in the example shown in FIG. 10, when error correction decoding is performed in an environment with poor reception quality, the probability of erroneous correction increases. In order to suppress erroneous correction, there is a method of increasing the inter-code distance by increasing the number of check bits forming the error correcting code. However, in this method, the ratio of information bits is lower than the total number of bits, so that the transmission efficiency becomes poor.

The present invention has been made against such a background, and an object thereof is to provide a receiver capable of performing high quality transmission while preventing occurrence of erroneous correction and maintaining transmission efficiency. .

[0009]

According to the present invention, a receiving demodulator for receiving and demodulating a plurality of words including an error correction code and repeatedly transmitted, and a demodulation output of the receiving demodulator are converted into binary data. The receiver is provided with a code determiner, a signal processor that performs error correction decoding processing and reception processing a plurality of times on this binary data, and an output terminal that outputs the data of this signal processor as received data.

Here, a feature of the present invention is that a set of the plurality of words transmitted at each transmission timing is used as a symbol and the reception quality is determined at each reception timing of one or more of the symbols. A reception quality detection circuit is provided, and the signal processor is provided with means for performing error correction decoding processing when the output of the reception quality detection circuit is good, and for stopping the error correction decoding processing when the output is poor. Where it is.

The reception quality detection circuit preferably includes means for comparing a sampled value of the received signal level or an absolute value of the demodulated signal sampled value with a predetermined threshold value.

The receiver may be provided with a time diversity reception processing means. Further, a plurality of receivers may be provided, and the space diversity reception processing means may be provided.

[0013]

[Function] The reception quality is determined for each symbol reception timing or for each of a plurality of consecutive symbol reception timings,
If the reception quality is good, the error correction decoding process is performed, but if the reception quality is poor, the error correction decoding process is not performed. As this reception quality, the sampled value of the received signal level or the absolute value of the demodulated signal sampled value is used by being compared with a predetermined threshold value.

As a result, erroneous corrections can be prevented from occurring while maintaining transmission efficiency, and high quality transmission can be performed. Further, by using time or space diversity reception together, higher quality transmission can be realized.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of a first embodiment device of the present invention.

According to the present invention, a reception demodulator 2 which receives a plurality of words including an error correction code and which is repeatedly transmitted through an antenna 1 and demodulates it, and a demodulation output of the reception demodulator 2 is converted into binary data. A receiver including a code determiner 3, a signal processor 8 that performs error correction decoding processing and reception processing a plurality of times on this binary data, and an output terminal 5 that outputs the data of this signal processor 8 as received data. Is.

Here, a feature of the present invention is that a set of the plurality of words transmitted at each transmission timing is used as a symbol and the reception quality is determined at each reception timing of one or more of the symbols. A reception quality detection circuit 9 is provided, and the signal processor 8 performs means for performing error correction decoding processing when the output of the reception quality detection circuit 9 is good, and suspends error correction decoding processing when the output is poor. It's in the place of preparation.

Next, the operation of the first embodiment of the present invention will be described with reference to FIGS. FIG. 2 is a diagram showing the multiple reception process up to the second reception and the error correction decoding process in the signal processor 8. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 1, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and subjected to code determination by the code determination unit 3 into binary data, and then input to the signal processor 8. The received signal is also input to the reception level detector 6, sampled by the AD converter 7, and then input to the signal processor 8. The signal processor 8 compares the reception level sample value for the error correction target word in this reception with a certain threshold value, and when this sample value is larger than this threshold value, performs the error correction decoding process for this word. If this sample value is smaller than this threshold value, error correction decoding processing is not performed. Furthermore, this signal processor 8
The words that have been error-correction-decoded by this reception are stored in a memory, and if all the words that compose a certain signal can be error-correction-decoded, they are output to the output terminal 5 as received data.

As shown in FIG. 2, in the first embodiment of the present invention, a signal consists of four words A, B, C and D, which are regarded as one symbol. Let the first received word be denoted A ₁ , B ₁ , C ₁ , D ₁ , respectively. In addition, the error correction decoding result of each word received is indicated by a symbol of “×” for those that cannot be error-corrected and decoded, “○” for those that do not contain errors after error-correction decoding, and “△” for those that have been erroneously corrected. Represent FIG. 2A shows the reception quality and the result of error correction decoding in the first reception received at time t ₀ . A drop in the curve of the reception quality indicates that the reception quality is poor. Reception quality has become a poor around word C _1, sample values of the received level of the word B _1, C ₁ and D ₁ are, and did not meet the threshold. Then, the error correction decoding process is not performed on the words B ₁ , C ₁ and D ₁ , but the error correction decoding process is performed on the word A ₁ .
As a result, since A ₁ has a good reception quality, error correction decoding can be performed. In this case, the word A ₁ which has been subjected to error correction decoding is stored in the memory in the signal processor 8 since it does not need to be received next time, and thereafter, the words B 1, C and D are received and the error correction decoding is performed. , This word B,
When the error correction decoding of C and D is completed, it is combined with the word A ₁ already stored in the memory, and the received data is output from the output terminal 5 even if the maximum number of times of reception is not reached.

FIG. 2B shows the reception quality and the error correction decoding result of the signal at time t ₀ + T. Here, T is a reception cycle. At time t ₀ + T, as shown in FIG. 2B, words B, C and D are the target of error correction, and A
Are not subject to error correction. Words B ₂ , C ₂ and D
₂ , the transmission quality at the time of reception is good, and the sampled value of the reception level sufficiently satisfies this threshold value, and the word B ₂ ,
Perform error correction decoding of C ₂ and D ₂ . Since the reception quality is good, as a result of the decoding, the words B ₂ and C without error are included.
₂ and D ₂ error correction decoding is possible.

[0022] FIG. 2 (c), represents the error-correction decoded result at time t _0, a material obtained by synthesizing the results at time t ₀ + T. At this time, as a result of the combination of the times t ₀ and t ₀ + T, all the words in one signal are A ₁ ,
It is composed of B ₂ , C ₂ and D ₂ . The signal processor 8 performs error correction decoding on this signal and outputs the received data to the output terminal 5. In the case of the first embodiment of the present invention, the transmitted signal can be correctly received.

As described above, by receiving the signal a plurality of times and using the reception quality at the time of reception, no decoding process is performed on the word with the poor reception quality, and the transmission quality is good from the next time onward. By receiving and performing error correction decoding processing, the occurrence of erroneous correction is prevented, and even higher quality transmission is possible with the conventional wireless transmission method.

It is also possible to adopt a configuration in which the above-mentioned processing performed for each symbol is performed for each of a plurality of consecutive symbols. In this case, the sampling interval of the reception level sample values can be set longer than in the case of processing for each symbol, so that the power consumption can be reduced.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 3 is a block diagram of a second embodiment device of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 3, the signal received from the antenna 1 is demodulated by the reception demodulator 2, and the sign judgment unit 3 judges the sign of binary data, and then is input to the signal processor 8. The demodulated signal output from the reception demodulator 2 is sampled by the AD converter 7 and then input to the signal processor 8. The signal processor 8 compares the absolute value of the demodulated signal sample value for the error correction target word in the current reception with a certain threshold value, and if this absolute value is greater than the threshold value, performs the error correction decoding process on this word. To do.
If this absolute value is smaller than the threshold value, error correction decoding processing is not performed. Further, the signal processor 8 stores the words that have been error-correction-decoded by the current reception in the memory, and outputs the received data to the output terminal 5 as the reception data when all the words forming a signal can be error-correction-decoded. To do. Details of the operation of the signal processor 8 are the same as those described in the first embodiment of the present invention. Further, in the second embodiment of the present invention, the circuit is simple and the power consumption is low as compared with the first embodiment of the present invention because the reception level detector 6 is unnecessary.

It is also possible to process the above-described processing for each symbol for each of a plurality of consecutive symbols. In this case, the sampling interval of the reception level sample values can be set longer than in the case of processing for each symbol, so that the power consumption can be further reduced.

Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 4 is a block diagram of the apparatus of the third embodiment of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof is omitted.

In FIG. 4, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and input to the time diversity (hereinafter referred to as TD) reception processing device 10. Further, the reception level detector 6 detects the reception level at each reception timing of one symbol or more and inputs it to the TD reception processing device 10. In the TD reception processing device 10, after sampling the output and the reception level of the reception demodulator 2,
The reception level sample value received this time and the reception level sample value received up to the previous time are compared for each symbol or more, and the output sample value and the reception level sample value of the reception demodulator 2 corresponding to the higher reception level are determined. TD processing for selection is performed, and the sampled output and reception level of the reception demodulator 2 after selection are input to the signal processor 8. The TD reception processing device 10 converts the demodulation output into binary data by the code decision unit 3 in the first and second embodiments of the present invention. This signal processor 8 performs the same operation as that described in the first embodiment of the present invention, and outputs it as output data to the output terminal 5.
Further, in the third embodiment of the present invention, compared to the first embodiment of the present invention, by using the time diversity reception, further excellent and high quality transmission becomes possible.

Next, a fourth embodiment of the present invention will be described with reference to FIG. FIG. 5 is a block diagram of the device of the fourth embodiment of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 5, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and input to the TD reception processing device 10. Further, the AD converter 7 detects the reception level at each reception timing of one symbol or more and inputs it to the TD reception processing device 10. TD reception processing device 1
At 0, after sampling the output and the reception level of the reception demodulator 2, the reception level sample value received this time and the reception level sample value received up to the previous time are compared every one symbol or more, and the reception level is high. The TD process for selecting the output sample value and the reception level sample value of the reception demodulator 2 corresponding to the one is performed, and the selected output and reception level sample value of the reception demodulator 2 is input to the signal processor 8. The signal processor 8 performs the same operation as that described in the second embodiment of the present invention, and outputs it to the output terminal 5 as received data. Further, in the fourth embodiment of the present invention, by using the time diversity reception as compared with the second embodiment of the present invention, further excellent and high quality transmission becomes possible.

Next, a fifth embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram of the device of the fifth embodiment of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 6, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and input to the TD reception processing device 10. In the TD reception processing device 10, after sampling the output of the reception demodulator 2, the sample value of the output of the reception demodulator 2 received this time and the sample value of the output of the reception demodulator 2 received up to the previous time are set to 1 TD processing is performed by synthesizing each symbol. This is the method shown as the second embodiment in Japanese Patent Application No. 5-117216 filed by the applicant of the present application. The sampled value of the output of the reception demodulator 2 after this synthesis is input to the signal processor 8. The signal processor 8 performs the same operation as that described in the second embodiment of the present invention, and outputs the received data to the output terminal 5.

Japanese Patent Application No. 5-117216 is an invention regarding time diversity. In the present invention, the signal processor 8 performs error correction decoding processing when the demodulation output is good, and when the demodulation output is good, an error occurs. The correction decoding process is stopped to eliminate erroneous correction.

Further, in the fifth embodiment of the present invention, by using the time diversity reception as compared with the second embodiment of the present invention, further excellent and high quality transmission becomes possible.

Next, a sixth embodiment of the present invention will be described with reference to FIG. FIG. 7 is a block diagram of the device of the sixth embodiment of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 7, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and input to the space diversity (hereinafter referred to as SD) reception processing device 14. Further, the reception level detector 6 detects the reception level at each reception timing of one symbol or more and inputs it to the SD reception processing device 14. On the other hand, the signal received by the antenna 11 whose correlation is sufficiently far from the antenna 1 is demodulated by the reception demodulator 12 and input to the SD reception processing device 14. Further, the reception level detector 13 detects the reception level at each reception timing of one symbol or more, and outputs it as S
Input to the D reception processing device 14. SD reception processing device 14
Then, after sampling the respective reception demodulators 2 and 12 and the reception level, the respective reception level sample values are compared for each symbol or more, and the output of the reception demodulator 2 or 12 corresponding to the higher reception level. Select the sample value and the reception level sample value. SD reception processing is performed, and the output of the reception demodulator 2 or 12 and the sampled value of the reception level after this selection are input to the signal processor 8. The TD reception processing device 10 converts the demodulation output into binary data by the code decision unit 3 in the first and second embodiments of the present invention. This signal processor 8 performs the same operation as that described in the first embodiment of the present invention, and outputs it as output data to the output terminal 5.
Further, in the sixth embodiment of the present invention, by using the space diversity reception as compared with the first embodiment of the present invention, further excellent and high quality transmission becomes possible.

Next, a seventh embodiment of the present invention will be described with reference to FIG. FIG. 8 is a block configuration diagram of the seventh embodiment device of the present invention. Since the transmitting side transmits the same signal a plurality of times as in the conventional case, the description thereof will be omitted.

In FIG. 8, the signal received by the antenna 1 is demodulated by the reception demodulator 2 and input to the SD reception processing device 14. Further, the AD converter 7 detects the reception level at each reception timing of one symbol or more and inputs it to the SD reception processing device 14. On the other hand, the signal received by the antenna 11 whose correlation is sufficiently far from the antenna 1 is demodulated by the reception demodulator 12 and input to the SD reception processing device 14. Further, the AD converter 15 detects the reception level at each reception timing of 1 symbol or more and inputs it to the SD reception processing device 14. In the SD reception processing device 14, after sampling the output and the reception level of each reception demodulator 2, the respective reception level sample values are compared for each symbol or more, and the reception demodulator corresponding to the higher reception level. After sampling the output sample value and the reception level of 2, the respective reception level sample values are compared for each symbol or more, and the output sample value and the reception level sample value of the reception demodulator 2 corresponding to the higher reception level. Select. The SD reception processing is performed, and the output of the reception demodulator 2 after this selection and the sampled value of the reception level are input to the signal processor 8. The signal processor 8 performs the same operation as that described in the second embodiment of the present invention, and outputs it to the output terminal 5 as received data. Further, in the seventh embodiment of the present invention, by using the space diversity reception as compared with the second embodiment of the present invention, further excellent and high quality transmission becomes possible.

In the third to seventh embodiments of the present invention, the receiver which performs the TD or SD reception process is described as an example, but the same is applied to the receiver which performs the frequency diversity, the polarization diversity and the angle diversity. You can

[0041]

As described above, according to the present invention,
Occurrence of erroneous correction can be prevented and high quality transmission can be performed.
Furthermore, if a method such as increasing the number of check bits forming the error correction code and increasing the inter-code distance is used, the ratio of information bits becomes lower than the total number of bits, but the transmission efficiency deteriorates. According to the method, it is possible to prevent erroneous correction while maintaining the transmission efficiency and perform high quality transmission.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of an apparatus according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a multiple reception process up to twice reception and an error correction decoding process in a signal processor.

FIG. 3 is a block configuration diagram of a second embodiment device of the present invention.

FIG. 4 is a block configuration diagram of a third embodiment device of the present invention.

FIG. 5 is a block configuration diagram of an apparatus according to a fourth embodiment of the present invention.

FIG. 6 is a block configuration diagram of a fifth embodiment device of the present invention.

FIG. 7 is a block configuration diagram of an apparatus according to a sixth embodiment of the present invention.

FIG. 8 is a block configuration diagram of a seventh embodiment device of the present invention.

FIG. 9 is a block diagram of a conventional device.

FIG. 10 is a diagram showing a multiple reception process up to twice reception and an error correction decoding process in the signal processor of the conventional example.

[Explanation of Codes] 1, 11 Antenna 2, 12 Reception demodulator 3 Code judgment device 5 Output terminal 6, 13 Reception level detector 7, 15 AD converter 8 Signal processor 9, 16 Reception quality detection circuit 10 TD reception processing Device 14 SD reception processing device

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Claims (5)

[Claims] 1. A reception demodulator for receiving and demodulating a plurality of words including an error correction code and repeatedly transmitted, a code decision device for converting a demodulation output of the reception demodulator into binary data, and the binary value. Transmitted at each transmission timing in a receiver equipped with a signal processor that performs error correction decoding processing and multiple reception processing on data, and an output terminal that outputs the data of this signal processing as received data A set of the plurality of words is used as a symbol, and a reception quality detection circuit that determines reception quality at each reception timing of one or more of the symbols is provided, and the signal processor has a good output from the reception quality detection circuit. A receiver comprising means for performing an error correction decoding process in a case, and stopping the error correction decoding process in a poor case. 2. The receiver according to claim 1, wherein the reception quality detection circuit includes means for comparing a sampled value of the reception signal level with a predetermined threshold value. 3. The receiver according to claim 1, wherein the reception quality detection circuit includes means for comparing the absolute value of the demodulated signal sample value with a predetermined threshold value. 4. The receiver according to claim 1, further comprising time diversity reception processing means. 5. The receiver according to claim 1, wherein a plurality of receivers are provided and the space diversity reception processing means is provided.