JPH07297228A - Method for connecting boards with each other - Google Patents
Method for connecting boards with each otherInfo
- Publication number
- JPH07297228A JPH07297228A JP6107552A JP10755294A JPH07297228A JP H07297228 A JPH07297228 A JP H07297228A JP 6107552 A JP6107552 A JP 6107552A JP 10755294 A JP10755294 A JP 10755294A JP H07297228 A JPH07297228 A JP H07297228A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- circuit board
- conductive
- conductive particles
- electrode pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 38
- 239000002245 particle Substances 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims description 32
- 239000002313 adhesive film Substances 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 abstract description 47
- 239000007767 bonding agent Substances 0.000 abstract 7
- 239000000853 adhesive Substances 0.000 description 20
- 230000001070 adhesive effect Effects 0.000 description 20
- 238000010586 diagram Methods 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 239000003522 acrylic cement Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、例えば半導体チップを
回路基板へフェイスダウンボンディングする際に使用し
て好適な基板（電極基板）の接続方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate (electrode substrate) connection method suitable for use in face-down bonding of a semiconductor chip to a circuit board, for example.
【０００２】[0002]
【従来の技術】半導体チップと回路基板をフェイスダウ
ンで接続する方法としては金属バンプ、異方性導電フィ
ルム（ＡＣＦ）、導電性粒子などを媒体としたものが多
く用いられている。なかでも球状のプラスチックに貴金
属などをメッキ、コーティングした導電性粒子を使用し
た接続方法は、バンプを形成する必要がないので、半導
体チップを製造していないメーカ等から多く報告されて
いる。2. Description of the Related Art As a method for connecting a semiconductor chip and a circuit board face down, a method using a metal bump, an anisotropic conductive film (ACF), conductive particles or the like as a medium is often used. In particular, the connection method using conductive particles obtained by plating and coating a noble metal or the like on a spherical plastic does not require the formation of bumps, and therefore, many reports have been made by manufacturers who do not manufacture semiconductor chips.
【０００３】図５は、従来の回路基板と半導体チップと
の接続状態を示す図である。従来の導電性粒子を用いた
半導体チップの接続方法は、例えば同図において、回路
基板６の電極パッド７に、絶縁性接着剤８により導電性
粒子４を接着し、半導体チップ１を圧着し、半導体チッ
プ１の電極パット２と回路基板６の電極パッド７とを導
電性粒子４を介して電気的に接続するとともに、半導体
チップ１と回路基板６との間に樹脂９を充填、硬化収縮
させて半導体チップ１と回路基板６とを機械的に接続す
るものである。FIG. 5 is a diagram showing a connection state between a conventional circuit board and a semiconductor chip. A conventional method of connecting semiconductor chips using conductive particles is, for example, in the same figure, the conductive particles 4 are bonded to the electrode pads 7 of the circuit board 6 with an insulating adhesive 8 and the semiconductor chip 1 is pressure bonded, The electrode pad 2 of the semiconductor chip 1 and the electrode pad 7 of the circuit board 6 are electrically connected through the conductive particles 4, and the resin 9 is filled between the semiconductor chip 1 and the circuit board 6 to cure and shrink. The semiconductor chip 1 and the circuit board 6 are mechanically connected together.
【０００４】[0004]
【発明が解決しようとする課題】ところで、上記のよう
な従来の導電性粒子を用いた半導体チップの接続方法に
おいては、導電性粒子４の径のばらつきや、半導体チッ
プ１の圧着後の浮き上がり等により、半導体チップ１と
回路基板６との接続状態が不安定となり、高抵抗または
導通不良になるなどの問題点があった。By the way, in the conventional semiconductor chip connecting method using the conductive particles as described above, the diameter of the conductive particles 4 is dispersed, and the semiconductor chip 1 is lifted after pressure bonding. As a result, the connection state between the semiconductor chip 1 and the circuit board 6 becomes unstable, and there is a problem that high resistance or poor conduction occurs.
【０００５】そこで、本発明は以上の問題点を解決し
て、信頼性の高い安定した機械的及び電気的接続を行う
基板の接続方法を提供するものである。Therefore, the present invention solves the above problems and provides a method for connecting substrates, which is capable of reliable and stable mechanical and electrical connection.
【０００６】[0006]
【課題を解決するための手段】本発明は、上記課題を解
決するために、電極を有する第一の基板と、電極を有す
る第二の基板との接続方法において、前記第一の基板の
電極上に導電性粒子を配置し、前記導電性粒子上、また
は前記第二の基板の電極上に導電性接着剤膜を形成し、
前記第一及び第二の基板とを圧着して、前記第一及び第
二の基板の電極が、前記導電性粒子及び前記導電性接着
剤膜を介して電気的な接続が得られた状態で前記導電性
接着剤膜を硬化させて、前記第一及び第二の基板とを接
続することを特徴とする基板の接続方法を提供するもの
である。In order to solve the above problems, the present invention provides a method for connecting a first substrate having an electrode and a second substrate having an electrode, wherein the electrode of the first substrate is Placing conductive particles on top, forming a conductive adhesive film on the conductive particles, or on the electrode of the second substrate,
In a state where the first and second substrates are pressure-bonded and the electrodes of the first and second substrates are electrically connected through the conductive particles and the conductive adhesive film. A method for connecting substrates, characterized in that the conductive adhesive film is cured to connect the first and second substrates.
【０００７】[0007]
【実施例】本発明の基板の接続方法の実施例として、半
導体チップ（第一または第二の基板）と回路基板（第二
または第一の基板）との接続方法について以下図面と共
に詳細に説明する。図１は本発明の第一の実施例である
回路基板と半導体チップとの接続方法を示す工程図であ
る。同図において、まず半導体チップ１（第一の基板）
の電極パッド２上に接着剤３（導電性または絶縁性のど
ちらでもよい）を転写法または印刷法などにより塗布し
た後、導電性粒子４を分散させ、電極パッド２上に配置
（接着）させる。例えば導電性粒子４は落下、振動など
の手段で、半導体チップ１の電極パッド２形成面全面に
分散させた後、エアーブロ、はけ、粘着性シートなどで
余分な導電性粒子４を除去し、接着剤３が形成された箇
所にだけ導電性粒子４を配置させる。さらにこの導電性
粒子４上に導電性接着剤膜５を転写法または印刷法など
により形成（塗布）する（同図（ａ））。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the board connecting method of the present invention, a method of connecting a semiconductor chip (first or second board) and a circuit board (second or first board) will be described in detail below with reference to the drawings. To do. FIG. 1 is a process diagram showing a method for connecting a circuit board and a semiconductor chip, which is a first embodiment of the present invention. In the figure, first, the semiconductor chip 1 (first substrate)
After the adhesive 3 (which may be conductive or insulative) is applied to the electrode pad 2 by the transfer method or the printing method, the conductive particles 4 are dispersed and placed (bonded) on the electrode pad 2. . For example, the conductive particles 4 are dispersed on the entire surface of the semiconductor chip 1 on which the electrode pads 2 are formed by dropping, vibrating, or the like, and then the excess conductive particles 4 are removed with an air blower, a brush, or an adhesive sheet. The conductive particles 4 are arranged only at the places where the adhesive 3 is formed. Further, a conductive adhesive film 5 is formed (applied) on the conductive particles 4 by a transfer method, a printing method, or the like ((a) in the same figure).
【０００８】次に、電極パッド２と回路基板６（第二の
基板）に形成された電極パッド７とを電気的に接続すべ
く、半導体チップ１を上方から加圧する。そして、電極
パッド２と電極パッド７とが導電性粒子４及び導電性接
着剤膜５により電気的に接続された状態で、接着剤３及
び導電性接着剤膜５を硬化させ、電極パッド２と電極パ
ッド７とを電気的に接続させるとともに、半導体チップ
１と回路基板６とを接着剤３及び導電性接着剤膜５によ
り機械的に接続（固着）させる（同図（ｂ））。Next, in order to electrically connect the electrode pad 2 and the electrode pad 7 formed on the circuit board 6 (second substrate), the semiconductor chip 1 is pressed from above. Then, in a state where the electrode pad 2 and the electrode pad 7 are electrically connected by the conductive particles 4 and the conductive adhesive film 5, the adhesive 3 and the conductive adhesive film 5 are cured, and the electrode pad 2 and The electrode pad 7 is electrically connected, and the semiconductor chip 1 and the circuit board 6 are mechanically connected (fixed) by the adhesive 3 and the conductive adhesive film 5 (FIG. 2B).
【０００９】次に、本発明の他の実施例について説明す
る。なお、接着剤３、導電性粒子４及び導電性接着剤膜
５を形成する方法等は、上述した第一の実施例と同様で
あるのでその説明は省略する。図２は本発明の第二の実
施例である回路基板と半導体チップとの接続方法を示す
工程図であり、上述の第一の実施例とは、接着剤３、導
電性粒子４及び導電性接着剤膜５を回路基板６側に形成
した点が異なる。同図において、導電性粒子４を回路基
板６（第一の基板）の電極パッド７上に接着剤３により
配置し、この導電性粒子４上に導電性接着剤膜５を形成
し（同図（ａ））、半導体チップ１（第二の基板）を上
方から加圧し、回路基板の電極パッド７と半導体チップ
１の電極パッド２とを電気的に接続させるとともに、回
路基板６と半導体チップ１とを接着剤３及び導電性接着
剤膜５を硬化させることにより固着させる（同図
（ｂ））。Next, another embodiment of the present invention will be described. The method of forming the adhesive 3, the conductive particles 4, and the conductive adhesive film 5 and the like are the same as those in the above-described first embodiment, and therefore the description thereof is omitted. FIG. 2 is a process diagram showing a method for connecting a circuit board and a semiconductor chip, which is a second embodiment of the present invention. The above-mentioned first embodiment is different from the adhesive 3, the conductive particles 4, and the conductive material. The difference is that the adhesive film 5 is formed on the circuit board 6 side. In the figure, the conductive particles 4 are arranged on the electrode pads 7 of the circuit board 6 (first substrate) with the adhesive 3, and the conductive adhesive film 5 is formed on the conductive particles 4 (see FIG. (A)), the semiconductor chip 1 (second substrate) is pressed from above to electrically connect the electrode pads 7 of the circuit board and the electrode pads 2 of the semiconductor chip 1, and the circuit board 6 and the semiconductor chip 1 And are fixed by curing the adhesive 3 and the conductive adhesive film 5 ((b) of the same figure).
【００１０】図３は本発明の第三の実施例である回路基
板と半導体チップとの接続方法を示す工程図であり、上
述の第一の実施例とは、導電性接着剤膜５を回路基板６
側に形成した点が異なる。同図において、導電性粒子４
を半導体チップ１（第一の基板）の電極パッド２上に接
着剤３により配置し、回路基板６（第二の基板）の電極
パッド７上に導電性接着剤膜５を形成し（同図
（ａ））、半導体チップ１を上方から加圧し、回路基板
６の電極パッド７と半導体チップ１の電極パッド２とを
電気的に接続させるとともに、回路基板６と半導体チッ
プ１とを導電性接着剤膜５を硬化させることにより固着
させる（同図（ｂ））。FIG. 3 is a process diagram showing a method for connecting a circuit board and a semiconductor chip, which is a third embodiment of the present invention. The above-mentioned first embodiment is different from the conductive adhesive film 5 in the circuit. Board 6
The difference is that it is formed on the side. In the figure, conductive particles 4
Is placed on the electrode pad 2 of the semiconductor chip 1 (first substrate) with the adhesive 3, and the conductive adhesive film 5 is formed on the electrode pad 7 of the circuit board 6 (second substrate) (see FIG. (A)) The semiconductor chip 1 is pressed from above to electrically connect the electrode pads 7 of the circuit board 6 and the electrode pads 2 of the semiconductor chip 1, and the circuit board 6 and the semiconductor chip 1 are electrically conductively bonded. The agent film 5 is fixed by being hardened (FIG. 11B).
【００１１】図４は本発明の第四の実施例である回路基
板と半導体チップとの接続方法を示す工程図であり、上
述の第一の実施例とは、接着剤３及び導電性粒子４を回
路基板６側に形成し、導電性接着剤膜５を半導体チップ
１の電極パッド２上に形成した点が異なる。同図におい
て、導電性粒子４を回路基板６（第一の基板）の電極パ
ッド７上に接着剤３により配置し、半導体チップ１（第
二の基板）の電極パッド２上に導電性接着剤膜５を形成
し（同図（ａ））、半導体チップ１を上方から加圧し、
回路基板６の電極パッド７と半導体チップ１の電極パッ
ド２とを電気的に接続させるとともに、回路基板６と半
導体チップ７とを導電性接着剤膜５を硬化させることに
より固着させる（同図（ｂ））。FIG. 4 is a process diagram showing a method for connecting a circuit board and a semiconductor chip, which is a fourth embodiment of the present invention. The above-mentioned first embodiment is different from the adhesive 3 and the conductive particles 4 in FIG. Is formed on the circuit board 6 side, and the conductive adhesive film 5 is formed on the electrode pad 2 of the semiconductor chip 1. In the figure, conductive particles 4 are arranged on the electrode pads 7 of the circuit board 6 (first substrate) with the adhesive 3, and conductive particles 4 are arranged on the electrode pads 2 of the semiconductor chip 1 (second substrate). A film 5 is formed ((a) in the figure), the semiconductor chip 1 is pressed from above,
The electrode pad 7 of the circuit board 6 and the electrode pad 2 of the semiconductor chip 1 are electrically connected, and the circuit board 6 and the semiconductor chip 7 are fixed by curing the conductive adhesive film 5 (see the same figure ( b)).
【００１２】なお、導電性粒子４は、プラスチック粒
子、シリカ球または高分子材料からなる樹脂球などにＡ
ｕ，Ｎｉなどの金属をメッキまたはコーティングしたも
のや、金属粒子、導電性シリカ等が使用できる。また、
導電性接着剤膜５としては、Ａｕ，Ａｇ等の導電率の高
い金属単体または前記したような導電性粒子４を、エポ
キシ系またはアクリル系接着剤などの絶縁性接着剤中に
分散させたものである。また、熱硬化性・熱可塑性・光
硬化性の樹脂または接着剤などを適宜使用できる。The conductive particles 4 may be plastic particles, silica spheres, resin spheres made of a polymer material, or the like.
Those plated or coated with a metal such as u or Ni, metal particles, and conductive silica can be used. Also,
As the conductive adhesive film 5, a single metal having a high conductivity such as Au or Ag or the conductive particles 4 described above is dispersed in an insulating adhesive such as an epoxy or acrylic adhesive. Is. Further, a thermosetting / thermoplastic / photocurable resin or adhesive can be appropriately used.
【００１３】また、導電性粒子４を配置する方法は、接
着剤３にあらかじめ導電性粒子４を混ぜておき、これを
転写または印刷してもよい。また、導電性接着剤膜５を
介せば導電性粒子４と電極パッド２または電極パッド７
とが直接接触していなくてもよく、さらに接着剤３とし
て導電性のものを使用すれば、電極パッド２，７と導電
性粒子４とが直接接触していなくても接着剤３、導電性
粒子４及び導電性接着剤膜５により回路基板６と半導体
チップ１との電気的接続が得られる。また、電極パッド
２，７の数が少なく、回路基板６と半導体チップ１との
接続強度不足となる場合等には、回路基板６と半導体チ
ップ１との隙間に、絶縁性接着剤を充填して補強すれば
よい。As a method of disposing the conductive particles 4, the conductive particles 4 may be mixed in advance with the adhesive 3 and transferred or printed. Further, if the conductive adhesive film 5 is interposed, the conductive particles 4 and the electrode pad 2 or the electrode pad 7 can be formed.
Need not be in direct contact with each other, and if a conductive material is used as the adhesive 3, even if the electrode pads 2, 7 and the conductive particles 4 are not in direct contact with each other, the adhesive 3, the conductivity The particles 4 and the conductive adhesive film 5 provide electrical connection between the circuit board 6 and the semiconductor chip 1. When the number of electrode pads 2 and 7 is small and the connection strength between the circuit board 6 and the semiconductor chip 1 becomes insufficient, an insulating adhesive is filled in the gap between the circuit board 6 and the semiconductor chip 1. You can reinforce it.
【００１４】上記のように構成された回路基板６と半導
体チップ１との接続方法によれば、回路基板６と半導体
チップ１とは、導電性粒子４及び導電性接着剤膜５を介
して接続されるので、導電性粒子４の径の違いに影響さ
れることなく、信頼性の高い安定した機械的及び電気的
接続が得られる。According to the method of connecting the circuit board 6 and the semiconductor chip 1 configured as described above, the circuit board 6 and the semiconductor chip 1 are connected via the conductive particles 4 and the conductive adhesive film 5. Therefore, reliable and stable mechanical and electrical connection can be obtained without being affected by the difference in diameter of the conductive particles 4.
【００１５】[0015]
【発明の効果】以上詳述したように、本発明になる基板
の接続方法によれば、第一の基板と第二の基板とは、導
電性粒子及び導電性接着剤膜を介して接続されるので、
信頼性の高い安定した機械的及び電気的接続が可能とな
る。As described in detail above, according to the substrate connecting method of the present invention, the first substrate and the second substrate are connected via the conductive particles and the conductive adhesive film. So
It enables reliable and stable mechanical and electrical connection.
【図１】本発明の第一の実施例である回路基板と半導体
チップとの接続方法を示す工程図である。FIG. 1 is a process diagram showing a method of connecting a circuit board and a semiconductor chip that is a first embodiment of the present invention.
【図２】本発明の第二の実施例である回路基板と半導体
チップとの接続方法を示す工程図である。FIG. 2 is a process drawing showing a method for connecting a circuit board and a semiconductor chip that is a second embodiment of the present invention.
【図３】本発明の第三の実施例である回路基板と半導体
チップとの接続方法を示す工程図である。FIG. 3 is a process drawing showing a method of connecting a circuit board and a semiconductor chip, which is a third embodiment of the present invention.
【図４】本発明の第四の実施例である回路基板と半導体
チップとの接続方法を示す工程図である。FIG. 4 is a process drawing showing a method of connecting a circuit board and a semiconductor chip, which is a fourth embodiment of the present invention.
【図５】従来の回路基板と半導体チップとの接続状態を
示す図である。FIG. 5 is a diagram showing a connection state between a conventional circuit board and a semiconductor chip.
１ 半導体チップ（第一または第二の基板） ２ 電極パッド（電極） ３ 接着剤 ４ 導電性粒子 ５ 導電性接着剤膜 ６ 回路基板（第二または第一の基板） ７ 電極パッド（電極） 1 Semiconductor Chip (First or Second Substrate) 2 Electrode Pad (Electrode) 3 Adhesive 4 Conductive Particles 5 Conductive Adhesive Film 6 Circuit Board (Second or First Substrate) 7 Electrode Pad (Electrode)
───────────────────────────────────────────────────── フロントページの続き (72)発明者 富永 信也 神奈川県横浜市神奈川区守屋町３丁目12番 地 日本ビクター株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinya Tominaga 3-12 Moriya-cho, Kanagawa-ku, Yokohama, Kanagawa Japan Victor Company of Japan, Ltd.
Claims (1)
第二の基板との接続方法において、 前記第一の基板の電極上に導電性粒子を配置し、 前記導電性粒子上、または前記第二の基板の電極上に導
電性接着剤膜を形成し、 前記第一及び第二の基板とを圧着して、前記第一及び第
二の基板の電極が、前記導電性粒子及び前記導電性接着
剤膜を介して電気的な接続が得られた状態で前記導電性
接着剤膜を硬化させて、前記第一及び第二の基板とを接
続することを特徴とする基板の接続方法。1. A method for connecting a first substrate having an electrode and a second substrate having an electrode, in which conductive particles are arranged on the electrodes of the first substrate, or on the conductive particles, or A conductive adhesive film is formed on the electrodes of the second substrate, the first and second substrates are pressure-bonded, and the electrodes of the first and second substrates are the conductive particles and the A method of connecting substrates, characterized in that the conductive adhesive film is cured in a state where electrical connection is obtained through the conductive adhesive film, and the first and second substrates are connected. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6107552A JPH07297228A (en) | 1994-04-22 | 1994-04-22 | Method for connecting boards with each other |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6107552A JPH07297228A (en) | 1994-04-22 | 1994-04-22 | Method for connecting boards with each other |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07297228A true JPH07297228A (en) | 1995-11-10 |
Family
ID=14462084
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6107552A Pending JPH07297228A (en) | 1994-04-22 | 1994-04-22 | Method for connecting boards with each other |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07297228A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100342513C (en) * | 2001-02-19 | 2007-10-10 | 索尼化学&信息部件株式会社 | Bumpless semiconductor device |
-
1994
- 1994-04-22 JP JP6107552A patent/JPH07297228A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100342513C (en) * | 2001-02-19 | 2007-10-10 | 索尼化学&信息部件株式会社 | Bumpless semiconductor device |
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