JPH07273292A - Semiconductor integrated circuit - Google Patents

Abstract

(57) [Summary] [Objective] An inductor having a large inductance value and a small series resistance value is formed in a small area portion on a semiconductor substrate. [Structure] Metal wiring 4 is formed above a semiconductor substrate 1. Oxide films 3 and 5 containing iron are arranged directly below, below, on the left side, on the right side and above the metal wiring 4. Therefore,
Since the induced electromotive force increases when a current is applied to the metal wiring 4, the inductance value can be increased as compared with the case where the oxide films 3 and 5 are not provided. Moreover, since the total length of the metal wiring 4 can be limited to be short, the resistance value of the metal wiring 4 can be reduced and the metal wiring 4 can be formed in a small area portion on the semiconductor substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a semiconductor integrated circuit in which an inductor or an AC transformer using the inductor is integrated on a semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, the development of high-frequency communication equipment represented by the spread of mobile communication equipment has been remarkable.
In these devices, a frequency of 800 MHz or higher is used. In a semiconductor device used at such a frequency, in order to reduce parasitic capacitance and inductance and improve the characteristics, capacitors and inductors used in high frequency circuits are used. Is being actively integrated with a transistor on a semiconductor substrate. In this semiconductor integrated circuit, the inductor is generally formed by patterning a metal wiring in a spiral shape or an S shape.

A conventional semiconductor integrated circuit in which an inductor is integrated on a semiconductor substrate will be described below.

FIG. 9 is a block diagram of a conventional semiconductor integrated circuit, FIG. 9A is a plan view thereof, and FIG. 9B is a sectional view taken along line IX-IX of FIG. In the figure, 1 is a semiconductor substrate, 2 is an insulating film formed on a part of the semiconductor substrate 1, and 4 is a metal wiring formed on the insulating film 2 in a non-linear shape.

FIG. 10 is another configuration diagram of a conventional semiconductor integrated circuit. FIG. 10A is a plan view thereof, and FIG.
It is an X-ray sectional view. In the figure, 1 is a semiconductor substrate, 1
Reference numeral 8 is a lower insulating film formed on the semiconductor substrate 1, 19
Is an upper layer insulating film formed on the lower layer insulating film 18, 7 is a lower layer metal wiring formed below the upper layer insulating film 19,
Reference numeral 8 is an upper metal wiring formed above the upper insulating film 19. An opening 20 is formed in the upper insulating film 19 above the end of the lower metal wiring 7, and an end of the upper metal wiring 8 extends downward through the opening 20.
The lower layer metal wiring 7 and the upper layer metal wiring 8 are electrically connected to each other.

[0006]

However, in the structure of the semiconductor integrated circuit as described above, since the value of the inductance is determined by the length of the metal wiring, an integrated circuit requiring a large inductance value is realized. Has
It becomes necessary to increase the length of metal wiring, and as a result, the series resistance value of the inductor increases and energy loss increases, and the area occupied by the metal wiring in the integrated circuit increases and the chip area increases. There was a limit to improving performance.

The present invention has been made in view of the above technical problems, and an object thereof is to integrate a inductor having a large inductance value and a small series resistance value in a small area portion to provide a semiconductor integrated circuit having a small chip area and high performance. It is to be realized.

[0008]

In order to solve the above-mentioned problems, in a semiconductor integrated circuit of the present invention, an oxide film containing a substance having a large magnetic permeability, that is, iron, is arranged around a metal wiring. As a structure in which the oxide film and the metal wiring are in direct contact with each other without interposing another film, the magnetic flux density is increased when a current is passed through the metal wiring.

That is, in the semiconductor integrated circuit according to the first aspect of the present invention, an insulating film formed on at least a part of a semiconductor substrate, a metal wiring formed on the insulating film, and an upper portion of the metal wiring, An iron-containing oxide film formed on at least one or all of the lower side, the left side, and the right side, and the metal wiring is formed in a polygonal line or a curved shape, and the iron-containing oxide film is formed. Shall be in direct contact with each other.

Further, in the semiconductor integrated circuit according to the present invention, an insulating film formed on at least a part of the semiconductor substrate, an oxide film containing iron, and an oxide film formed above and below the oxide film. Composed of upper and lower metal wiring,
The upper and lower metal wirings are in direct contact with the iron-containing oxide film, and the upper metal wiring and the lower metal wiring are electrically connected to one another, and the metal wiring connected to this one Is formed in the shape of a polygonal line or a curved line.

Further, in the semiconductor integrated circuit according to the invention of claim 3, an insulating film formed on at least a part of the semiconductor substrate, an oxide film containing iron, and formed above and below the oxide film. Each consisting of a plurality of upper layer metal wirings and lower layer metal wirings, the upper layer and lower layer metal wirings and the iron-containing oxide film are in direct contact with each other, and the upper layer metal wirings and the lower layer metal wirings Are electrically connected to each other so as to form a coil.

In addition, in the semiconductor integrated circuit according to the present invention, the insulating film formed on at least a part of the semiconductor substrate, the oxide film containing iron, and the upper and lower parts of the oxide film. A plurality of upper-layer metal wirings and a lower-layer metal wiring formed in each, the upper-layer and lower-layer metal wiring and the iron-containing oxide film are in direct contact, the upper-layer metal wiring and the lower-layer metal wiring The wiring is electrically connected to form one coil so as to form a plurality of coils insulated from each other.
The configuration is used as an AC transformer.

According to a fifth aspect of the present invention, in the semiconductor integrated circuit according to the first, second, third or fourth aspect, the semiconductor substrate has a semi-insulating property. The metal wiring forms a part of the load of the active element formed on the semiconductor substrate or the input / output impedance matching circuit at a frequency higher than the VHF band.

[0014]

With the above structure, in the semiconductor integrated circuit according to the first, second, third, fourth and fifth inventions, the oxide film containing iron is in direct contact with the metal wiring. Since it is arranged around it, the induced electromotive force is large when a current is passed through the metal wiring, and the inductance value is larger than that when the oxide film is not provided. Moreover, since a large inductance value can be secured while limiting the length of the metal wiring relatively short, the resistance value of the metal wiring forming the inductance becomes small. Therefore, it is possible to realize a semiconductor integrated circuit having a small chip area, a large inductance value, and a high-performance inductor or AC transformer having a small series resistance value.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a constitutional view showing a semiconductor integrated circuit in a first embodiment of the present invention, FIG. 1A is a plan view thereof, and FIG. 1B is a sectional view taken along the line I--I of FIG. . In the figure, 1 is a semiconductor substrate, 2 is an insulating film formed on at least a part of the semiconductor substrate 1, 3 is an oxide film containing iron formed on the insulating film 3, and 4 is an oxide film. The metal wiring is formed on the material film 3 in a non-linear shape.

Therefore, in this embodiment, since the oxide film 3 containing iron is arranged below the metal wiring 4, the oxide film 4 is arranged, so that the total length of the metal wiring 4 is relatively short. While limiting, the induced electromotive force when a current is passed through the metal wiring 4 increases, the inductance value increases, and a large inductance can be secured while limiting the total length of the metal wiring 4 to a relatively short length. The resistance value of the wiring 4 can be reduced.

FIG. 2 is a constitutional view showing a semiconductor integrated circuit in a second embodiment of the present invention, FIG. 2A is a plan view thereof, and FIG. 2B is a sectional view taken along the line II--II of FIG. . In the figure, the metal wiring 4 is formed above the insulating film 2 in a non-straight shape, and the oxide film 3 containing iron is formed above the metal wiring 4, on the left side and on the right side, respectively. is there. Since the other structure is the same as that of the first embodiment, the same reference numerals are given to the same portions and the description thereof will be omitted.

FIG. 3 is a constitutional view showing a semiconductor integrated circuit according to a third embodiment of the present invention. FIG. 3A is a plan view thereof and FIG. 3B is a sectional view taken along the line III-III of FIG. . In the figure, in addition to the structure of the second embodiment, an oxide film 5 containing iron is further formed above the insulating film 2, and a metal wiring 4 is formed above the oxide film 5. As a result, the lower oxide film 5 located below the metal wiring 4 and the upper oxide film 3 covering the upper side, the left side, and the right side of the metal wiring 4.
And surround the metal wiring 4 on all sides.

FIG. 4 is a constitutional view showing a semiconductor integrated circuit according to a fourth embodiment of the present invention. FIG. 4A is a plan view thereof and FIG. 4B is a sectional view taken along line IV-IV of FIG. . In the figure, an oxide film 3 containing iron is formed above the insulating film 2, a lower metal wiring 7 is formed below the oxide film 3, and an upper metal wiring is formed above the oxide film 3. 8 is formed, an opening 20 is formed in the oxide film 3 at an end position of the lower layer metal wiring 7, and an end section of the upper layer metal wiring 8 is extended downward through the opening 20. The wiring 7 and the upper metal wiring 8 are electrically connected to each other.

FIG. 5 is a constitutional view showing a semiconductor integrated circuit according to a fifth embodiment of the present invention. FIG. 5A is a plan view thereof and FIG. 5B is a sectional view taken along line V--V of FIG. . In the figure, an oxide film 3 containing iron is formed above the insulating film 2, and a lower metal wiring 7 and an upper metal wiring 8 are formed below and above the oxide film 3, respectively. The lower layer metal wiring 7 is divided into four portions which are not electrically connected and is formed longer than the vertical width of the oxide film 3 in the figure. On the other hand, the upper-layer metal wiring 8 is also divided into four portions which are not electrically connected, and each of these portions is electrically connected to both ends of the lower-layer metal wiring 7 of the four portions so as to straddle the oxide film 3. Are connected to one, and have a coil shape that goes around the outer periphery of the oxide film 3.

FIG. 6 is a constitutional view showing a semiconductor integrated circuit according to a sixth embodiment of the present invention. FIG. 6A is a plan view thereof and FIG. 6B is a sectional view taken along line VI-VI of FIG. . In the figure, a portion different from FIG. 5 is that the length of the lower layer metal wiring 7 divided into four portions is shorter than the vertical width of the oxide film 3 in the figure. The openings 20 are formed in the oxide film 3, and the lower layer metal wiring 7 and the upper layer metal wiring 8 are electrically connected through the openings 20.

As described above, as shown in the above six embodiments,
Since an oxide film containing iron is arranged around the metal wiring that is electrically connected to each other and the metal wiring and the oxide film are in direct contact with each other, compared with the case where the oxide film is not provided. The induced electromotive force increases when a current is applied to the metal wiring, and the inductance value increases. Moreover, since the inductance value can be increased while limiting the total length of the metal wiring to a short length, the resistance value of the metal wiring can be limited to a small value. As a result, an inductor having a large inductance value and a small series resistance value can be formed in a small area portion on the semiconductor substrate.

Although the metal wiring 4 is S-shaped in the first, second and third embodiments, it goes without saying that it can be formed in any shape other than the straight line shape. Further, in the fourth embodiment, the upper metal wiring 8 has a spiral shape, but it goes without saying that it can be applied to any other shape. Further, in the fifth and sixth embodiments, the lower layer metal wirings 7 are arranged in parallel at equal intervals, but they can be arranged in any shape as long as they do not intersect on the same plane.

FIG. 7 is a constitutional view showing a semiconductor integrated circuit according to a seventh embodiment of the present invention. FIG. 7A is a plan view thereof and FIG. 7B is a sectional view taken along line VII-VII of FIG. 7A. In the figure, two sets of almost the same configuration as in FIG. 5 are provided, and the lower layer metal wiring 7 and the upper layer metal wiring 8 are electrically connected to each other, and both of them are mutually connected. It has a wiring set that is galvanically insulated. The oxide 3 containing iron is formed in a shape having an opening 21 in the central portion, and is commonly used in the two-system connection set.

Therefore, according to the seventh embodiment,
An AC transformer having a large inductance value and a small series resistance value can be formed on a semiconductor substrate in a small space.

Although the iron-containing oxide film 3 is formed to have the opening 21 in the seventh embodiment, it is commonly used by two or more metal wiring groups forming an AC transformer. As long as it is applied, it can be applied to any shape. Further, in the seventh embodiment, the AC transformer is formed by using two sets shown in FIG. 5, but in addition, the AC transformer may be formed by using two sets shown in FIG. Needless to say.

FIG. 8 is a circuit diagram showing a semiconductor integrated circuit according to the eighth embodiment of the present invention. The figure shows a configuration in which an impedance matching circuit is provided in the input portion and the output portion of the grounded-source amplifier circuit of the field-effect transistor used at frequencies higher than the VHF band. Each element shown in the figure is integrated on a semi-insulating semiconductor substrate. In the figure, 9 is a field effect transistor,
Reference numeral 10 is an input side transformer, and 11 is an output side transformer.
Further, 12 is a resistor for applying a DC bias to the source of the field effect transistor 9, 13 is a bypass capacitor connected in parallel with the resistor 12 for passing an AC signal, 1
Reference numeral 4 is an input terminal, and 15 is an output terminal. Further, 16 is a gate bias terminal of the field effect transistor 9, and 17
Is a drain bias terminal of the field effect transistor 9, and a DC bias is applied to the gate and drain of the field effect transistor 9 from these terminals 16 and 17, respectively.

Here, as the input side transformer 10 and the output side transformer 11, the AC transformer in the seventh embodiment is used.

Therefore, in the present embodiment, when the field-effect transistor is used in the source grounded circuit in the amplifier circuit, the input impedance is usually higher than the output impedance, so that in the case where multi-stage amplification is performed, If the output is applied to the next stage as it is, the gain is lowered due to impedance mismatch, but according to the circuit configuration of this embodiment shown in FIG. 8, the impedance conversion is performed by the AC transformers 10 and 11 inserted before and after the field effect transistor 9. Therefore, the impedances of the input and output become equal, and the effect of preventing a decrease in gain is obtained.

In the eighth embodiment, the input / output impedance matching circuit integrated by using the configuration of FIG. 7 of the seventh embodiment as the AC transformers 10 and 11 on the input side and the output side, respectively. In addition, by using the inductors or AC transformers of the respective configurations of FIGS. 1, 2, 3, 4, 5, 6, and 7, the load of the active element at a frequency higher than the VHF band is configured. Needless to say, an input / output impedance matching circuit may be configured.
Further, in the eighth embodiment, it is needless to say that the field effect transistor can be similarly applied even if it is a bipolar transistor.

[0032]

As described above, according to the semiconductor integrated circuit of the present invention, the oxide containing iron is arranged in direct contact with the periphery of the metal wiring, so that a large inductance value and a small inductance value can be obtained. Since an inductor and an AC transformer having a series resistance value can be formed in a small area portion on a semiconductor substrate and can be integrated with a transistor and a capacitor, compared to a case where the oxide film containing iron is not used, the chip The effect is that the area can be reduced, the energy loss can be suppressed to be small, the parasitic capacitance and the inductance can be reduced, and the characteristics of the high frequency circuit can be improved.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing a semiconductor integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram showing a semiconductor integrated circuit according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram showing a semiconductor integrated circuit according to a third embodiment of the present invention.

FIG. 4 is a configuration diagram showing a semiconductor integrated circuit according to a fourth embodiment of the present invention.

FIG. 5 is a configuration diagram showing a semiconductor integrated circuit according to a fifth embodiment of the present invention.

FIG. 6 is a configuration diagram showing a semiconductor integrated circuit according to a sixth embodiment of the present invention.

FIG. 7 is a configuration diagram showing a semiconductor integrated circuit according to a seventh embodiment of the present invention.

FIG. 8 is a configuration diagram showing a semiconductor integrated circuit according to an eighth embodiment of the present invention.

FIG. 9 is a configuration diagram showing a conventional semiconductor integrated circuit.

FIG. 10 is a configuration diagram showing another conventional semiconductor integrated circuit.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Insulating Film 3 Oxide Film Containing Iron 4 Metal Wiring 5 Metal Wiring 5 Oxide Film Containing Iron in Lower Layer 6 Metal Wiring Oxide Film Containing Iron in Upper Layer 7 Lower Metal Wiring 8 Upper Metal Wiring 9 Field Effect Transistor 10 Input side transformer 11 Output side transformer 12 Resistance 13 Capacitor 14 Input terminal 15 Output terminal 16 Gate bias terminal 17 Drain bias terminal 18 Lower layer insulating film 19 Upper layer insulating film 20, 21 Opening

Claims (5)

[Claims] 1. An insulating film formed on at least a part of a semiconductor substrate, and metal wiring formed on the insulating film,
An oxide film containing iron formed on at least one or all of the upper, lower, left and right sides of the metal wiring, wherein the metal wiring is formed into a polygonal line or a curved shape. A semiconductor integrated circuit, which is in direct contact with an oxide film containing 2. An insulating film formed on at least a part of a semiconductor substrate, an oxide film containing iron, and upper and lower metal wirings formed above and below the oxide film, The upper and lower metal wirings are in direct contact with the iron-containing oxide film, and the upper metal wiring and the lower metal wiring are electrically connected to one another, and the metal wiring connected to this one Is formed in a polygonal line or a curved shape. 3. An insulating film formed on at least a part of a semiconductor substrate, an oxide film containing iron, and a plurality of upper metal wirings and lower layers formed above and below the oxide film, respectively. The upper and lower metal wirings are in direct contact with the iron-containing oxide film, and the upper metal wiring and the lower metal wiring are electrically connected to form a coil. A semiconductor integrated circuit which is connected to a book. 4. An insulating film formed on at least a part of a semiconductor substrate, an iron-containing oxide film, and a plurality of upper metal wirings formed above and below the oxide film, respectively. A plurality of coils each composed of a lower metal wiring, wherein the upper and lower metal wirings are in direct contact with the iron-containing oxide film, and the upper metal wiring and the lower metal wiring are mutually insulated. A semiconductor integrated circuit, which is electrically connected to form one and is used as an AC transformer. 5. The semiconductor substrate has a semi-insulating property, and the metal wiring is formed at a frequency of a VHF band or higher in a part of a load of an active element formed on the semiconductor substrate or an input / output impedance matching circuit. 5. The semiconductor integrated circuit according to claim 1, claim 2, claim 3, or claim 4.