JPH07271323A - Liquid crystal display - Google Patents

Abstract

(57) [Summary] [Objective] To provide a liquid crystal display device with low power consumption and good usability. [Structure] The input interface is provided with a mode setting terminal such as a sleep mode or a standby mode, and when a control signal supplied from the terminal is activated, the display operation is stopped and a substantial DC voltage is not applied to the liquid crystal. The drive circuit or the drive voltage generation circuit is controlled. [Effect] The host system has a simple configuration in which the control signal is also supplied to the mode setting terminal provided in the liquid crystal display device when the host system is set to the sleep mode or the like. No need to change the program or to provide a switch function in the power supply section, it is easy to use and the life of the liquid crystal can be extended.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a technique effective when used in a data processing device such as a personal computer.

[0002]

2. Description of the Related Art Liquid crystal display devices are widely used as display devices for portable personal computers. TFT
Regarding an active matrix type color liquid crystal display device having (thin film transistor) mounted therein, there are, for example, “Nikkei Electronics” page 211, Nikkei McGraw-Hill Company, September 10, 1984.

[0003]

The liquid crystal display device is provided with a DC-DC converter as a power source for driving a liquid crystal drive voltage and a backlight, and does not have an independent power source for the host system. Upon receiving the DC voltage, the DC-DC comparator generates various voltages. On the other hand, a notebook type personal computer or the like has a sleep mode in order to reduce power consumption. That is, when data processing is not performed, clock pulses of most circuits except some circuits such as a timer circuit are stopped to reduce the operating current. At this time, the host system is in a power supply state in order to continue the operation of some of the circuits. As a result, in the liquid crystal display device, an abnormal state occurs in which display data and clocks are stopped from the host side while display operation is possible, and normal display operation cannot be guaranteed, and a DC voltage is applied to the liquid crystal. As a result, there is a problem that the service life is remarkably reduced.

When the host system is set to the sleep mode (or the standby mode) in compliance with the specifications of the liquid crystal display device as described above, a clock or a dummy signal is supplied so that a DC voltage is not applied to the liquid crystal. If the supply of the power supply voltage itself is stopped, the above problems can be avoided. However, it is necessary to provide the host system with a function of supplying the clock or the dummy signal as described above or cutting off the power supplied to the display device, which makes the host system complicated and There is a problem in that the usability is poor, because the configuration must be changed between the one using the liquid crystal display device and the one using the other display device.

An object of the present invention is to provide a liquid crystal display device which has low power consumption and is easy to use. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0006]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows. That is, when a mode setting terminal such as a sleep mode or a standby mode is provided in the input interface and the control signal supplied from the mode setting terminal is activated, the display operation is stopped and a substantial DC voltage is not applied to the liquid crystal. The drive circuit or the drive voltage generation circuit is controlled.

[0007]

According to the above means, the host system has a simple structure in which the control signal is also supplied to the mode setting terminal provided in the liquid crystal display device when the host system is set to the sleep mode or the like. It is possible to prevent abnormal operation of the device and prolong the life of the liquid crystal.

[0008]

2 is a schematic block diagram of a computer using a liquid crystal display device according to the present invention. In the figure, the liquid crystal display device is used as a display terminal of a personal computer (abbreviated as a personal computer in the figure).

The personal computer is not particularly limited, but is portable such as a notebook type personal computer and can be operated by a battery. In the figure, the system itself is omitted because it is not directly related to the present invention, but its outline is as follows.

In the personal computer of this embodiment, a central processing unit (CPU) is centered on a peripheral device control section, a dynamic RAM (DRAM) as a main memory and its control section, and a static type R as a backup memory.
AM (SRAM) SRAM, backup parity, its control unit, and ROM storing programs are connected to each other by a bus. The peripheral device control unit is connected to an external storage device, a keyboard and the like. A display unit is provided with a control unit for reading out characters, image data, etc. stored in a video RAM (referred to as VRAM),
The liquid crystal display device according to the present invention is used as an output device.

A power supply unit for supplying power is provided in the internal circuit of the computer system. The central processing unit controls the operation timing of each memory by forming a signal for controlling each memory.

The power supply section includes a battery mounted in addition to a power supply circuit for converting a commercial power supply into a direct current. Then, the central processing unit is provided with a sleep function. In other words, when there is no data processing for a certain period of time, the sleep mode is automatically entered, and the clock supply is stopped except for some circuits such as the timer circuit, so that the circuit does not substantially operate. Be put in a state. The sleep mode may be performed in a switch operation or a data processing program, and may be called a standby mode or a low power consumption mode.

In the liquid crystal display device of this embodiment, a sleep mode (SL) input is provided in the input interface section in addition to the clock, data and power supply VCC necessary for the display operation. By connecting a flat cable or the like between the input terminal of the liquid crystal display device and the output terminal of the peripheral control unit of the personal computer, the above-mentioned signals and voltages are supplied.

The sleep mode signal SL is supplied to the display controller, and when the host (personal computer) side enters the sleep mode, the display operation is not simply stopped in response thereto, but a DC-DC converter for forming a liquid crystal drive voltage is also generated. When a sleep mode is entered as described above by applying a signal SL0 to the LCD, the drive voltage supplied to the liquid crystal driver is made equal to the counter electrode (common electrode) so that a DC voltage is not applied to both electrodes of the liquid crystal. Set. Where T
When the selection operation of the scanning line electrodes of the FT panel is stopped, the display voltage written in the liquid crystal pixel equivalently acting as a capacitor is held and the DC voltage is applied. Therefore, although not particularly limited, the scanning line driving circuit is configured to continue the scanning operation for at least one frame period so that the same voltage as the voltage supplied to the counter electrode is supplied from the liquid crystal driver. is there.

The DC-DC converter receives a power supply voltage VCC on the personal computer side and lights up a fluorescent lamp (cold-cathode tube CFL) used as a backlight in addition to the circuit for forming the liquid crystal drive voltage as described above. Including the power supply
When the sleep mode is set, the fluorescent lamp is turned off. In this way, not only the display operation is stopped in consideration of the life of the liquid crystal, but also the power consumption of the liquid crystal display device is reduced.

FIG. 1 is a waveform diagram for explaining an example of the operation of the liquid crystal display device according to the present invention. When the sleep mode setting signal SL is set to the low level active level as described above, the controller detects this and sets the internal signal SLO to the low level. This signal S
Depending on the low level of LO, DC-
In the DC controller, all drive voltages formed for gradation display as described later are set to a fixed potential that is the same potential as the voltage Vcom of the counter electrode.

Inside the controller, the output clock is stopped by the clock control signal formed by the low level of the sleep mode setting signal SL. Also,
The internal data control signal is also set to the low level, the output data transmitted to the liquid crystal driver is also set to the fixed level, and the counter inside the controller is stopped. The output clock is not particularly limited, but the signal SL
Instead of being stopped immediately by O, the scanning line drive circuit is operated for about one frame, and is stopped after waiting until the drive voltage which is the same as that of the counter electrode is written in each pixel.

If the voltage holding time of the pixel equivalently acting as a capacitor is short and the adverse effect on the life of the liquid crystal is slight, the scanning line selection operation may be immediately stopped by the signal SLO. As described above, the sleep mode setting signal SL automatically reduces the power consumption of the liquid crystal display device as well as the host system side, and the battery life can be extended when the battery is driven.

When the sleep mode is released on the host side, the sleep mode setting signal SL is set to the high level. As a result, in the liquid crystal display device, the clock control signal of the controller becomes high level accordingly, and the controller first enters the operating state and the internal counter or the like starts operating. In response to this, the supply of the clock to the liquid crystal driver and the output of the data are restarted, and after the controller enters the normal state, the signal SLO is set to the high level and the operation of the DC-DC converter is validated. The drive voltage is formed and the display operation is started. In this way, even when the display operation is restarted, the voltage or current to various components in the liquid crystal display device is controlled,
The controller can control the procedure for maintaining the rating of each component.

FIG. 3 is a block diagram of an embodiment of the liquid crystal display device according to the present invention. The liquid crystal display panel is large in size and is capable of color multicolor display by using RGB three primary color pixels. Regarding the signal lines of the color liquid crystal panel, odd-numbered ones and even-numbered ones are vertically distributed, the signal line driving circuits DDV1 to DDV10 are provided on the upper side, and the signal line driving circuits DDV11 to DDV20 are provided on the lower side. To be

First-stage signal line drive circuits DDV1 and DDV1
When the data acquisition by the serial input clock pulse CL2 is completed in 1, the low power consumption mode in which nothing is operated but only the acquired data is held is immediately entered. Then, the output signal is set to the low level, the signal line drive circuits DDV2 and DDV12 in the next stage start their respective operations, and the data is taken in by the subsequent clock pulse. In the same manner, when the input data is completely fetched by the signal line drive circuits DDV10 and DDV20 in the final stage, the clock pulse CL1 is generated and the latched data fetched is transferred to the line data latch circuit to be transferred to the next line. Starts capturing the corresponding serial data.

The scan line electrodes are provided by the scan line drive circuits CDV1 to
It is driven by CDV4. This scanning line drive circuit CDV
Each of 1 to CDV4 has a plurality of output terminals and receives a line synchronization signal to sequentially switch the scanning lines to be selected.

An image memory for storing at least one screen of display data is provided in a portion displayed as a controller or a CPU, and a host computer (microcomputer) CPU inputs display data to the image memory. In this embodiment, a CPU (central processing unit)
Represents the host computer.
The controller sequentially reads the data in the image memory in synchronization with the scanning timing of the liquid crystal display panel to generate serial data and control signals. Further, the sleep mode input function as described above is provided, and when the sleep mode is set, as shown in the timing chart of FIG.
The liquid crystal drive power supply circuit as the C-DC converter is controlled to switch the multi-gradation drive voltages V0 to V7 so as to have the same voltage as the voltage Vcom applied to the counter electrode (common electrode). In this way, no DC voltage is applied to the liquid crystal between the counter electrode and the pixel electrode.

The liquid crystal drive power supply circuit outputs the gradation voltages V0 to V7 in the normal operation state. The signal line drive circuits DDV1 to 20 select the grayscale voltage corresponding to the display data and supply the drive voltage to the signal line of the display panel to perform the grayscale display corresponding to the display data.

The operational effects obtained from the above embodiment are as follows. (1) When the input interface is provided with a mode setting terminal such as a sleep mode or a standby mode and a control signal supplied from the terminal is activated, the display operation is stopped and a substantial DC voltage is applied to the liquid crystal. With a simple configuration in which the drive circuit or the drive voltage generation circuit is controlled so that the liquid crystal display device does not operate, it is possible to prevent the abnormal operation of the liquid crystal display device and prolong its life.

(2) In the host system having the sleep mode, a part of the program can be changed or the power supply unit can be switched by simply connecting the sleep mode signal to the input terminal according to the display device to be used. Since there is no need to provide any functions, it is possible to improve the usability for the user.

(3) When the display operation is stopped by the control signal, the clock pulse of the controller is also stopped and the power source of the backlight is also cut off, so that the liquid crystal display device itself can be made to have low power consumption. The effect of being able to be obtained is obtained.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention of the present application is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the liquid crystal display device may not only perform multi-gradation display but also perform only binary display of lighting / non-lighting. Monochrome display may be performed in addition to color display. The liquid crystal display panel may be a TFT active matrix type or a simple matrix type. Even in the simple matrix system, the host side enters the sleep mode while power is being supplied to the display device, and the necessary clocks and control signals are not input, resulting in abnormal operation and consequently AC drive. This is because the operation may not be performed and a DC voltage may be applied to the liquid crystal.

INDUSTRIAL APPLICABILITY The present invention can be widely used as a display device for various computers such as a notebook personal computer, and also as a liquid crystal display device for various electronic devices such as an electronic notebook and an electronic game.

[0030]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, when a mode setting terminal such as a sleep mode or a standby mode is provided in the input interface and the control signal supplied from the mode setting terminal is activated, the display operation is stopped and a substantial DC voltage is not applied to the liquid crystal. The simple configuration of controlling the drive circuit or the drive voltage generation circuit can prevent abnormal operation of the liquid crystal display device and extend its life.

In the host system having the sleep mode, a part of the program is changed or the power supply unit is provided with a switch function only by connecting the sleep mode signal to the input terminal. Since it eliminates the need for anything, it can improve the usability for users.

When the display operation is stopped by the control signal, the clock pulse of the controller is stopped and the power supply of the backlight is also cut off, so that the liquid crystal display device itself can be made to have low power consumption.

[Brief description of drawings]

FIG. 1 is a timing chart showing an example of the operation of a liquid crystal display device according to the present invention.

FIG. 2 is a schematic block diagram showing an embodiment of a computer using the liquid crystal display device according to the present invention.

FIG. 3 is a block diagram showing an embodiment of a liquid crystal display device according to the present invention.

[Explanation of symbols]

CPU ... Host computer, DDV1-DDV20 ...
Signal line drive circuit, CVD1 to CVD4 ... Scan line drive circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yukihiro Sato 3300 Hayano, Mobara-shi, Chiba Hitachi, Ltd. Electronic Device Division

Claims (2)

[Claims] 1. A display circuit is stopped when a control signal supplied from a mode setting terminal is activated, and a drive circuit or a drive voltage generation circuit is controlled so that a substantial DC voltage is not applied to the liquid crystal. A liquid crystal display device having a control function. 2. The liquid crystal display device according to claim 1, wherein when the display operation is stopped by the control signal, the clock pulse is stopped and the power source of the backlight is also cut off.