JPH07249954A - Step attenuator - Google Patents
Step attenuatorInfo
- Publication number
- JPH07249954A JPH07249954A JP3811094A JP3811094A JPH07249954A JP H07249954 A JPH07249954 A JP H07249954A JP 3811094 A JP3811094 A JP 3811094A JP 3811094 A JP3811094 A JP 3811094A JP H07249954 A JPH07249954 A JP H07249954A
- Authority
- JP
- Japan
- Prior art keywords
- attenuator
- switch
- switches
- fet
- step attenuator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000903 blocking effect Effects 0.000 claims description 2
- 238000003780 insertion Methods 0.000 abstract description 5
- 230000037431 insertion Effects 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
Landscapes
- Attenuators (AREA)
- Non-Reversible Transmitting Devices (AREA)
Abstract
(57)【要約】
【目的】 減衰量を希望の値にステップ状に変化させる
ステップ減衰器において、低挿入損失で少回路規模のI
C化向きの高性能なステップ減衰器を提供する。
【構成】 入力信号を通過・遮断させるFETスイッチ
(2,3,4)を入力端子(1)と出力端子(5)の間に設け、
更に前記FETスイッチ(2,3,4)と並列に任意の大き
さの固定減衰器(6,7,8)を設置する。前記構成の回路
を縦続接続し、希望の減衰量が得られるように各FET
スイッチ(9)を選択しオンオフさせる。
【効果】 総スイッチ数と信号通過のスイッチ数が従来
よりも少ない数で構成できるので、より小さなチップ面
積とより少ない挿入損失でステップ減衰器を実現でき、
高性能化とともにIC化の面で有利である。
(57) [Abstract] [Purpose] In a step attenuator that changes the amount of attenuation stepwise to a desired value, I
A high-performance step attenuator suitable for C conversion. [Configuration] FET switch that passes / blocks the input signal
Provide (2,3,4) between the input terminal (1) and the output terminal (5),
Further, fixed attenuators (6, 7, 8) of arbitrary size are installed in parallel with the FET switches (2, 3, 4). FETs are connected in series so that desired attenuation can be obtained.
Select switch (9) to turn it on and off. [Effect] Since the total number of switches and the number of signal passing switches can be configured with a smaller number than before, a step attenuator can be realized with a smaller chip area and less insertion loss.
This is advantageous in terms of high performance and IC.
Description
【0001】[0001]
【産業上の利用分野】本発明は高周波信号レベルを希望
の値に設定するための回路、特に外部から与えられた直
流電圧によりスイッチを開閉し、高周波信号の減衰量を
ステップ状に変化させるステップ減衰器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for setting a high-frequency signal level to a desired value, and in particular, a step of opening and closing a switch by an externally applied DC voltage to change the attenuation amount of the high-frequency signal in steps. Regarding attenuator.
【0002】[0002]
【従来の技術】従来高周波信号をステップ状に減衰させ
るには、予め必要な減衰量を持った固定減衰器を複数個
縦続接続し、スイッチによって希望する減衰器へ信号が
流れるよう切り替える方式が使われていた。2. Description of the Related Art Conventionally, in order to attenuate a high frequency signal in a stepwise manner, a method is used in which a plurality of fixed attenuators having a required attenuation amount are cascaded in advance and a signal is switched to a desired attenuator by a switch. It was being appreciated.
【0003】このようなステップ減衰器は図2に示すよ
うな回路構成がよく知られている。A circuit configuration as shown in FIG. 2 is well known for such a step attenuator.
【0004】[0004]
【発明が解決しようとする課題】3段構成の場合、上記
の従来技術においては、減衰器側への漏洩防止、減衰器
減衰量の設計容易化等の観点から一段あたりのスイッチ
数が4個必要であり、3段構成だと総スイッチ数が12
個と多くなり、また信号が入力端子から出力端子に至る
までの間に6個のスイッチを通る。In the case of a three-stage configuration, in the above-mentioned conventional technique, the number of switches per stage is four in order to prevent leakage to the attenuator side and facilitate design of the attenuation amount of the attenuator. It is necessary, and the total number of switches is 12 in the 3-stage configuration.
The number of switches increases, and a signal passes through 6 switches from the input terminal to the output terminal.
【0005】高周波領域で外部からの制御信号で動作さ
せる形式のスイッチは一般にFETFETが用いられ
る。FETスイッチはオン状態で抵抗成分(オン抵抗)を
持ち、このオン抵抗は入出力インピーダンスとの関係で
挿入損失に影響し、伝搬損失の原因となる。理想的には
0がよい。一般にFETのオン抵抗を減らすにはゲート
幅を大きくすればよいが、その反面FETの占有面積が
大きくなる問題もある。A FET FET is generally used as a switch of a type which is operated by a control signal from the outside in a high frequency region. The FET switch has a resistance component (ON resistance) in the ON state, and this ON resistance affects the insertion loss due to the relationship with the input / output impedance and causes a propagation loss. Ideally, 0 is good. Generally, the gate width may be increased to reduce the on-resistance of the FET, but on the other hand, there is a problem that the occupied area of the FET is increased.
【0006】従って、スイッチの数が多いとFETの数
も多くなり、IC化の際にチップ面積が大きくなるとい
う問題が生じる。また、信号が入力端子から出力端子に
至るまでの間にスイッチが多く、オン抵抗による挿入損
失や温度変化による特性の変化が大きくなるという問題
もある。Therefore, when the number of switches is large, the number of FETs is also large, which causes a problem that the chip area becomes large when integrated into an IC. In addition, there are many switches between the input terminal and the output terminal of the signal, and there is a problem that the insertion loss due to the ON resistance and the change in the characteristics due to the temperature change become large.
【0007】本発明の目的は、スイッチの数を減らし回
路構成を簡略化し、IC化時のチップ面積を低減し、ス
イッチ部を構成するFETのオン抵抗の影響を受けにく
いステップ減衰器を実現することにある。An object of the present invention is to realize a step attenuator in which the number of switches is reduced, the circuit structure is simplified, the chip area when integrated into an IC is reduced, and the ON resistance of the FETs forming the switch section is less likely to be affected. Especially.
【0008】[0008]
【課題を解決するための手段】本発明の上記目的は、入
力信号を通過・遮断させるスイッチを入力端子と出力端
子の間に設け、更に前記スイッチと並列に任意の大きさ
の固定減衰器を設置する。前記構成の回路を縦続接続
し、希望の減衰量が得られるように各スイッチを選択し
オンオフさせることを特徴とするステップ減衰器によっ
て実現される。The above object of the present invention is to provide a switch for passing and blocking an input signal between an input terminal and an output terminal, and further to provide a fixed attenuator of any size in parallel with the switch. Install. This is realized by a step attenuator characterized in that the circuits having the above-mentioned configuration are connected in cascade and each switch is selected and turned on and off so as to obtain a desired attenuation amount.
【0009】[0009]
【作用】本発明の構成を用いた場合、減衰器1段で1レ
ベルの減衰量を得るためにFETスイッチが3個以下
(パイ型抵抗減衰器の場合;3個、T型抵抗減衰器の場
合;2個)、抵抗器が抵抗減衰器(パイ型、T型の場
合):3個とゲート保護用抵抗;3個以下(パイ型抵抗減
衰器の場合;3個、T型抵抗減衰器の場合;2個)の計
6個以下(パイ型抵抗減衰器の場合;6個、T型抵抗減
衰器の場合;5個)であるのに対して、従来型の場合、
同じ1レベルの減衰量を得るためにFETスイッチが4
個、抵抗器が抵抗減衰器(パイ型、T型の場合):3個と
ゲート保護用抵抗;4個の計7個と多い。従って、同じ
サイズのFETスイッチを用いたとするとより小さなチ
ップ面積で、かつ少ない挿入損失でステップ減衰器が構
成できる。更に、信号の通過するスイッチ数も本発明の
方が少なくなるため、インピーダンスの不整合による損
失も低減できる。When the configuration of the present invention is used, the number of FET switches is 3 or less in order to obtain one level of attenuation with one stage of attenuator.
(In case of pie type resistance attenuator: 3 pieces, in case of T type resistance attenuator: 2 pieces), resistor is a resistance attenuator (in case of pie type and T type): 3 pieces and resistance for gate protection; 3 pieces Below (6 in case of pie resistance attenuator; 3 in case of T type resistance attenuator; 2 in total) (6 in case of pie resistance attenuator, 6 in case of T type resistance attenuator; 5) However, in the case of the conventional type,
In order to obtain the same level of attenuation, 4 FET switches
Number of resistors, resistance attenuator (for pie type and T type): 3 and resistance for gate protection; 4 in total, 7 in total. Therefore, if FET switches of the same size are used, a step attenuator can be constructed with a smaller chip area and a smaller insertion loss. Further, since the number of switches through which the signal passes is smaller in the present invention, the loss due to impedance mismatch can be reduced.
【0010】[0010]
【実施例】図1は本発明による第1の実施例のステップ
減衰器回路図である。本発明は任意の数の固定減衰器で
構成できるが、図1では3個の固定減衰器を用いた場合
について説明する。入力端子(1)と出力端子(5)の間に
接続された3個のFETスイッチ(2,3,4)と、そのF
ETスイッチ(2,3,4)と個々に並列接続された固定減
衰器(6,7,8)とFETスイッチ(2,3,4)のゲートに
接続された抵抗(9)、及びFETスイッチ(2,3,4)の
コントロール端子(10,11,12)で構成される。1 is a circuit diagram of a step attenuator according to a first embodiment of the present invention. Although the present invention can be configured with an arbitrary number of fixed attenuators, FIG. 1 illustrates a case where three fixed attenuators are used. Three FET switches (2, 3, 4) connected between the input terminal (1) and the output terminal (5) and their F
Fixed attenuator (6,7,8) individually connected in parallel with ET switch (2,3,4), resistor (9) connected to gate of FET switch (2,3,4), and FET switch It consists of (2,3,4) control terminals (10,11,12).
【0011】ここで固定減衰器(6)の減衰量を4dB、固
定減衰器(7)の減衰量を8dB、固定減衰器(8)の減衰量
を16dBとおき、またFETスイッチ(2,3,4)がオン
状態での入出力インピーダンスが固定減衰器(6,7,8)
のインピーダンスより十分低い場合の、具体的な希望減
衰量を得るための動作について述べる。Here, the attenuation of the fixed attenuator (6) is 4 dB, the attenuation of the fixed attenuator (7) is 8 dB, the attenuation of the fixed attenuator (8) is 16 dB, and the FET switch (2, 3) is used. Input / output impedance is fixed attenuator (6, 7, 8) when (4, 4) is on
The operation for obtaining a specific desired attenuation amount when the impedance is sufficiently lower than the impedance will be described.
【0012】たとえば、希望減衰量が0dBならばFET
スイッチ(2,3,4)をすべてオン状態とし、入力端子
(1)に入った信号はインピーダンスの低いFETスイッ
チ(2,3,4)を通って出力端子(5)に出力される。ま
た、希望減衰量が4dBの場合FETスイッチ(2)をオフ
状態にし他のFETスイッチ(3,4)をオン状態にすれ
ば、入力信号は4dBの固定減衰器(6)を通り、後はFE
Tスイッチ(2,3)を通過し、出力には4dBのみ減衰し
た出力信号が得られる。最大減衰量を得るにはFETス
イッチ(2,3,4)をすべてオフ状態にし、入力信号を
すべての固定減衰器(6,7,8)に通せばよい。上記回路
構成の場合、減衰ステップ4dBで最大減衰量は28dBに
なる。他減衰量は同様にオン状態にするスイッチを組み
合わせることにより得られる。得られるステップ数は使
用するFETスイッチの数(n個)の分だけオン・オフを
行うので最大2のn乗通りである。For example, if the desired attenuation is 0 dB, the FET
Turn on all switches (2, 3, 4) and input terminals
The signal entering (1) is output to the output terminal (5) through the FET switches (2, 3, 4) having a low impedance. If the desired attenuation is 4 dB, turn off the FET switch (2) and turn on the other FET switches (3, 4), and the input signal will pass through the 4 dB fixed attenuator (6) and then FE
After passing through the T switches (2, 3), an output signal attenuated by 4 dB is obtained at the output. To obtain the maximum attenuation, all the FET switches (2, 3, 4) are turned off and the input signal is passed through all the fixed attenuators (6, 7, 8). In the case of the above circuit configuration, the maximum attenuation amount is 28 dB at the attenuation step of 4 dB. Other attenuation amounts are obtained by combining switches that similarly turn on. The number of steps obtained is as many as 2 to the n-th power, because the number of FET switches to be used (n) is turned on and off.
【0013】図3は本発明による第2の実施例のステッ
プ減衰器回路図である。第1の実施例の回路において信
号がFETスイッチ(9)側を流れている時、信号が固定
減衰器(6,7,8)側へ漏洩することにより信号レベルが
変動してしまう。これを低減させ精度を向上させた回路
が図3の第2の実施例である。図3はT型抵抗減衰器を
用いた例である。抵抗器による減衰器の構成はパイ,T,
H,L型等の方法があるが、いずれも一つ以上の抵抗器
を接地しなければならない。この接地する抵抗器(6b,7
b,8b)にFETスイッチ(13,14,15)を直列に接続し、F
ETスイッチ(13,14,15)をオンオフさせることによりT
型抵抗減衰器の回路構成を断接し接地側への漏洩を遮断
する。FIG. 3 is a circuit diagram of a step attenuator circuit according to a second embodiment of the present invention. In the circuit of the first embodiment, when the signal is flowing on the FET switch (9) side, the signal leaks to the fixed attenuator (6, 7, 8) side, and the signal level fluctuates. A circuit in which this is reduced and the accuracy is improved is the second embodiment of FIG. FIG. 3 shows an example using a T-type resistance attenuator. The resistor attenuator consists of pie, T,
There are methods such as H and L types, but in each case one or more resistors must be grounded. This grounding resistor (6b, 7
b, 8b) and FET switch (13, 14, 15) connected in series, and
By turning on / off the ET switch (13, 14, 15), T
-Type resistance attenuator circuit configuration is connected and disconnected to prevent leakage to the ground side.
【0014】図3においてFETスイッチ(2)をオン、
FETスイッチ(13)をオフにすれば信号はFETスイッ
チ(2)を流れ、T型抵抗減衰器は接地がとれなくなりT
型抵抗減衰器を介して接地へ漏れる信号は遮断される。
逆にFETスイッチ(2)をオフ、FETスイッチ(13)を
オンにすれば、信号はT型抵抗減衰器側へ流れる。ここ
でFETスイッチ(13)は抵抗器(6b)の前後どちらに接続
してもよい。また、T型抵抗減衰器側のFETスイッチ
(13)はFETスイッチ(2)よりゲート幅が短くても良い
ことが特徴である。それは、FETスイッチ(13)のオン
抵抗値が大きくても抵抗器(6b)で補正できるからであ
る。In FIG. 3, the FET switch (2) is turned on,
If the FET switch (13) is turned off, the signal flows through the FET switch (2) and the T-type resistance attenuator cannot be grounded.
Signals leaking to ground through the mold resistance attenuator are blocked.
Conversely, if the FET switch (2) is turned off and the FET switch (13) is turned on, the signal flows to the T-type resistance attenuator side. Here, the FET switch (13) may be connected either before or after the resistor (6b). Also, the FET switch on the T-type resistance attenuator side
The feature (13) is that the gate width may be shorter than that of the FET switch (2). This is because even if the ON resistance value of the FET switch (13) is large, it can be corrected by the resistor (6b).
【0015】図4はパイ型抵抗減衰器を用いた例であ
る。図3の第2の実施例と同様に、パイ型抵抗減衰器の
接地している抵抗器(6b,7b,8b)にFETスイッチ(13,1
4,15)を直列に接続する。FETスイッチ(2)をオン、
FETスイッチ(13)をオフにすれば信号はFETスイッ
チ(2)を流れ、逆にFETスイッチ(2)をオフ、FET
スイッチ(13)をオンにすれば信号はパイ型抵抗減衰器側
に流れる。FIG. 4 shows an example using a pie resistance attenuator. Similar to the second embodiment of FIG. 3, the FET switch (13, 1) is connected to the grounded resistors (6b, 7b, 8b) of the pie resistance attenuator.
4,15) are connected in series. Turn on the FET switch (2),
If the FET switch (13) is turned off, the signal flows through the FET switch (2), and conversely, the FET switch (2) is turned off and the FET is turned on.
When the switch (13) is turned on, the signal flows to the pie resistance attenuator side.
【0016】[0016]
【発明の効果】本発明によれば、総スイッチ数と信号の
通過スイッチ数が従来よりも少ない数で構成できるの
で、より小さなチップ面積とより少ない挿入損失でステ
ップ減衰器を実現でき、高性能化とともにIC化の面で
も有利である。According to the present invention, since the total number of switches and the number of signal passing switches can be made smaller than in the conventional case, a step attenuator can be realized with a smaller chip area and a smaller insertion loss, and high performance can be achieved. It is also advantageous from the standpoint of making ICs.
【図1】本発明の実施例1によるステップ減衰器回路
図。FIG. 1 is a circuit diagram of a step attenuator according to a first embodiment of the present invention.
【図2】従来のステップ減衰器の回路図。FIG. 2 is a circuit diagram of a conventional step attenuator.
【図3】本発明の実施例2によるステップ減衰器回路
図。FIG. 3 is a circuit diagram of a step attenuator according to a second embodiment of the present invention.
【図4】本発明の実施例3によるステップ減衰器回路
図。FIG. 4 is a circuit diagram of a step attenuator circuit according to a third embodiment of the present invention.
1…入力端子、2〜4,13〜15…FETスイッチ、5…
出力端子、6〜8…減衰器、9…抵抗器、10〜12,16〜1
8…制御端子。1 ... Input terminal, 2-4, 13-15 ... FET switch, 5 ...
Output terminal, 6-8 ... Attenuator, 9 ... Resistor, 10-12, 16-1
8 ... Control terminal.
Claims (2)
出力用スイッチを入力端子と出力端子の間に設け、前記
スイッチと並列に任意の減衰量をもつ減衰器を設置し、
前記スイッチをオン・オフさせることによりスイッチ側
を通過する信号、または減衰器側を通過する信号の2種
類の信号レベルを得られることを特徴とするステップ減
衰器。1. An input / output switch for passing / blocking an input signal to / from an output terminal is provided between an input terminal and an output terminal, and an attenuator having an arbitrary amount of attenuation is installed in parallel with the switch.
A step attenuator capable of obtaining two kinds of signal levels of a signal passing through the switch side and a signal passing through the attenuator side by turning on / off the switch.
抵抗器で構成される減衰器の接地している抵抗器と直列
に断接用スイッチを設け、入出力用スイッチと断切用ス
イッチを相補的にオン・オフさせることを特徴としたス
テップ減衰器。2. The step attenuator according to claim 1, wherein
A step attenuator characterized in that a connecting / disconnecting switch is provided in series with a grounded resistor of an attenuator composed of resistors, and an input / output switch and a disconnecting switch are turned on / off complementarily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3811094A JPH07249954A (en) | 1994-03-09 | 1994-03-09 | Step attenuator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3811094A JPH07249954A (en) | 1994-03-09 | 1994-03-09 | Step attenuator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07249954A true JPH07249954A (en) | 1995-09-26 |
Family
ID=12516344
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3811094A Pending JPH07249954A (en) | 1994-03-09 | 1994-03-09 | Step attenuator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07249954A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2759203A1 (en) * | 1997-02-05 | 1998-08-07 | Thomson Csf | Microwave frequency octopole constant phase variable attenuator |
JP2005328359A (en) * | 2004-05-14 | 2005-11-24 | Mitsubishi Electric Corp | Variable attenuator |
US7394994B2 (en) | 2002-07-11 | 2008-07-01 | Nxp B.V. | Optical receiver circuit |
CN105144576A (en) * | 2013-03-04 | 2015-12-09 | 爱德万测试公司 | Switchable signal routing circuit |
-
1994
- 1994-03-09 JP JP3811094A patent/JPH07249954A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2759203A1 (en) * | 1997-02-05 | 1998-08-07 | Thomson Csf | Microwave frequency octopole constant phase variable attenuator |
US7394994B2 (en) | 2002-07-11 | 2008-07-01 | Nxp B.V. | Optical receiver circuit |
JP2005328359A (en) * | 2004-05-14 | 2005-11-24 | Mitsubishi Electric Corp | Variable attenuator |
CN105144576A (en) * | 2013-03-04 | 2015-12-09 | 爱德万测试公司 | Switchable signal routing circuit |
JP2016512402A (en) * | 2013-03-04 | 2016-04-25 | 株式会社アドバンテスト | Switchable signal routing circuit |
CN105144576B (en) * | 2013-03-04 | 2019-06-11 | 爱德万测试公司 | Changeable signal routing circuit, method and non-transient storage media |
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