JPH07249844A - Printed board with wiring pattern for capacitor mounting and printed board with capacitor mounted - Google Patents

Abstract

(57) [Summary] [Purpose] To improve the frequency characteristics of the capacitor circuit and take effective measures against electromagnetic interference. [Structure] A cutout portion A having a width smaller than the size of the electrode of the chip capacitor C is provided in a part of the wiring pattern,
One electrode of the capacitor C is connected to the cutout portion A, and the other electrode is connected to the wiring pattern on the GND side. As a result, the current flowing by bypassing the capacitor C can be cut, the frequency characteristic can be improved, and effective electromagnetic interference countermeasures can be taken. Further, the same effect can be obtained by providing a cutout portion in the wiring pattern and connecting the electrode of the capacitor so as to overlap the cutoff portion. Furthermore, the same effect can be obtained for a circuit using two or more capacitors by connecting the electrodes of the capacitors to both sides of the separated portion and connecting the upper sides of the electrodes of the capacitors with a short bar or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed board having a wiring pattern for mounting a capacitor for electromagnetic interference and a printed board on which the capacitor is mounted.

[0002]

2. Description of the Related Art As a countermeasure against electromagnetic interference (EMI), a capacitor / filter 11 is generally provided in an input / output circuit of a printed board Pt as shown in FIG. FIG. 13 is a diagram showing a conventional wiring pattern when a chip capacitor for electromagnetic interference countermeasures is mounted on a printed board. FIG. 13 (a) is a top view of the printed board and FIG. 13 (b) is a side view. It shows the view.

In the figure, Pt is a printed board, C is a chip capacitor for electromagnetic interference countermeasures, P1 is a signal side wiring pattern provided on the printed board Pt, and P2 is a ground (hereinafter referred to as GND) side. Is a wiring pattern.
Chip capacitor C for electromagnetic interference countermeasure is printed board P
In the case of mounting on t, conventionally, as shown in the same figure, the wiring patterns P1 and GN on the signal side are formed on the printed board Pt.
A wiring pattern P2 on the D side is provided, and wiring patterns P1 and P1
Each electrode of the chip capacitor C was soldered to the No. 2 chip.

[0004]

By the way, when the wiring pattern shown in FIG. 13 is provided on the printed board Pt and the chip capacitor C is soldered, the wiring pattern and the inductance of the electrodes of the chip capacitor cause the influence.
Of the current flowing on the signal side, most of the high-frequency components flow by bypassing the chip capacitor C like the current Ia shown by the arrow in the figure.

Therefore, there is a problem in that the current flowing into the chip capacitor C for electromagnetic interference is small and the chip capacitor C does not function effectively as a filter capacitor. The present invention has been made in consideration of the above-mentioned problems of the prior art, and the present invention improves the frequency characteristics of the filter circuit by improving the mounting method of the wiring pattern and the capacitor on the printed board. ,
An object of the present invention is to provide a printed board provided with a wiring pattern for mounting a capacitor capable of effectively taking measures against electromagnetic interference and a printed board mounted with the capacitor.

[0006]

In order to solve the above-mentioned problems, the invention according to claim 1 of the present invention is provided in a part of a wiring pattern on the signal side of a printed board, and a first capacitor C for electromagnetic interference prevention is provided. A first wiring pattern P1 having a wiring pattern portion having a width narrower than the size of the first electrode, to which the electrodes of the first electrode are connected, and a part of the wiring pattern on the ground side of the printed board. The second wiring pattern P2 to which the second electrode is connected is provided on the printed board.

According to a second aspect of the present invention, the first electrode of the capacitor C for electromagnetic interference is provided over a part of the wiring pattern on the signal side of the printed board, and is connected across the first electrode.
A first wiring pattern P1 having a separation portion having a width narrower than the size of the first electrode and a part of the wiring pattern on the ground side of the printed board are provided, and the second electrode of the capacitor C is connected. The second wiring pattern P2 is provided on the printed board.

According to a third aspect of the present invention, there is provided a first wiring pattern P1 which is provided in a part of the wiring pattern on the signal side of the printed board and to which the first electrode of the capacitor C for electromagnetic interference is connected. A second wiring pattern P2, which is provided on a part of the ground side wiring pattern of the printed board and is connected to the ground side by a via, and to which the second electrode of the capacitor C is connected, is provided on the printed board. It is a thing.

According to a fourth aspect of the present invention, there is provided a first wiring pattern P1 which is provided in a part of the wiring pattern on the signal side of the printed board and to which the first electrode of the capacitor C for electromagnetic interference is connected. A second wiring which is provided in a part of the ground side wiring pattern of the printed board and which is connected to the second electrode of the capacitor C and which extends toward the vicinity of the first wiring pattern P1 facing the capacitor. The pattern P2 and the pattern P2 are provided on the printed board.

The invention of claim 5 of the present invention is at least 2
In a printed circuit board in which capacitors C1, C2, ... For coping with electromagnetic interference are mounted in parallel, a first wiring pattern P1 provided in a part of the wiring pattern on the signal side of the printed circuit board and provided with a narrow separation part And a second wiring pattern P2 provided on a part of the ground side wiring pattern of the printed board and a wiring pattern on both sides of the first wiring pattern P1 separated by the first electrode. And each second electrode has a second
And the capacitors C1, C2, ... Connected to the wiring pattern P2 and electrically connected to the respective electrode surfaces on the opposite side of the electrode surface connected to the first wiring pattern.

According to the invention of claim 6 of the present invention,
2, 3, 4 or the invention according to claim 5, wherein an insulator is provided on the first electrodes of the capacitors C1, C2, ... And a shield plate for covering the capacitors C1, C2 ,. is there. According to a seventh aspect of the present invention, in the sixth aspect of the invention, the insulator is a thin film, and a capacitance is formed between the shield plate and the capacitors C1, C2, ....

The invention of claim 8 of the present invention is the invention of claims 5 and 6.
Alternatively, in the invention of claim 7, the first wiring pattern P
Each of the electrode surfaces on the opposite side of the electrode surface connected to 1 is connected by a short bar. According to a ninth aspect of the present invention, in the fifth, sixth or seventh aspect of the invention, the first electrodes of the capacitors C1, C2, ... Are formed in a trapezoidal shape, and the short side of the trapezoidal is the first wiring. The separated portions of the pattern P1 are connected to the wiring patterns on both sides of the sandwiched pattern, and one of the long sides of the trapezoid of each first electrode is butted and electrically connected.

According to a tenth aspect of the present invention, in the invention of the ninth aspect, a groove is provided on the hypotenuse of the trapezoid of the first electrode, and when the electrode is soldered to the wiring pattern of the printed board, the solder is used to form the groove. It is obtained by connecting one corner of the long side of the trapezoid of each electrode by soldering. In the invention of claim 11 of the present invention, in the invention of claim 5, 6 or 7, each of the capacitors C1, C2, ... Is obliquely connected to the wiring pattern so that the corners of the first electrodes are in contact with each other. The first of each of the above
The corners of the electrodes are electrically connected.

[0014]

According to the first aspect of the present invention, there is provided a first wiring pattern portion which is provided in a part of the wiring pattern on the signal side of the printed board and has a width narrower than the size of the first electrode.
Since the wiring pattern P1 is provided and the first electrode of the electromagnetic interference countermeasure capacitor C is connected to the first wiring pattern P1, it is possible to cut the current of the high frequency component that bypasses the capacitor C and flows. Thus, the electromagnetic interference countermeasure capacitor C can be effectively operated, and the frequency characteristic can be improved. Therefore, it is possible to take effective countermeasures against electromagnetic interference.

According to a second aspect of the present invention, the wiring pattern on the signal side of the printed board is provided in a part of the first wiring pattern.
First with a cut-off portion that is narrower than the size of the electrode
The wiring pattern P1 is provided and the first electrode of the electromagnetic interference countermeasure capacitor C is connected across the separated portion. Therefore, similarly to the invention of claim 1, the high-frequency component that bypasses the capacitor C The current can be cut, the capacitor C for electromagnetic interference can be effectively operated, and the frequency characteristic can be improved. Therefore, it is possible to take effective countermeasures against electromagnetic interference.

According to a third aspect of the present invention, a second wiring pattern P2 is provided which is provided in a part of the wiring pattern on the ground side of the printed board and is connected to the ground side by a via, and the second wiring is provided. Since the second electrode of the electromagnetic interference countermeasure capacitor C is connected to the pattern P2, it is possible to remove the influence of the inductance of the wiring pattern that is drawn from the second wiring pattern P2 and is connected to the GND side. Since the inductance on the GND side can be reduced, the frequency characteristic can be improved. Therefore, it is possible to take effective countermeasures against electromagnetic interference.

According to a fourth aspect of the present invention, a second wiring pattern is provided in a part of the wiring pattern on the ground side of the printed board and faces the capacitor and extends to the vicinity of the first wiring pattern P1. P2 is provided, and the second capacitor C for electromagnetic interference prevention is provided on the second wiring pattern P2.
Since the electrodes of are connected, the capacitor C and the second
Capacitance can be formed between the wiring patterns of
It is possible to improve frequency characteristics and take effective measures against electromagnetic interference.

According to the fifth aspect of the present invention, at least two capacitors C1, C2, ...
In a printed circuit board in which are mounted in parallel, a first wiring pattern P1 provided on a part of a signal side wiring pattern of the printed circuit board and having a narrow separation part, and a ground side wiring pattern of the printed circuit board. Second provided in the section
Of the first wiring pattern P1 and the wiring patterns on both sides of the first wiring pattern P1 separated from each other are connected to the first electrodes, and the respective second electrodes are connected to the second wiring pattern P2. In addition, capacitors C1, C2, ... Having respective electrode surfaces electrically connected to the opposite side of the electrode surface connected to the first wiring pattern are electrically connected.
And the capacitor C is provided as in the first aspect of the invention.
It is possible to cut off the high-frequency component current that flows by bypassing, and it is possible to effectively function the electromagnetic interference countermeasure capacitor C, and it is possible to improve the frequency characteristics and take effective electromagnetic interference countermeasures.

According to a sixth aspect of the present invention, in the first, second, third, fourth or fifth aspect of the invention, an insulator is provided on the first electrodes of the capacitors C1, C2 ,.
Since the shield plate covering the capacitors C1, C2, ... Is provided on the insulator, the same effect as that of the invention of claim 5 can be obtained, and an effective countermeasure against electromagnetic interference can be taken.

According to a seventh aspect of the present invention, in the sixth aspect of the invention, the insulator is a thin film, and a capacitance is formed between the shield plate and the capacitors C1, C2 ,. It is possible to obtain the same effect as that of the invention of claim 1, and to take an effective countermeasure against electromagnetic interference as in the case of the invention of claim 4. In the invention of claim 8 of the present invention, the first aspect of the invention of claim 5, 6 or 7
Since each electrode surface on the opposite side of the electrode surface connected to the wiring pattern P1 is connected by the short bar, the same effect as that of the invention of claim 5 can be obtained.

In the invention of claim 9 of the present invention, the capacitor C in the invention of claim 5, 6 or 7
The first electrodes C1, C2, ... Are formed in a trapezoidal shape, and the short sides of the trapezoid are connected to the wiring patterns on both sides of the first wiring pattern P1 separated by the cut-off portion. Since one of the long sides of the trapezoid is abutted and electrically connected, the same effect as the invention of claim 5 can be obtained, and the first electrodes of the capacitor can be easily connected to each other.

According to a tenth aspect of the present invention, in the ninth aspect of the invention, a groove is provided on the hypotenuse of the trapezoid of the first electrode, and the solder is used when the electrode is soldered to the wiring pattern of the printed board. By ascending along the groove, one corner of the long side of the trapezoid of each electrode is connected by soldering, so that it is possible to obtain the same effect as the invention of claim 9 and solder by hand. Without, the first electrodes of the capacitors can be easily connected together.

According to an eleventh aspect of the present invention, in the fifth, sixth or seventh aspect of the present invention, the respective wiring patterns of the capacitors C1, C2, ... Are contacted at the corners of the first electrode. Since the corners of the first electrodes are electrically connected to each other, the first electrodes of the capacitor can be easily connected to each other, as in the ninth aspect of the invention.

[0024]

FIG. 1 is a diagram showing a first embodiment of the present invention. In the figure, P1 is a wiring pattern on the signal side, and P2 is
Is a wiring pattern on the GND side, and C is a chip capacitor mounted on a printed board. As shown in the figure, in this embodiment, a cutout portion A having a width narrower than the size of the electrode of the chip capacitor is provided in a part of the wiring pattern, and the cutout portion A is provided with one of the chip capacitor C1. By connecting the electrodes and connecting the other electrode to the wiring pattern on the GND side, the current Ia (see FIG. 13) flowing by bypassing the chip capacitor C is cut off.

As a result, the high frequency component current flowing in the wiring pattern on the signal side does not bypass the chip capacitor C, and the frequency characteristic as a filter can be improved. FIG. 2 is a diagram showing a second embodiment of the present invention. In this embodiment, as shown in the figure, the wiring pattern P1 on the signal side is cut off, and one of the chip capacitors C1 is placed across the cut wiring pattern. Is connected to the other electrode and the other electrode is connected to the GND side.

Also in this embodiment, as in the first embodiment, the current flowing by bypassing the chip capacitor C can be cut and the frequency characteristic of the filter can be improved. FIG. 3 is a diagram showing a third embodiment of the present invention. In this embodiment, two chip capacitors C are provided in parallel between the wiring patterns on the signal side and the GND side.

In the figure, P1 is a wiring pattern on the signal side, and the wiring pattern is removed in a rectangular shape in the middle portion of the wiring pattern P1. C1 and C2 are chip capacitors, and P2 and P3 are wiring patterns on the GND side. In this embodiment, as shown in FIG.
The middle of the wiring pattern P1 is removed in a rectangular shape,
Since one electrode of the capacitors C1 and C2 is connected to the remaining wiring pattern portion and the other electrode is connected to the GND side wiring pattern P2, the current of the high frequency component flowing in the signal side wiring pattern is・ Capacitor C
It is possible to improve frequency characteristics without bypassing 1 and C2.

FIG. 4 shows a fourth embodiment of the present invention. FIG. 4 (a) is a view of the printed board seen from above, and FIG. 4 (b) is a view seen from the direction A in (a). In this embodiment, like the embodiment of FIG. 3, two chip capacitors C are provided in parallel between the wiring patterns on the signal side and the GND side. In the figure, P1 is a wiring pattern on the signal side, and P2 is
Is a wiring pattern on the GND side, C1 and C2 are chip capacitors, and S1 is a short bar connected on the chip capacitors C1 and C2.

In this embodiment, the wiring pattern P1 on the signal side is separated, one electrode of the chip capacitors C1 and C2 is connected to each of the separated wiring patterns P1, and the other electrode is connected to the GND side. The electrodes of the chip capacitors C1 and C2 connected to the wiring pattern P2 and connected to the wiring pattern P1 are connected by the short bar S1.

As a result, the current flowing through the wiring pattern P1 flows through the route of the wiring pattern P1 → the electrode of the chip capacitor C1 → the short bar S1 → the electrode of the chip capacitor C2 → the wiring pattern P1, and the high frequency component flowing in the wiring pattern is generated. The current of 2 does not bypass the chip capacitors C1 and C2, and the frequency characteristic can be improved.

5A and 5B are views showing a fifth embodiment of the present invention. FIG. 5A is a side view of the mounted state of the chip capacitor, and FIG. 5B is a chip capacitor of the present embodiment. FIG. 3C is a view showing a modified example of FIG. 3C, and FIG. 3C is a view of the chip capacitor shown in FIG.
In the same manner as in the above embodiment, two chip capacitors C are provided in parallel between the wiring patterns on the signal side and the GND side.

In the figure, P1 is a wiring pattern on the signal side, C1 and C2 are chip capacitors, and the chip capacitor of this embodiment is formed in a trapezoidal shape. Further, J is a soldering part. In the present embodiment, as shown in FIG. 7A, the wiring pattern P1 on the signal side is separated, and one electrode of the chip capacitors C1 and C2 is connected to each of the separated wiring patterns P1. The other electrode is connected to a wiring pattern (not shown) on the GND side, and the upper side of the electrodes of the chip capacitors C1 and C2 connected to the wiring pattern P1 are soldered.

Therefore, as in the fourth embodiment, the current flowing through the wiring pattern P1 is in the route of the wiring pattern P1 → the electrode of the chip capacitor C1 → the soldering part J → the electrode of the chip capacitor C2 → the wiring pattern P1. The high frequency component current flowing in the wiring pattern does not bypass the chip capacitors C1 and C2, and the frequency characteristic can be improved.

Further, the electrodes connected to the wiring pattern P1 of the chip capacitors C1 and C2 are connected to the electrodes shown in FIGS.
If the slit SL is installed as shown in Fig.
When the capacitors C1 and C2 are soldered to the wiring pattern P1, the solder lifts the slit SL by a capillary phenomenon, and the upper side of the electrodes of the chip capacitors C1 and C2 can be connected without soldering manually.

FIG. 6 is a diagram showing a sixth embodiment of the present invention, which is a side view of the mounted state of the chip capacitor. This embodiment is different from the embodiment shown in FIG. Similarly, two chip capacitors C are provided in parallel between the wiring patterns on the signal side and the GND side. In the figure, P
Reference numeral 1 is a wiring pattern on the signal side, C1 and C2 are chip capacitors, and J is a soldering portion.

In this embodiment, as shown in FIG.
The wiring pattern P1 on the signal side is separated, and one electrode of the tilted chip capacitors C1 and C2 is soldered to each of the separated wiring pattern P1 and the other electrode is grounded on the GND side (see FIG. (Not shown), and the upper side of the electrodes of the chip capacitors C1 and C2 connected to the wiring pattern P1 are soldered.

Therefore, as in the fifth embodiment, the current flowing through the wiring pattern P1 is in the route of the wiring pattern P1 → the electrode of the chip capacitor C1 → the soldering part J → the electrode of the chip capacitor C2 → the wiring pattern P1. The high frequency component current flowing in the wiring pattern does not bypass the chip capacitors C1 and C2, and the frequency characteristic can be improved.

FIG. 7 is a diagram showing a seventh embodiment of the present invention. This embodiment shows an embodiment in which the frequency characteristic is improved by improving the wiring pattern on the GND side. In the figure, P1 is a wiring pattern on the signal side, and P2 is GND.
The wiring pattern on the side, and the wiring pattern P2 is provided with a via (hereinafter referred to as VIA) which penetrates the printed board and is connected to the GND wired in the lower layer.

In this embodiment, the GND is used by VIA.
Since the wiring pattern P2 is connected to the GND of the printed board, it is not necessary to draw out the wiring pattern for connecting the wiring pattern P2 to the GND as shown in FIGS. 1, 2 and 3. The influence of the inductance of the wiring pattern can be eliminated. Therefore, the inductance on the GND side can be reduced and the frequency characteristic can be improved.

The method shown in this embodiment is the same as the GN in the first to sixth embodiments described above and the embodiments described later.
It can be applied to the wiring pattern on the D side, and the frequency characteristic can be further improved by applying the method of the present embodiment to the above-described embodiments. FIG. 8 shows the eighth aspect of the present invention.
Is a diagram showing an embodiment of the present invention, and this embodiment, like the seventh embodiment, shows an embodiment in which the frequency characteristics are improved by improving the wiring pattern on the GND side.

In the figure, P1 is a wiring pattern on the signal side, P2 is a wiring pattern on the GND side, VIA is provided on the wiring pattern P2, and it is connected to GND via the VIA. The GND side wiring pattern P2 is extended to the vicinity of the signal side wiring pattern P2, as shown in FIG. In this embodiment, since the GND side is connected by VIA as described above, the GND side inductance can be reduced and the frequency characteristic can be improved, as in the seventh embodiment. Also, G
Since the wiring pattern on the ND side is extended to the vicinity of the wiring pattern P2 on the signal side as shown in the figure, an electrostatic capacitance is formed between the capacitor C and the GND side, and via this electrostatic capacitance, Since the current of the high frequency component on the signal side can be passed to the GND side, the frequency characteristic can be further improved.

The method shown in this embodiment should be applied to the wiring patterns on the GND side in the above-mentioned first to sixth embodiments and the embodiments described later, as in the case of the seventh embodiment shown in FIG. The frequency characteristic can be further improved by applying the method of this embodiment to the above-described embodiments. FIG. 9 is a diagram showing a ninth embodiment of the present invention,
This embodiment is a combination of the third embodiment shown in FIG. 3 and the fourth embodiment shown in FIG. 4, where P1 is a signal side wiring pattern, P2 is a GND side wiring pattern, C
1, C2, C3, C4 are chip capacitors, S1, S
2 is a short bar.

In the present embodiment, the central portion of the signal side wiring pattern P1 is removed in a rectangular shape and separated, and four chip capacitors C1, C2, C3 and C4 are provided in each of the remaining wiring pattern portions. One electrode is connected, the other electrode is connected to the wiring pattern P2 connected to GND by VIA, and the chip capacitor C
Short C1, C2 and chip capacitors C3, C4
It is connected by bars S1 and S2.

Also in this embodiment, as in the third and fourth embodiments, the high frequency component current flowing in the wiring pattern does not bypass the chip capacitors C1, C2, C3 and C4, and the frequency characteristic is improved. can do. Figure 1
0 is a diagram showing a tenth embodiment of the present invention, (a) is a view of the printed board seen from above, (b) is a view seen from the side, and this embodiment is In the embodiment shown in FIG. 9, the short bars S1 and S2 and the shield plate SH insulated by the insulator I are provided, and the shield plate SH is connected to the chip capacitors C1, C2. It covers the upper surfaces of C3 and C4.

In this embodiment, the chip capacitors C1, C2. Since the shield plate SH is provided so as to cover the upper surfaces of C3 and C4, the influence of electromagnetic induction noise can be eliminated. FIG. 11 is a diagram showing an eleventh embodiment of the present invention. This embodiment is the same as the tenth embodiment shown in FIG. 10, except that the insulator I is used as a thin film for the chip capacitors C1, C2. The capacitance between C3 and C4 and the shield plate SH is increased.

In this embodiment, the same effect as that of the tenth embodiment can be obtained, and the high frequency component current on the signal side can be passed to the GND side via the electrostatic capacitance. The frequency characteristics can be improved.

[0047]

As described above, according to the present invention, the following effects can be obtained. (1) In the invention of claim 1, the first wiring pattern is provided in a part of the wiring pattern on the signal side of the printed board, the first wiring pattern having a wiring pattern portion narrower than the size of the first electrode, Since the first electrode of the electromagnetic interference countermeasure capacitor is connected, it is possible to cut off the high-frequency component current that flows by bypassing the capacitor C and enable the electromagnetic interference countermeasure capacitor C to function effectively. Becomes Therefore, the frequency characteristics of the electromagnetic interference countermeasure circuit can be improved, and effective electromagnetic interference countermeasures can be taken. (2) In the invention of claim 2, the first wiring pattern is provided and provided in a part of the wiring pattern on the signal side of the printed board, and the first wiring pattern is provided with a separation portion having a width narrower than the size of the first electrode. Since the first electrode of the electromagnetic interference countermeasure capacitor is connected across the portion, the high-frequency component current that bypasses the capacitor C can be cut as in (1). Therefore, the frequency characteristics of the electromagnetic interference countermeasure circuit can be improved, and effective electromagnetic interference countermeasures can be taken. (3) In the invention of claim 3, a second wiring pattern provided on a part of the ground side wiring pattern of the printed board and connected to the ground side by a via is provided, and the second wiring pattern has an electromagnetic interference. Since the second electrode of the countermeasure capacitor is connected, the inductance on the GND side can be reduced. Therefore, the frequency characteristics of the electromagnetic interference countermeasure circuit can be improved, and effective electromagnetic interference countermeasures can be taken. (4) In the invention of claim 4, a second wiring pattern is provided which is provided in a part of the wiring pattern on the ground side of the printed board and which faces the capacitor and extends to the vicinity of the first wiring pattern. Since the second electrode of the capacitor for electromagnetic interference countermeasure is connected to the wiring pattern of 2,
Capacitance can be formed between the capacitor and the second wiring pattern.

Therefore, the frequency characteristic of the electromagnetic interference countermeasure circuit can be improved, and effective electromagnetic interference countermeasure can be taken. (5) According to the invention of claim 5, in a printed board on which at least two capacitors for preventing electromagnetic interference are mounted in parallel, a narrow cut-off portion is provided in a part of the wiring pattern on the signal side of the printed board. The first electrode is connected to the provided first wiring pattern and the wiring patterns on both sides of the separated portion of the first wiring pattern, and the opposite side of the electrode surface connected to the first wiring pattern. Since the capacitors whose electrode surfaces are electrically connected to each other are provided, it is possible to cut off the high-frequency component current flowing by bypassing the capacitor C as in (1). Therefore, the frequency characteristics of the electromagnetic interference countermeasure circuit can be improved, and effective electromagnetic interference countermeasures can be taken. (6) In the invention of claim 6, claims 1, 2, 3, 4
Alternatively, in the invention of claim 5, since the insulator is provided on the first electrode of the capacitor and the shield plate covering the capacitor is provided on the insulator, the same effect as (5) can be obtained, and the effect is obtained. Electromagnetic interference measures can be taken. (7) In the invention of claim 7, in the invention of claim 6, since the insulator is a thin film and the capacitance is formed between the shield plate and the capacitor, the same effect as (6) can be obtained. In addition to the above, the frequency characteristics can be improved as in the case of (4), and effective electromagnetic interference countermeasures can be taken. (8) In the invention of claim 8, in the invention of claim 5, 6 or 7, each electrode surface opposite to the electrode surface connected to the first wiring pattern is connected by a short bar. Therefore, the same effect as (5) can be obtained. (9) In the invention of claim 9, in the invention of claim 5, 6 or 7, the first electrode of the capacitor is formed in a trapezoidal shape, and the short side of the trapezoid is a portion where the first wiring pattern is cut off. In addition to connecting to the wiring patterns on both sides of the pin, and also by connecting one corner of the long side of the trapezoid of the first electrode to make electrical connection, the same effect as (5) can be obtained. , The first electrodes of the capacitors can be easily connected together. (10) In the invention of claim 10, in the invention of claim 9, a groove is provided on the hypotenuse of the trapezoid of the first electrode, and when the electrode is soldered to the wiring pattern of the printed board, the solder follows the groove. Since one side of the trapezoidal long side of each electrode was connected by soldering,
It is possible to obtain the same effect as (9), and it is possible to easily connect the first electrodes of the capacitors without soldering by hand. (11) In the invention of claim 11, in the invention of claim 5, 6 or 7, each capacitor is diagonally connected to the wiring pattern so that the corners of the first electrode are in contact with each other, and Since the corners of the first electrode of are electrically connected, it is possible to easily connect the first electrodes of the capacitor, as in (9).

[Brief description of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a second embodiment of the present invention.

FIG. 3 is a diagram showing a third embodiment of the present invention.

FIG. 4 is a diagram showing a fourth embodiment of the present invention.

FIG. 5 is a diagram showing a fifth embodiment of the present invention.

FIG. 6 is a diagram showing a sixth embodiment of the present invention.

FIG. 7 is a diagram showing a seventh embodiment of the present invention.

FIG. 8 is a diagram showing an eighth embodiment of the present invention.

FIG. 9 is a diagram showing a ninth embodiment of the present invention.

FIG. 10 is a diagram showing a tenth embodiment of the present invention.

FIG. 11 is a diagram showing an eleventh embodiment of the present invention.

FIG. 12 is a diagram showing a printed board provided with a capacitor for countermeasures against electromagnetic interference.

FIG. 13 is a diagram showing a conventional example.

[Explanation of symbols]

 C, C1, C2, C3, C4 Capacitor P1, P2 Wiring pattern S1, S2 Short bar SH Shield plate

Claims (11)

[Claims] 1. A wiring pattern narrower than the size of the first electrode, which is provided in a part of the wiring pattern on the signal side of the printed board and to which the first electrode of the capacitor (C) for electromagnetic interference is connected. The first wiring pattern (P1) having a portion and the second wiring pattern (P2) provided on a part of the ground side wiring pattern of the printed board and connected to the second electrode of the capacitor (C). ) And a printed circuit board having a wiring pattern for mounting a capacitor. 2. The width is narrower than the size of the first electrode, which is provided in a part of the wiring pattern on the signal side of the printed board and which is connected across the first electrode of the capacitor (C) for electromagnetic interference prevention. The first wiring pattern (P1) with a disconnection part
And a second wiring pattern (P2) provided on a part of the ground side wiring pattern of the printed board and connected to the second electrode of the capacitor (C), Printed circuit board with wiring pattern. 3. A first wiring pattern (P1) provided on a part of the wiring pattern on the signal side of the printed board, to which the first electrode of the capacitor (C) for electromagnetic interference is connected, and a printed board A second wiring pattern provided on a part of the ground side wiring pattern and connected to the ground side by a via, to which the second electrode of the capacitor (C) is connected
A printed board having a wiring pattern for mounting a capacitor, which comprises (P2). 4. A first wiring pattern (P1), which is provided on a part of the wiring pattern on the signal side of the printed board and to which the first electrode of the capacitor (C) for electromagnetic interference is connected, and a printed board. It is provided in a part of the ground side wiring pattern, and the second electrode of the capacitor (C) is connected.
A printed board provided with a wiring pattern for mounting a capacitor, comprising: a second wiring pattern (P2) facing the capacitor and extending to the vicinity of the first wiring pattern (P1). 5. A printed board on which at least two capacitors for preventing electromagnetic interference (C1, C2, ..) are mounted in parallel, which is provided in a part of a wiring pattern on the signal side of the printed board,
First wiring pattern (P1) with a narrow separation
And the second wiring pattern (P2) provided on a part of the ground side wiring pattern of the printed board and the wiring patterns on both sides of the first wiring pattern (P1) separated from each other. Electrodes are connected and each second electrode has a second wiring pattern.
A capacitor (C1, C2, ..) electrically connected to each electrode surface opposite to the electrode surface connected to (P2) and connected to the first wiring pattern, A printed circuit board with a capacitor mounted on it. 6. The capacitor (C1, C2, ..) is provided with an insulator on the first electrode, and the shield is provided on the insulator to cover the capacitor (C1, C2, ..). Claims 1, 2,
A printed board on which the capacitor according to claim 3 or 4 is mounted. 7. The printed board on which the capacitor of claim 6 is mounted, wherein the insulator is a thin film, and an electrostatic capacitance is formed between the shield plate and the capacitors (C1, C2, ...). 8. The capacitor according to claim 5, wherein each electrode surface opposite to the electrode surface connected to the first wiring pattern (P1) is connected by a short bar. Printed circuit board mounted. 9. The first electrode of the capacitor (C1, C2, ..) is formed into a trapezoidal shape, and the short side of the trapezoid is formed into a wiring pattern on both sides sandwiching a cutoff portion of the first wiring pattern (P1). 8. A printed circuit board on which the capacitor according to claim 5, 6 or 7 is mounted, wherein the printed circuit board is connected and is electrically connected by abutting one of the long sides of the trapezoid of each first electrode. 10. A groove is provided on the hypotenuse of the trapezoid of the first electrode,
When the electrodes are soldered to the wiring pattern of the printed board, the solder is raised along the groove so that one corner of the long side of the trapezoid of each electrode is connected by the solder. A printed board on which the capacitor of 9 is mounted. 11. Each capacitor (C1, C2, ..)
8. The capacitor according to claim 5, wherein the first electrodes are diagonally connected to the wiring pattern so that the corners of the first electrodes are in contact with each other, and the corners of the respective first electrodes are electrically connected. Printed circuit board mounted.