JPH07226424A - Inner lead with gold bump, its manufacture and semiconductor element - Google Patents

Abstract

PURPOSE:To realise easy transfer of gold bump from a gold bump forming substrate by forming only one gold bump of which column portion is not less than specified times higher than the whole bump, removing an insulating layer after the gold bump is formed and then pressing the inner lead to the gold bump with a pressure. CONSTITUTION:A conductive layer 2 is provided on an insulating substrate 1 by vacuum deposition method, etc., and this conductive layer 2 is coated with an insulating film 4 and an aperture 5 is then formed, by the patterning of the photo etching, at the position corresponding to the electrodes of a semiconductor element. Height of column portion 3b of the bump is set to 0.5 times or more the total height of the bump conforming to the shape of aperture 5 to relatively increase the height of the column portion 3b of the bump. Moreover, a short diameter D2 of the upper bottom of the bump column 3b of the gold bump 3 is set to 0.5 times the short diameter of the overhang portion 3a of the bump to make small the rate of bump overhand portion 3a to the entire part of bump. In this physical condition, an inner lead 11 is pressed to the gold bump 3 with a pressure. Thereby, since there is no insulating film around the gold bump 3, the inner lead 11 can be transferred easily.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inner lead of a film carrier used for connecting an electrode of a semiconductor element and an external circuit in a transfer bump TAB technique which is one of the techniques for connecting an electrode of a semiconductor element and an external circuit. The present invention relates to a manufacturing method thereof and a semiconductor element having such an inner lead.

[0002]

2. Description of the Related Art In recent years, as the density of semiconductor elements has increased and the number of electrodes of the elements has increased, the pitch (center interval) of the electrodes has become narrower. TAB (Tape Automated Bondin) is one of the techniques for mechanically and electrically connecting (referring to mounting) such a semiconductor element to an external circuit (electronic circuit board or the like) or an IC package.
g) There is technology.

In the TAB technology, the following steps are carried out to mount a semiconductor element on an external circuit. That is, (1) at the connection part of the external circuit to be connected from the position corresponding to the electrode provided on the outer edge of the semiconductor element (the inner tip of the pin of the IC package encapsulating the semiconductor element, the pattern of the electric circuit board, etc.) A conductive pattern having a thickness of several 10 μm reaching a corresponding position is formed on a substrate tape made of polyimide or the like (the laminated tape manufactured in this way is called a film carrier), (2) of the film carrier A part of the substrate tape of the portion corresponding to the electrode of the semiconductor element and its vicinity and the portion that was in close contact with the conductive pattern are removed by a method such as etching (the holes formed in this way are device holes). So that the conductive pattern protrudes from the outside toward the inside of the device hole, and The side protruding to the chair hole is called "inner lead", and the side connected to the external circuit etc. is called "outer lead".) (3) The inner lead is plated with gold or tin, (4) The above Gold bumps are formed on the electrodes of the semiconductor element, (5) The semiconductor element is positioned so that the electrode corresponding to the tip of the inner lead is positioned, (6) Metal pillar tool called a bonding tool The tip of the inner lead is pressed into contact with the electrode of the semiconductor while being heated, and these are mechanically and electrically bonded, (7) the semiconductor element or the like is sealed with resin or the like, (8) The outer lead corresponding to each inner lead is connected to an external circuit by soldering or the like.

The TAB technique is characterized in that since each electrode of the semiconductor element and an external circuit can be connected simultaneously, the productivity can be improved as compared with a method such as wire bonding. In particular, it is advantageous that the semiconductor device has a large number of electrodes. Therefore, the recent increase in the number of electrodes of semiconductor devices is further enhancing the superiority of TAB technology.

However, in order to apply such a TAB technique, it is necessary to previously form gold bumps as an adhesive between the electrodes and the inner leads on the semiconductor element. Therefore, since the TAB technique can be applied only to a special semiconductor element designed to form a gold bump on an electrode, the TAB technique has not necessarily spread widely.

As a technique for solving this problem, there is a transfer bump TAB technique. That is, the above step (4) is replaced with (41)
Gold bumps are separately formed at positions corresponding to the respective electrodes of the gold bump formation substrate, (42) the gold bump formation substrate is positioned so that the inner lead tips are aligned with the corresponding gold bump positions, (43) ) The tip of the inner lead is pressed against the gold bump formed on each of the gold bump forming substrates with a bonding tool while heating to bond the inner lead and the gold bump mechanically and electrically, (44) An inner lead with a gold bump is formed by separating the gold bump from the gold bump forming substrate and separating the gold bump from the gold bump forming substrate (this is called transfer).
It is to replace with the process. Since this transfer bump TAB technique does not need to directly form the gold bump on the electrode of the semiconductor element, it can be widely applied to ordinary semiconductor elements having no special design or process for that purpose.

Two examples known as a method of manufacturing an inner lead with gold bumps used in such a transfer bump TAB technique will be described.

As the most basic manufacturing method of inner leads with gold bumps, Kenzo Hatada "Introduction to TAB Technology"
The method (hereinafter referred to as the first prior art) described in (Industrial Research Association, published in January 1990) is well known. This method will be described with reference to FIGS. First, the conductive layer 14 is provided on the insulating substrate 13 such as glass. This conductive layer 1
An insulating film 15 is further formed on the surface 4. This insulating film 15
An opening is provided at a position corresponding to the position of the electrode of the semiconductor element to which is applied, and the conductive layer 14 is exposed (FIG. 10). Further, gold bumps 16 are formed on the openings of the insulating film 15 by electrolytic plating.
Are formed (FIG. 11). Subsequently, the tips of the inner leads 20 are positioned on the gold bumps 16 (FIG. 12), and they are pressure-welded while being heated by the bonding tool 21 (FIG. 1).
3). Finally, the inner leads are separated from the insulating substrate 13 to separate the gold bumps 16 from the conductive layer 14 to form inner leads with gold bumps (FIG. 14).
That is.

According to this method, the bump pillar portion of the gold bump 16 (the portion on the gold bump formation substrate side when the bump is divided into two at the surface having the maximum cross-sectional area when cut along a plane parallel to the gold bump formation substrate surface) In the case of FIG. 11, the insulating film 15 of the bump
The part buried in corresponds to this. ), Which is several times larger than the diameter of the bump pillar, and has a height several times higher than the height of the bump pillar (the cross-sectional area when cut at a plane parallel to the gold bump formation substrate surface). A portion on the inner lead side when the bump is divided into two parts at the surface where the maximum value is the maximum. In FIG. 11, a gold bump 16 having a shape called a mushroom type having a portion protruding above the insulating film 15) is formed.

Further, the one described in Japanese Patent Laid-Open No. 63-240049 (hereinafter referred to as the second prior art) is also known. This will be described with reference to FIGS. Insulating substrate 13
The gold bump forming substrate 17 composed of the conductive layer 14 and the conductive layer 14 is the same as that described above, but the thickness of the insulating film 18 is equal to or greater than the height of the gold bump 19 (FIG. 15). After forming the bumps, the insulating film 18 is removed (FIG. 16). Thereafter, similarly to the first conventional technique, the tip portion of the inner lead 20 is positioned on the gold bump 19 (see FIG.
7), pressure bonding is performed while heating with the bonding tool 21 (FIG. 18). Finally, the inner leads 20 are separated from the conductive layer 14 to separate the gold bumps 16 from the conductive layer 14 to form inner leads with gold bumps (FIG. 19). In this method, a gold bump having a shape called a straight wall type having no bump cap portion but only a bump pillar portion is formed.

There is a technique called a micro bump technique as a semiconductor device mounting method similar to the TAB technique. This is a technique for directly mechanically and electrically connecting the electrodes of a semiconductor element and an external circuit with gold bumps, which does not use a conductive pattern such as inner leads unlike the TAB technique. Then, the semiconductor element is mounted on an external circuit. That is, (a) transfer bump TAB
Similar to the technology, gold bumps are formed on the substrate corresponding to the electrode positions of the semiconductor element on the gold bump forming substrate. (B) Instead of the inner lead, the electrode of the semiconductor element is directly aligned with the gold bump and pressed. Mechanically and electrically joining,
(c) a semiconductor element with a gold bump is formed by separating the semiconductor element from the gold bump forming substrate to separate the gold bump from the gold bump forming substrate to form a semiconductor element with a gold bump. It is to position it at a corresponding position and connect it to an external circuit.

As a method of manufacturing a semiconductor element with gold bumps for this micro bump technique, one described in Japanese Patent Application Laid-Open No. 4-82226 (hereinafter referred to as a third prior art) is known. This will be described with reference to FIG. The gold bump forming substrate 22 is similar to the above two examples, but the insulating film 23
The height of the gold bumps 24 formed in the openings of the insulating film 23.
Slightly higher than the thickness of. Then, the insulating film 23 around the gold bumps 24 is not removed and joined to a semiconductor element (not shown). This is because the insulating film 23 prevents the gold bumps 24 from being deformed by the pressure applied when the semiconductor element and the gold bumps 24 are joined. By this method, a gold bump having a bump cap portion having a height within 1.5 times the height of the bump pillar portion is formed.

[0013]

However, these conventional methods of manufacturing inner leads with gold bumps have the following problems.

In the first prior art described above, the diameter of the bump cap portion of the gold bump formed because the insulating film 15 is thin is the total bump height of the gold bump (the height of the bump cap portion + the height of the bump pillar portion). It will be considerably larger than. Therefore,
For example, when it is attempted to reduce the diameter of the gold bump in order to cope with a semiconductor element in which the center interval between the electrodes is extremely narrow due to the large number of electrodes, the height of the bump also becomes low. Then, when the gold bump is transferred to the inner lead and further bonded to the electrode of the semiconductor element, the crushing margin of the gold bump (the deformable range of the bump due to the pressure at the time of bonding) is small and the inner lead and the surface of the semiconductor element are I can't get enough distance. Therefore, there is a risk that the inner leads will come into direct contact with the semiconductor element surface or the peripheral edge. Therefore, if the height of the gold bump is to be ensured to some extent, the diameter of the gold bump also becomes large. For this reason, the gold bump-formed substrate according to the first conventional technique cannot cope with the recent trend of narrowing the pitch of the electrodes of the semiconductor element.

The present inventors have also found that the gold bumps formed in the second prior art do not have a bump cap portion, so that a problem may occur when bonding to a semiconductor element. That is, in order to transfer the gold bumps to the inner leads, the tips of the inner leads of the film carrier are aligned with the gold bumps (FIG. 17), and the bonding tool 21 is used.
It heats while pressurizing with (FIG. 18), and it transfers to the inner lead side (FIG. 19). The base material of the inner lead is usually made of a conductive material such as copper foil, and the surface thereof is plated with gold, tin or solder. When the inner lead is tin-plated, gold-tin eutectic is generated by pressurizing and heating with the bonding tool 21, and thereby the gold bump and the inner lead are bonded. Also, when solder plating is applied to the inner leads, a similar eutectic crystal is generated and the gold bumps and the inner leads are joined.

The inventors of the present invention have a melting point lower than the surface temperature of a bonding tool (usually 280 to 350 ° C., which is referred to herein as a pressure welding temperature) when pressure welding a gold bump and an inner lead like tin or solder. When joining such gold bumps with an inner lead plated with a metal or alloy having a metal, it is possible that the above metal or alloy melted by the heating of the bonding tool may travel along the side surface of the bump pillar to the bottom surface of the bump. I found it. When the metal or alloy around the lower bottom surface of the bump wraps around, the gold of the gold bump and the aluminum of the electrode do not come into direct contact with each other when bonding to the electrode (generally made of aluminum) of the semiconductor element. Moreover, the metal or alloy for plating such as tin or solder does not form a strong alloy or eutectic with aluminum, so that the bonding strength between the gold bump and the electrode of the semiconductor element decreases.

When the gold-plated inner lead is used, such a problem does not occur, but the plating of tin or solder is more advantageous in terms of cost. Further, when such plating is applied, there is an advantage that bonding can be performed under a lower load and damage to the gold bump substrate can be reduced as compared with the case where gold plating is applied. Therefore, it is more advantageous to use the inner lead plated with tin or solder. Nevertheless, in the gold bump forming substrate according to the second conventional technique, the inner lead plated with tin, solder or the like cannot be used for the above reason.

According to the knowledge of the present inventors, when the gold bump forming substrate used in the method for manufacturing a semiconductor device with gold bumps according to the third conventional technique is applied to the transfer bump TAB technique, The problem described in 1. occurs.

That is, in the third conventional technique, Si
Since the insulating film such as O ₂ , Si ₃ N ₄ , and polyimide is bonded to the electrode of the semiconductor element while leaving the insulating film around the gold bump, the peeling property of the gold bump from the gold bump forming substrate is higher than that in the case without the insulating film. Pretty bad. In the third conventional technique, the gold bump is directly bonded to the electrode of the semiconductor element, and after the gold bump is bonded, the semiconductor element is separated from the gold bump formation substrate. At this time, even if the peelability of the gold bumps from the gold bump formation substrate was poor, since the semiconductor element has high rigidity, it did not deform, and there was no particular problem.

However, when the present inventors apply such a gold bump forming substrate to the transfer bump TAB technique,
It was found that the gold bumps could not be transferred well to the inner leads due to the poor releasability of the gold bumps from the gold bump forming substrate. In other words, when the bonding tool is separated from the inner lead after the gold bump is joined to the inner lead, the gold bump does not separate from the gold bump forming substrate because the releasability of the gold bump from the gold bump forming substrate is poor. In the case of the gold bump forming substrate used in the bump TAB technology, when the bonding tool is separated from the inner lead, a transfer failure occurs that the gold bump is separated from the gold bump forming substrate due to the elastic repulsive force of the inner lead.

Further, if the wall surface angle P (FIG. 21) of the opening portion of the insulating film forming the bump pillar portion is large, the problem that the transfer rate is lowered further occurs. For example, when the wall surface angle P is close to 90 degrees as shown in FIG. 22, the ratio of the area of the lower bottom to the area of the upper bottom of the bump pillar portion is close to 1. The larger the area of the lower bottom is, the worse the peelability of the gold bump from the conductive layer of the gold bump forming substrate becomes, and thus the transfer to the inner lead becomes difficult accordingly.

Usually, the gold bump formation substrate is reused after the formation of the gold bumps and used for the next gold bump formation. However, if the gold bumps are not completely transferred to the inner leads due to these reasons, the gold bumps that have not been transferred remain on the gold bump forming substrate. Thus
The gold bumps left on the gold bump formation substrate are not easily peeled off because they are embedded in the insulating film, and the gold bump formation substrate cannot be reused for the next gold bump formation.

When polyimide or the like is used for the insulating film, the gas component generated from the polyimide or the like due to the heat of the bonding tool during the transfer to the inner lead adheres to the bump, and the bonding force with the gold bump electrode is increased. There is a problem of decrease.

Therefore, it was difficult to apply such a gold bump forming substrate to the transfer bump TAB technique.

The present invention has been made in view of the above problems, and (a) is capable of coping with the narrow pitch of the electrodes of the semiconductor element,
(A) Even if the inner lead plated with tin or solder is used, the bonding strength to the electrode of the semiconductor element does not decrease due to the invasion of tin or solder to the bottom surface of the gold bump,
(C) Transfer of the gold bumps from the gold bump formation substrate is easy, and (D) Even if the transfer of the gold bumps to the inner leads is incomplete, the gold bump formation substrate can be reused.
An object of the present invention is to provide an inner lead with gold bumps, a method for manufacturing the same, and a semiconductor device having such an inner lead.

[0026]

In order to solve the above-mentioned problems, a method of manufacturing an inner lead with gold bumps according to the present invention comprises forming a conductive layer on one surface of an insulating substrate and forming an opening on the conductive layer. At least a gold bump having a bump cap portion and a bump pillar portion in the opening, and the height of the bump pillar portion is 0.5 times or more the total height of the bump. One of them is formed, the insulating layer is removed after the gold bump is formed, and the inner lead is pressed against the gold bump.

In a preferred embodiment of the method for manufacturing an inner lead with gold bumps of the present invention, the minor diameter of the upper bottom of the bump pillar portion of the gold bump is 0.5 times or more the minor diameter of the bump cap portion and is 0.8 or more. The feature is that the number of times is less than twice.

In a preferred embodiment of the method for producing an inner lead with gold bumps of the present invention, the inner lead is plated with a metal or alloy whose melting point is lower than the pressure contact temperature before pressure contact with the gold bump. It has a feature.

A preferred embodiment of the method of manufacturing the inner lead with gold bumps of the present invention is characterized in that the metal is tin.

A preferred embodiment of the method of manufacturing the inner lead with gold bumps of the present invention is characterized in that the alloy is solder.

Further, in a preferred aspect of the method for manufacturing an inner lead with gold bumps of the present invention, the minor axis of the bump cap portion of the gold bump before pressure contact with the inner lead is set to the center interval between the adjacent gold bumps. It is characterized in that it is 0.4 times or more and 0.6 times or less.

A preferred embodiment of the method of manufacturing the inner lead with gold bumps of the present invention is characterized in that the minimum center interval of the gold bumps is 120 μm or less.

In a preferred embodiment of the method of manufacturing the inner lead with gold bumps of the present invention, the minor diameter of the bump cap portion of the gold bump before pressure contact with the inner lead is 50 μm.
It is characterized in that it is m or less.

In a preferred embodiment of the method for manufacturing an inner lead with gold bumps of the present invention, the shorter diameter of the lower bottom of the bump pillar portion of the gold bump before the pressure contact with the inner lead corresponds to the upper bottom of the bump pillar portion. It is characterized by being 0.5 times or more and 1.0 times or less.

The inner lead with gold bumps of the present invention has a bump cap portion and a bump pillar portion, and the gold bump in which the height of the bump pillar portion is 0.5 times or more the total height of the bump is the inner lead. It is characterized by being pressed against.

Further, the inner lead with gold bumps of the present invention is further characterized in that the minor diameter of the upper bottom of the bump pillar portion is 0.5 times or more and 0.8 times or less the minor diameter of the bump cap portion. .

Further, the semiconductor element of the present invention is characterized in that the inner lead with gold bumps is pressed against the electrodes of the semiconductor element via the gold bumps. .

In the present invention, the planar shape of the bump cap portion and the bump column portion (a cross section when cut along a plane parallel to the surface of the gold bump forming substrate. Unless otherwise specified, the cross section having the maximum area is cut. ) Is circular, oval, square,
Any shape such as a rectangle, other polygons, or a combination thereof can be used. In order to increase the bonding strength between the inner leads and the gold bumps and between the gold bumps and the electrodes of the semiconductor element under the same semiconductor element electrode spacing, a shape with a large difference between the short diameter and the long diameter, such as a rectangle or an ellipse, should be used. preferable. This is because the plane minor dimension of the bump cap portion of the gold bump is defined by the electrode spacing of the semiconductor element, and a planar figure having the same minor axis and a larger major axis can have a larger area of the bonding portion.

Here, the minor axis of the plane figure means the center interval when the center (pointing the center of gravity of the plane figure) when the plane figures are arranged in a row so as to be in contact with each other without a gap, the center is the smallest. For example, the diameter of a circle corresponds to the shorter diameter of the ellipse, the shorter side of the square corresponds to the shorter side of the rectangle to the shorter diameter. Further, in the case of a figure as shown in FIG. 3 which is a general plane shape of a gold bump, D1 in the figure is set to a short diameter. In addition, the major axis of a plane figure is the length of a line segment created by cutting a straight line that passes through the center of the figure and is perpendicular to the direction that defines the minor axis at the point that intersects with the outer edge of the figure. Point to. For example, the diameter of a circle corresponds to the long diameter of an ellipse, the long side of a square corresponds to the long side thereof, and the long side of a rectangle corresponds to the short diameter.

In the present invention, the upper bottom of the bump pillar portion means the upper end of the bump pillar portion, that is, the boundary surface with the bump cap portion. On the other hand, the lower bottom of the bump pillar portion means a surface of the bump pillar portion that is in contact with the conductive layer of the gold bump forming substrate.

[0041]

According to the inner lead with gold bumps and the method of manufacturing the same of the present invention, the ratio of the minor diameter of the bump cap portion of the gold bump transferred and joined to the inner lead to the minor diameter of the upper bottom of the bump pillar portion is small, and Since the ratio of the height of the bump pillar portion to the minor axis of the bump pillar portion is large, it is possible to have a sufficient bump height even when the electrode interval of the semiconductor element is narrow (for example, 120 μm or less), and the bump is joined to the semiconductor element. In this case, problems such as contact of the inner lead with the surface of the semiconductor element are unlikely to occur.

Further, according to the inner lead with gold bumps and the method of manufacturing the same of the present invention, since the gold bumps to be transfer-bonded to the inner leads have bump cap portions of an appropriate size, tin or solder is used as the inner leads. Even if a metal or alloy with a low melting point such as is plated is used, the above metal or alloy does not wrap around the bottom surface of the bump,
Sufficient bonding strength can be reliably obtained when bonding to a semiconductor element. This is because the bump cap portion has a function of preventing the metal or alloy melted by the heating of the bonding tool from wrapping around. Therefore, since the semiconductor element of the present invention is firmly bonded to the inner lead, there is little malfunction or change with time.

Further, according to the method of manufacturing the inner lead with gold bumps of the present invention, when the inner lead and the gold bump are joined, there is no insulating film surrounding the bump pillar portion of the gold bump, so that the gold bump forming substrate is removed. The gold bumps of can be easily transferred to the inner leads. Even if untransferred to the inner leads, the gold bumps remaining on the gold bump formation substrate can be easily peeled off, and the gold bump formation substrate can be easily reused.

The shape of the gold bump used in the present invention before being bonded to the inner lead must be as follows. That is, a gold bump is used that has a bump cap portion and a bump pillar portion, and has a shape in which the height of the bump pillar portion is 0.5 times or more the total height of the bump. Further, it is preferable that the short diameter of the upper bottom of the bump pillar portion is 0.5 times or more and 0.8 times or less the short diameter of the bump cap portion. In addition, among the shapes of the respective portions of the gold bump, the shape of the bump pillar portion is usually the same as the shape of the opening portion of the insulating film of the gold bump forming substrate. Therefore, the minor axis and major axis of the upper and lower bottoms of the bump pillar portion match the minor axis and major axis of the upper and lower bottoms of the opening of the insulating film.

The reason for using the gold bump having such a shape will be described with reference to FIG. First, in order to secure a sufficient distance between the surface of the semiconductor element and the inner lead when the electrode of the semiconductor element and the inner lead with the gold bump are joined, the gold bump 3
It is necessary to increase the height of. Since the gold bumps 3 are usually formed by electroplating, if the height of the bump cap portion 3a is increased, the short diameter of the bump cap portion 3a must be increased at the same time. Since the minor axis of the bump cap portion 3a is defined as described later, the height (H1 in FIG. 2) of the bump pillar portion 3b of the gold bump 3 must be sufficiently set. Therefore, the height of the bump pillar portion 3b is set to be 0.5 times or more the total height of the bump and the height of the bump pillar portion 3b is relatively increased. Further, the minor diameter (D2 in FIG. 2) of the upper part of the bump pillar portion 3b of the gold bump 3 is set to 0.5 times or more the minor diameter of the bump cap portion 3a to make the ratio of the entire bump cap portion relatively low. Is preferred.

On the other hand, if the bump cap portion 3a is made too small, the effect of suppressing the entrainment of the molten metal or alloy due to the existence of the bump cap portion 3a is lost, so that the lower bottom of the bump pillar portion 3b of the gold bump is short. The diameter is preferably 0.8 times or less the minor axis of the bump cap portion 3a. Therefore, the preferable range of the minor axis of the bump pillar portion 3b is 0.5 times or more and 0.8 times or less the minor axis of the bump cap portion 3a.

At the same time, the minor diameter of the bump cap portion 3a of the gold bump 3 is restricted by the electrode spacing of the semiconductor element as described above. That is, in order to avoid the risk of contact with the adjacent gold bumps due to expansion caused by crushing at the time of joining with the inner lead and with the electrode of the semiconductor element, it is necessary to be somewhat smaller than the electrode interval of the semiconductor element. Therefore, it is preferable that the minor axis of the bump cap portion 3a be 0.6 times or less the center interval between the adjacent gold bumps. On the other hand,
From the viewpoint of increasing the bonding strength between the inner lead and the gold bump and between the gold bump and the electrode of the semiconductor element when the electrode spacing is narrow, it is preferably 0.4 times or more the center spacing between the adjacent gold bumps. Therefore, the minor axis of the bump cap portion 3a is 0.4 times or more the center interval between the adjacent gold bumps and is 0.6 or more.
It is preferably not more than double.

Further, when the center distance between the electrodes of the semiconductor is sufficiently wide, in order to enhance the releasability of the gold bumps 3 from the gold bump forming substrate and facilitate transfer, the bump cap portions 3a of the gold bumps 3 should be formed. The minor axis is preferably 50 μm or less.

Further, the minor diameter of the bottom of the bump pillar portion 3b of the gold bump 3 (D2 of FIG. 2) to the minor diameter of the lower bottom (D of FIG. 2).
The smaller the ratio of 3) is, the smaller the area of the bottom is, and the peelability between the gold bump and the gold bump forming substrate can be improved. Therefore, it is preferable that the shorter diameter of the lower bottom of the bump pillar portion 3b of the gold bump 3 is 1.0 times or less than the shorter diameter of the upper bottom. On the other hand,
If the shorter diameter of the lower bottom of the bump pillar portion 3b is too small, the bumps may overturn during bonding to the inner lead, or the bumps may be excessively crushed.
It is preferably 0.5 times or more, more preferably 0.8 times or more of the short diameter of the upper bottom. Therefore, the minor axis of the lower bottom of the bump pillar portion 3b of the gold bump 3 is smaller than the minor axis of the upper bottom of 0.
It is preferably 5 times or more and 1.0 times or less, and more preferably 0.8 times or more and 1.0 times or less of the minor axis of the upper bottom.

[0050]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the drawings.

Example 1 FIG. 1 is a schematic view showing a gold bump forming substrate used in one embodiment of the method for producing an inner lead with gold bumps of the present invention. Hereinafter, the planar shape of the lower bottom of the bump pillar portion is a square having a short diameter (D3 in FIG. 2) and a long diameter of 20 μm,
Inner leads with gold bumps using gold bumps having a bump pillar portion height (H1) of 20 μm and a bump cap portion minor diameter (D1) of 30 μm, a method of manufacturing the same, and a semiconductor element to which the inner leads are joined. An example of one embodiment will be described.

First, as shown in FIG. 4, Pt, ITO is deposited on the insulating substrate 1 such as glass by vapor deposition or sputtering.
A conductive layer 2 such as (indium / tin mixed oxide) was provided.
An insulating film 4 made of polyimide, photoresist, or the like is applied onto the conductive layer 2, and patterning is performed by photoetching or the like to form openings 5 at positions (center interval 60 μm) corresponding to the positions of the electrodes of the semiconductor element. . Pillar 3 of bump 3
The shape of b is determined by the shape of the opening 5. Therefore, the thickness of the insulating film 4 is set to 20 μm, and the minor axis and major axis of the lower bottom portion of the opening 5 are set to 20 μm. Other materials for the insulating film include SiO ₂ and Si ₃ N _4, but they are not suitable because they are difficult to peel from the substrate, and polyimide, photoresist, etc. are preferable, but the insulating film after gold bump formation is preferable. A photoresist is most preferable because it is easily peeled off.

Next, this substrate is placed on the counter electrode 6 as shown in FIG.
It was immersed in the plating tank 7 together with the electrolytic plating. The short diameter of the bump cap portion 3a is 10
In order to increase the thickness to 30 μm, which is larger by μm, after the pillar portion 3b was formed, the electrolytic plating was continued for a time ¼ of the time required for the pillar portion 3b. Thus, the gold bumps 3 were formed in the openings as shown in FIG. The total height of the formed gold bumps 3 was about 25 μm. Next, the insulating film 4 is replaced with acetone or N.
It was removed by a remover containing an organic solvent such as -methyl-2-pyrrolidone as a main component to obtain a gold bump forming substrate shown in FIG.

Next, the step of transferring the bumps to the inner leads will be described with reference to FIGS. First, as shown in FIG.
The gold bumps 3 and the inner leads 11 are aligned with each other, and then the inner leads 11 are heated with the bonding tool 12 as shown in FIG. The lead 11 was joined. After that, when the bonding tool 12 is separated,
Due to the elastic repulsive force of the inner lead 11, the gold bump 3 is transferred to the inner lead 11 as shown in FIG. In this way, an inner lead with gold bumps was manufactured.

Finally, the inner leads with gold bumps are positioned so that the gold bumps are aligned with the corresponding electrodes of the semiconductor element, and the inner leads with gold bumps are heated and pressed against the electrodes of the semiconductor element with a bonding tool. A semiconductor device having an inner lead with gold bumps was manufactured.

Example 2 Hereinafter, the planar shape of the bottom of the bump pillar portion has a short diameter (D in FIG. 2).
3) and a square with a major axis of 40 μm, the bump pillar height (H1) is 20 μm, and the total bump height is 25 μm.
An example of an embodiment of a method of manufacturing an inner lead with a gold bump using a gold bump having a m and a short diameter (D1) of the bump cap portion of 50 μm will be described.

The thickness of the conductive layer 4 in FIG. 4 is set to 20 μm, the short diameter and the long diameter of the lower bottom portion of the opening 5 are set to 40 μm, and the center interval of the openings 5 is 100 μm in accordance with the center interval of the electrodes of the semiconductor element. And In addition, the plating current is set to the value in Example 1 described above.
It was 4 times. Others were the same as in Example 1.

[0058]

INDUSTRIAL APPLICABILITY The inner leads with gold bumps according to the present invention, the manufacturing method thereof, and the semiconductor device having such inner leads exhibit the following excellent effects.

First, the gold bump to be used has a small short diameter as a whole, and at the same time has a high bump height, which causes a problem such as contact of the inner lead with the surface of the semiconductor element during bonding to the semiconductor element. Since it is difficult, it is possible to manufacture an inner lead with a gold bump that can be bonded to a semiconductor element having a narrow pitch electrode spacing.

Second, even when the inner leads plated with tin or solder are used for bonding, the bump cap portion of the gold bump can prevent tin or solder from wrapping around the bottom surface of the bump. It is possible to manufacture an inner lead with a gold bump that can obtain good bonding with an electrode of a semiconductor element. Therefore, the semiconductor device of the present invention is less likely to malfunction or change with time.

Third, since there is no insulating film around the gold bumps when the gold bumps and the inner leads are joined, the gold bumps can be easily transferred to the inner leads and the transfer yield can be increased.

Fourth, since there is no insulating film around the gold bumps when the gold bumps and the inner leads are joined, even if untransferred to the inner leads, the gold bumps remaining on the substrate are easily peeled off. Therefore, the substrate can be reused.

[Brief description of drawings]

FIG. 1 is a schematic view of a gold bump forming substrate used in one embodiment of a method of manufacturing an inner lead with gold bumps of the present invention.

FIG. 2 is a diagram showing the definition of dimensions of each part of the gold bump used in one embodiment of the method of manufacturing the inner lead with gold bump of the present invention.

FIG. 3 is a diagram showing the definition of the dimensions of the planar shape of the gold bump used in one embodiment of the method for manufacturing an inner lead with gold bumps of the present invention.

FIG. 4 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 5 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 6 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 7 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 8 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 9 is a schematic view showing a step in one embodiment of the method for producing the inner lead with gold bumps of the present invention.

FIG. 10 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 11 is a schematic view showing one step of a conventional method of manufacturing an inner lead with gold bumps.

FIG. 12 is a schematic view showing one step of a conventional method for manufacturing an inner lead with gold bumps.

FIG. 13 is a schematic view showing one step of a conventional method of manufacturing an inner lead with gold bumps.

FIG. 14 is a schematic view showing one step of a conventional method of manufacturing an inner lead with gold bumps.

FIG. 15 is a schematic view showing a step in a method of manufacturing a conventional inner lead with gold bumps.

FIG. 16 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 17 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 18 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 19 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 20 is a schematic view showing one step of a method of manufacturing a conventional inner lead with gold bumps.

FIG. 21 is a diagram showing the definition of the wall angle of the opening of the insulating film forming the bump pillar of the gold bump.

FIG. 22 is a schematic view showing a case where the wall angle of the opening portion of the insulating film forming the bump pillar portion of the gold bump is large.

[Explanation of symbols]

 1: Insulating substrate 2: Conductive layer 3: Gold bump 3a: Bump cap portion 3b: Bump pillar portion 4: Insulating film 5: Opening portion 6: Counter electrode 7: Plating bath 8: Plating solution 9: Heater 10: Constant temperature bath 11 : Inner lead 12: Bonding tool 13: Insulating substrate 14: Conductive layer 15: Insulating film 16: Gold bump 17: Gold bump forming substrate 18: Insulating film 19: Gold bump 20: Inner lead 21: Bonding tool 22: Gold bump forming Substrate 23: Insulating film 24: Gold bump

Claims (12)

[Claims] 1. A conductive layer is formed on one surface of an insulating substrate, an insulating layer having an opening is formed on the conductive layer, and a bump cap portion and a bump pillar portion are provided in the opening portion. In addition, at least one gold bump having a bump pillar height of 0.5 times or more of the total height of the bump is formed, the insulating layer is removed after the gold bump is formed, and the inner lead is pressed against the gold bump. A method of manufacturing an inner lead with a gold bump, which is characterized by the following. 2. The gold according to claim 1, wherein the minor diameter of the upper bottom of the bump pillar portion of the gold bump is 0.5 times or more and 0.8 times or less the minor diameter of the bump cap portion. Manufacturing method of inner lead with bump. 3. The inner lead with gold bumps according to claim 1, wherein the inner lead is plated with a metal or an alloy having a melting point lower than the pressure contact temperature before pressure contact with the gold bump. Manufacturing method. 4. The method of manufacturing an inner lead with gold bumps according to claim 3, wherein the metal is tin. 5. The method of manufacturing an inner lead with gold bumps according to claim 3, wherein the alloy is solder. 6. The minor axis of the bump cap portion of the gold bump before being pressed against the inner lead is 0.4 times or more and 0.6 times or less the center interval between the adjacent gold bumps. The method for manufacturing an inner lead with gold bumps according to claim 1, 2, 3, 4, or 5. 7. The minimum center interval of the gold bumps is 120 μm.
Claims 1, 2, 3, 4, 5, characterized in that
Alternatively, the method of manufacturing the inner lead with gold bumps according to Item 6. 8. The minor diameter of the bump cap portion of the gold bump before being pressed against the inner lead is set to 50 μm or less, as set forth in claim 1, 2, 3, 4, 5, 6 or 7. Of manufacturing inner leads with gold bumps. 9. The minor diameter of the lower bottom of the bump pillar portion of the gold bump before pressure contact with the inner lead is 0.5 times or more and 1.0 times or less than the minor diameter of the upper bottom of the bump pillar portion. The method for producing an inner lead with gold bumps according to claim 1, 2, 3, 4, 5, 6, 7 or 8. 10. An inner lead with a gold bump, wherein a gold bump having a bump cap portion and a bump pillar portion, and the height of the bump pillar portion is 0.5 times or more of the total height of the bump is pressed against the inner lead. . 11. The inner lead with gold bumps according to claim 10, wherein the minor diameter of the upper bottom of the bump pillar portion is 0.5 times or more and 0.8 times or less the minor diameter of the bump cap portion. . 12. A semiconductor element, wherein the inner lead with gold bumps according to claim 10 or 11 is pressed against an electrode of a semiconductor element via the gold bumps.