JPH07199229A - Mim element, active matrix substrate and liquid crystal display device - Google Patents
Mim element, active matrix substrate and liquid crystal display deviceInfo
- Publication number
- JPH07199229A JPH07199229A JP35050593A JP35050593A JPH07199229A JP H07199229 A JPH07199229 A JP H07199229A JP 35050593 A JP35050593 A JP 35050593A JP 35050593 A JP35050593 A JP 35050593A JP H07199229 A JPH07199229 A JP H07199229A
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- JP
- Japan
- Prior art keywords
- conductor
- layer
- insulator layer
- film
- adhesive layer
- Prior art date
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Links
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- 239000004020 conductor Substances 0.000 claims abstract description 64
- 239000012212 insulator Substances 0.000 claims abstract description 54
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- 239000005297 pyrex Substances 0.000 description 4
- 239000002994 raw material Substances 0.000 description 4
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- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
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- 229910052715 tantalum Inorganic materials 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
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- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 238000001069 Raman spectroscopy Methods 0.000 description 1
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- IDCBOTIENDVCBQ-UHFFFAOYSA-N TEPP Chemical compound CCOP(=O)(OCC)OP(=O)(OCC)OCC IDCBOTIENDVCBQ-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052783 alkali metal Inorganic materials 0.000 description 1
- 150000001340 alkali metals Chemical class 0.000 description 1
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Landscapes
- Liquid Crystal (AREA)
Abstract
Description
【0001】[0001]
【技術分野】本発明はアクティブマトリックス基板に関
し、詳しくは、ワードプロセッサやパーソナルコンピュ
ータ、電子ブック等のフラットパネルディスプレイ等に
好適に使用しうるアクティブマトリックス基板、特に液
晶表示装置のスイッチング素子として有用なアクティブ
マトリックス基板と該アクティブマトリックス基板を用
いた液晶表示装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix substrate, and more particularly, to an active matrix substrate that can be suitably used for a word processor, a personal computer, a flat panel display such as an electronic book and the like, and particularly an active matrix useful as a switching element of a liquid crystal display device. The present invention relates to a substrate and a liquid crystal display device using the active matrix substrate.
【0002】[0002]
【従来技術】近年、液晶表示装置は薄型軽量で、消費電
力が小さいという特色をもっていることから、ディスプ
レイとしての市場が急速に大きくなっている。特にOA
機器やTVには大面積液晶ディスプレイ使用の要望が強
く、そのため、アクティブマトリックス方式では各画素
ごとにスイッチング素子を設け電圧を印加するように工
夫されている。前記スイッチング素子の一つとして薄膜
二端子素子が多く使われている。これは薄膜二端子素子
がスイッチングに好適な非線形の電流−電圧特性を示す
ためである。従来からの二端子素子はガラスなどの絶縁
性基板上に下部電極としてAl、Ta、Ti、Cr等の
金属電極を設け、その上に前記金属の酸化物、窒化物あ
るいは絶縁膜を設け、更にその上に上部電極としてA
l、Ni、Cr等の金属電極を設けたMIM(Meta
l−Insurator−Metal)素子などが知ら
れている。MIM素子を用いて、液晶表示装置の中間調
表示を行う場合には液晶への印加電圧はあるフレームの
走査期間内で時定数CLC・RON(液晶容量・MIM素子
のオン抵抗)により充電され、これによって液晶が駆動
される。また特に、絶縁膜に金属酸化物を用いた薄膜二
端子素子(特開昭57−196589号、同62−62
333号等の公報に記載)の場合、絶縁膜は下部電極の
陽極酸化または熱酸化により形成されるため、工程が複
雑であり、しかも高温熱処理を必要とし、また膜の制御
性(膜質及び膜厚の均一性及び再現性)に劣る上、基板
が耐熱材料に限られること、および、絶縁膜は物性が一
定な金属酸化物からなることなどから、素子の材料や特
性を自由に変えることが出来ず、設計上の自由度が狭い
という欠点がある。これはアクティブマトリックス基板
を用いた液晶表示装置からの仕様を充分に満たすデバイ
スを設計、作製することが困難であることを意味する。
またこのように膜制御性が悪いと、素子特性としてのI
−V特性やI−V特性の対称性(プラスバイアス時とマ
イナスバイアス時の電流比)のバラツキが大きくなると
いう問題も生じる。その他、MIM素子を液晶表示装置
に使用する場合液晶部容量/MIM素子容量比は一般に
10以上が望ましいが、金属酸化物の場合は誘電率が大
きいことから素子容量も大きくなり、従って素子容量を
減少させること、即ち素子面積を小さくするための微細
加工を必要とする。またこの場合、液晶材料封入前のラ
ビング工程等で絶縁膜が機械的損傷を受けることによ
り、微細加工とも相まって歩留まり低下を来たすという
問題もある。ツイストネマチック、スーパーツイストネ
チック方式の液晶表示装置は、電圧による液晶のネマチ
ック相の複屈折変化を利用する。通常のツイストネマチ
ック液晶表示装置では、あらかじめ表面に配向層を設
け、綿、ナイロン、テトロン製のラビング布などで配向
処理を施した上下の基板の周辺をシールし配向処理面を
内側にして貼りあわせた空セルを作製し、その注入口か
ら液晶を注入する。一般に液晶表示素子の基板間隔を保
持するためには、球形あるいは棒状のプラスチックまた
はガラス製のスペーサを配向処理した後の基板上に散布
したり、非画素部に突起を設けるなどしていた。従来技
術ではアクティブマトリックス基板作製時に、第一導体
と絶縁体層の組合せによっては、所定の形状にパターン
を形成した第一導体上に蒸着法、スパッタリング法、C
VD(Chemical Vapor Deposit
ion、化学気相成長)法などを用いて絶縁体層を作製
する際に、絶縁体層の付着力が不足して、膜剥がれが起
きることがある。あるいは液晶表示装置完成後に徐々に
微視的な剥離が生じ経時的信頼性が劣る場合がある。2. Description of the Related Art In recent years, liquid crystal display devices are thin, lightweight, and have low power consumption, so that the market as a display is rapidly expanding. Especially OA
There is a strong demand for the use of a large-area liquid crystal display in devices and TVs. Therefore, in the active matrix system, a switching element is provided for each pixel to apply a voltage. A thin film two-terminal device is often used as one of the switching devices. This is because the thin film two-terminal element exhibits a non-linear current-voltage characteristic suitable for switching. In the conventional two-terminal element, a metal electrode of Al, Ta, Ti, Cr or the like is provided as a lower electrode on an insulating substrate such as glass, and an oxide, nitride or insulating film of the metal is provided thereon. A as the upper electrode
MIM (Meta) with metal electrodes such as 1, Ni, Cr, etc.
An l-Insulator-Metal) element and the like are known. When performing halftone display of the liquid crystal display device using the MIM element, the voltage applied to the liquid crystal is charged by the time constant C LC · R ON (liquid crystal capacitance · ON resistance of the MIM element) within the scanning period of a frame. The liquid crystal is driven by this. Further, in particular, a thin film two-terminal element using a metal oxide as an insulating film (JP-A-57-196589 and 62-62).
No. 333), the insulating film is formed by anodic oxidation or thermal oxidation of the lower electrode, so the process is complicated, high temperature heat treatment is required, and the controllability (film quality and film quality) The uniformity and reproducibility of thickness are poor, and because the substrate is limited to heat-resistant materials, and because the insulating film is made of metal oxide with constant physical properties, it is possible to freely change the material and characteristics of the element. There is a drawback that it cannot be done and the degree of freedom in design is narrow. This means that it is difficult to design and manufacture a device that sufficiently satisfies the specifications from the liquid crystal display device using the active matrix substrate.
If the film controllability is poor, I
There is also a problem that the symmetry of the −V characteristic and the IV characteristic (the current ratio between the positive bias and the negative bias) becomes large. In addition, when the MIM element is used in a liquid crystal display device, the liquid crystal part capacitance / MIM element capacitance ratio is generally desired to be 10 or more, but in the case of a metal oxide, the element capacitance is large because the dielectric constant is large, and therefore the element capacitance is It requires reduction, that is, fine processing for reducing the element area. Further, in this case, there is also a problem that the insulating film is mechanically damaged in a rubbing process before encapsulating the liquid crystal material and the yield is reduced together with the fine processing. The twisted nematic and super twisted nematic liquid crystal display devices utilize the birefringence change of the nematic phase of liquid crystal due to voltage. In a normal twisted nematic liquid crystal display device, an alignment layer is provided on the surface in advance, and the upper and lower substrates that have been subjected to the alignment treatment with a rubbing cloth made of cotton, nylon, tetron, etc. are sealed and the alignment treated surface is placed inside. An empty cell is prepared, and liquid crystal is injected through the injection port. Generally, in order to maintain the space between the substrates of the liquid crystal display element, spherical or rod-shaped spacers made of plastic or glass are dispersed on the substrate after the alignment treatment, or projections are provided on the non-pixel portions. In the prior art, when manufacturing an active matrix substrate, depending on the combination of the first conductor and the insulating layer, a vapor deposition method, a sputtering method, a C method, or the like may be performed on the first conductor having a pattern formed in a predetermined shape.
VD (Chemical Vapor Deposition)
ion, chemical vapor deposition) method or the like to form an insulator layer, the adhesion of the insulator layer may be insufficient and film peeling may occur. Alternatively, after completion of the liquid crystal display device, microscopic peeling may occur gradually and the reliability over time may deteriorate.
【0003】[0003]
【目的】本発明は、MIM素子の電極を構成する導体と
絶縁体層の剥離を防止したMIM素子の提供、および該
MIM素子を使用することにより、特性変化がなく、長
期安定性や信頼性の向上したアクティブマトリックス基
板および液晶表示装置の提供を目的とする。An object of the present invention is to provide a MIM element in which a conductor forming an electrode of an MIM element and an insulating layer are prevented from being separated from each other, and by using the MIM element, there is no characteristic change and long-term stability and reliability. It is an object of the present invention to provide an improved active matrix substrate and liquid crystal display device.
【0004】[0004]
【構成】本発明は、第一導体(下部電極)と第二導体
(上部電極)の間に絶縁体層を介在させたMIM素子に
おいて、第一導体および/または第二導体と絶縁体層の
間に該導体および絶縁体層に対し付着力を示す接着層を
介在させるか、絶縁体層の形成前に第一導体の表面を絶
縁体層に対する付着力を向上させることによって、前記
目的を達成した。本発明におけるMIM素子の接着層は
第一導体および/または第二導体への付着力が良く、ま
た、絶縁体層の接着層に対する付着力が強い物質で構成
されることが好ましく、該物質としては、配線抵抗が増
大するために第一導体として好ましく用いることができ
なくとも、絶縁体層の下地として前記絶縁体と強固な付
着力を示す金属または合金、あるいは絶縁体と第一導体
の任意の比率で混合した合金もしくは混晶、混合物が好
適に用いられる。もしくは良好な電圧−電流特性を示さ
ずアクティブマトリックス基板の絶縁体層として好まし
くないが第一導体と良好な付着力を示す絶縁性もしくは
半絶縁性の薄膜を用いることもできる。接着層は、導体
および絶縁体層を構成する材料の構成元素から選ばれた
元素を構成成分とする材料で構成されたものが良好な付
着力を示し好ましい。接着層と絶縁体層の付着力をさら
に強固にするためには接着層形成後に数十℃から数百℃
程度の熱処理、プラズマ処理を加えるなどにより、接着
層と第一導体を相互拡散や浸透を促進させることができ
る。あるいは絶縁体層形成前に、第一導体表面を、A
r、N2、H2等のプラズマで処理する、酸で洗浄する、
紫外線やオゾン照射するなどして最表面の清浄度を高め
たり、表面を活性化させたり、表面凹凸を増大させるこ
となどによっても、絶縁体層の第一導体に対する付着力
を向上させることができる。前記のように第一導体およ
び/または第二導体と絶縁体層の間に、接着層を設ける
ことにより、第一導体/接着層、接着層/絶縁体層、絶
縁体層/第二導体等の界面の付着力を高めることができ
るので絶縁層の剥離を防止し、またアクティブマトリッ
クス基板や液晶表示装置完成後の特性変化の無い、長期
的安定性や信頼性を向上させることができる。ただし第
一導体と絶縁体層の間に接着層を設けたことにより、素
子の電流−電圧特性が正負電圧で非対称になる場合も有
るため、第一導体と絶縁体層の間に設けた接着層と実質
的に同じ材料で作製した第二の接着層を絶縁体層と第二
導体の間に設けることにより、素子特性の対称性を良く
し、液晶表示装置における、液晶駆動時の表示特性や信
頼性をさらに向上させることができる。絶縁体層と接着
層は、通常フォトリソグラフィ法によって所定の形状に
加工して作製されるが、その際に同じレジストパターン
を用いて連続的に成膜し、また同時にエッチングするこ
とにより、工程数の低減を図り、生産性を向上させるこ
とができる。また、特に絶縁体層と接着層として硬質炭
素膜を用いるこにより、接着層に必要な第一導体および
/または第二導体に対する十分な付着力がえられ、また
絶縁体層として素子特性制御の範囲が広く、加えて、他
の絶縁膜と比較して低温でしかも簡単な工程で形成で
き、また、膜制御性および機械的強度に優れた低誘電率
の絶縁膜を使用することにより、広範囲のデバイス設計
が可能となる。さらに液晶駆動電圧のマージンが広がり
多階調表示可能な液晶表示装置の提供が可能となる。The present invention relates to a MIM element in which an insulator layer is interposed between a first conductor (lower electrode) and a second conductor (upper electrode), and the first conductor and / or the second conductor and the insulator layer are The above-mentioned object is achieved by interposing an adhesive layer showing adhesion to the conductor and the insulator layer between them or improving the adhesion of the surface of the first conductor to the insulator layer before forming the insulator layer. did. The adhesive layer of the MIM element in the present invention is preferably composed of a substance having a good adhesive force to the first conductor and / or the second conductor and a strong adhesive force to the adhesive layer of the insulator layer. Is a metal or alloy that exhibits strong adhesion to the insulator as a base of the insulator layer even if it cannot be preferably used as the first conductor due to an increase in wiring resistance, or any of the insulator and the first conductor. An alloy, a mixed crystal, or a mixture mixed in the ratio of is preferably used. Alternatively, an insulating or semi-insulating thin film which does not show good voltage-current characteristics and is not preferable as the insulating layer of the active matrix substrate but shows good adhesion to the first conductor can be used. The adhesive layer is preferably composed of a material having an element selected from the constituent elements of the material forming the conductor and the insulator layer as a good adhesive force. In order to further strengthen the adhesive force between the adhesive layer and the insulator layer, dozens of degrees Celsius to several hundred degrees Celsius after the adhesive layer is formed
Mutual diffusion and permeation of the adhesive layer and the first conductor can be promoted by applying a heat treatment or plasma treatment to some extent. Alternatively, before forming the insulator layer, the first conductor surface is
r, N 2 , H 2 etc. plasma treatment, acid cleaning,
The adhesion of the insulator layer to the first conductor can also be improved by increasing the cleanliness of the outermost surface by irradiating ultraviolet rays or ozone, activating the surface, or increasing the surface irregularities. . By providing an adhesive layer between the first conductor and / or the second conductor and the insulator layer as described above, the first conductor / adhesive layer, the adhesive layer / insulator layer, the insulator layer / second conductor, etc. It is possible to prevent the peeling of the insulating layer because the adhesive force at the interface of the active matrix substrate can be increased, and the long-term stability and reliability can be improved without changing the characteristics after completion of the active matrix substrate or the liquid crystal display device. However, since an adhesive layer may be provided between the first conductor and the insulator layer, the current-voltage characteristics of the device may become asymmetric between positive and negative voltages. By providing a second adhesive layer made of substantially the same material as the insulating layer between the insulator layer and the second conductor, the symmetry of the device characteristics is improved, and the display characteristics when driving the liquid crystal in the liquid crystal display device. And reliability can be further improved. The insulator layer and the adhesive layer are usually processed into a predetermined shape by photolithography, and at that time, the same resist pattern is used to continuously form a film and simultaneously etch it, thereby increasing the number of steps. Can be reduced and productivity can be improved. Further, in particular, by using a hard carbon film as the insulating layer and the adhesive layer, sufficient adhesive force to the first conductor and / or the second conductor necessary for the adhesive layer can be obtained, and the insulating layer can be used for controlling the device characteristics. In addition to having a wide range, it can be formed at a low temperature and in a simple process compared to other insulating films, and by using an insulating film with a low dielectric constant excellent in film controllability and mechanical strength, a wide range can be obtained. Device design is possible. Further, it is possible to provide a liquid crystal display device in which the margin of the liquid crystal drive voltage is widened and which can display a multi-gradation.
【0005】このアクティブマトリックス基板の絶縁体
層はSiNx、SiOx、SiCx、Al2O3、Ta2
O3、硬質炭素、ポリイミド、ポリエチレン、ポリスチ
レン等を、スパッタリング、蒸着法、陽極酸化法、プラ
ズマCVD、プラズマ重合法あるいは塗布法等の方法に
より形成することが出来る。本発明のアクティブマトリ
ックス基板における絶縁体層は比較的膜物性(ε・ρ)
の制御が自由にできる硬質炭素膜で形成されているのが
有利である。絶縁体層として硬質炭素膜を用いることに
より、素子特性制御範囲が広く、加えて、他の絶縁体層
と比較して低温でしかも簡単な工程で形成できる。ま
た、絶縁膜を構成する層として硬質炭素膜を用いた場合
この膜は 1)プラズマCVD法等の気相合成法で作製されるた
め、成膜条件によって物性が広範囲に制御でき、従って
デバイス設計の自由度が大きい、 2)硬質でしかも厚膜にできるため、機械的損傷を受け
がたく、また厚膜化によるピンホールの減少も期待でき
る、 3)室温付近の低温においても良質な膜を形成できるの
で、基板材質に制約がない、 4)膜厚、膜質の均一性に優れているため、薄膜デバイ
ス用として適している、 5)誘電率が低いので、高度の微細加工技術を必要とせ
ず、したがって素子の大面積化に有利である、 等の特徴を有し、このような絶縁膜を用いた薄膜二端子
素子は液晶表示用スイッチング素子として好適である。
図1及び図2で表されたアクティブマトリックス基板上
の薄膜二端子素子の電流電圧特性(I−V特性)を調べ
てみると、この特性は近似的に以下に示すような伝導式
で表される。The insulating layer of this active matrix substrate is made of SiNx, SiOx, SiCx, Al 2 O 3 , Ta 2
O 3 , hard carbon, polyimide, polyethylene, polystyrene and the like can be formed by a method such as sputtering, vapor deposition, anodic oxidation, plasma CVD, plasma polymerization or coating. The insulator layer in the active matrix substrate of the present invention has a relatively physical property (ε · ρ)
It is advantageous that it is formed of a hard carbon film that can be freely controlled. By using the hard carbon film as the insulator layer, the element characteristic control range is wide, and in addition, it can be formed at a low temperature and in a simple process as compared with other insulator layers. Further, when a hard carbon film is used as a layer forming the insulating film, this film is produced by 1) a vapor phase synthesis method such as a plasma CVD method, so that the physical properties can be controlled in a wide range depending on the film forming conditions, and thus the device design 2) It has a high degree of freedom. 2) It is hard and can be made into a thick film, so it is not susceptible to mechanical damage, and pinholes can be expected to be reduced by increasing the film thickness. 3) A good quality film can be obtained even at low temperatures near room temperature. Since it can be formed, there is no restriction on the substrate material. 4) It is suitable for thin film devices because it has excellent uniformity in film thickness and film quality. 5) It has a low dielectric constant, so it requires advanced fine processing technology. Therefore, the thin-film two-terminal element using such an insulating film is suitable as a switching element for liquid crystal display.
When the current-voltage characteristic (IV characteristic) of the thin film two-terminal element on the active matrix substrate shown in FIGS. 1 and 2 is examined, this characteristic is approximately expressed by the following conductive equation. It
【数1】 I:電流 V:印加電圧 κ:導電係数 β:プールフ
レンケル係数 n:キャリア密度 μ:キャリアモビリティ q:電子
の電荷量 Φ:トラップ深さ ρ:比抵抗 d:絶縁膜の膜厚 k:ボルツマン定数 T:雰囲気温度 ε:絶縁膜の比
誘電率[Equation 1] I: current V: applied voltage κ: conductivity coefficient β: pool Frenkel coefficient n: carrier density μ: carrier mobility q: electron charge amount Φ: trap depth ρ: specific resistance d: insulating film thickness k: Boltzmann constant T: Atmospheric temperature ε: Dielectric constant of insulating film
【0006】次に本発明において絶縁膜として好適に用
いられる硬質炭素膜について詳しく説明する。この膜
は、炭素および水素原子を主要な組織形成元素として非
晶質及び微結晶の少なくとも一方を含む硬質炭素膜(i
−C膜、ダイヤモンド状炭素膜、アモルファスダイヤモ
ンド膜、ダイヤモンド薄膜とも呼ばれる)からなってい
る。硬質炭素膜の一つの特徴は気相成長膜であるがため
に、後述するように、その諸物性が成膜条件によって広
範囲に制御できることである。従って、絶縁膜といって
もその抵抗値は半絶縁体から絶縁体までの領域をカバー
しており、この意味では本発明の薄膜二端子素子はMI
M素子はもちろんのこと、それ意外でも例えば、特開昭
61−260219号公報で言うところのMSI素子
(Meta1−Sem−Insurator)やSIS
(半導体−絶縁体−半導体であって、ここでの「半導
体」は不純物を高濃度にドープさせたものである)とし
ても位置付けられるものである。なお、この硬質炭素膜
中には、さらに物性制御範囲を広げるために、構成元素
の一つとして少なくとも周期律表第III属元素を全構成
元素に対し、5原子%以下、同じく第IV属元素を35原
子%以下、同じく第V属元素を5原子%以下、アルカリ
土類金属元素を5原子%以下、アルカリ金属元素を5原
子%以下、窒素原子を5原子%以下、酸素原子を5原子
%以下、カルコゲン元素を35原子%以下、またはハロ
ゲン元素を35原子%以下の量で含有させても良い。こ
れら元素または原子の量は元素分析の常法、例えばオー
ジェ分析によって測定することができる。または、この
量の多少は原料ガスに含まれる他の化合物の量や成膜条
件で調節可能である。こうして硬質炭素膜を形成するた
めには有機化合物ガス、特に炭化水素ガスが用いられ
る。これら原料における相状態は常温常圧において必ず
しも気相である必要はなく、加熱あるいは減圧等により
溶融、蒸発、昇華を経て気化しうるものであれば、液相
でも固相でも使用可能である。原料ガスとしての炭化水
素ガスについては、例えばCH4、C3H8、C4H10等の
パラフィン系炭化水素、C2H4等のオレフィン系炭化水
素、ジオレフィン系炭化水素、アセチレン系炭化水素、
さらには芳香族炭化水素など全ての炭化水素を少なくと
も含むガスが使用可能である。Next, the hard carbon film suitably used as the insulating film in the present invention will be described in detail. This film is a hard carbon film (i.e., amorphous and / or microcrystalline) containing carbon and hydrogen atoms as main texture-forming elements.
-C film, diamond-like carbon film, amorphous diamond film, and diamond thin film). One characteristic of the hard carbon film is that it is a vapor phase growth film, and as described later, its physical properties can be controlled in a wide range depending on the film forming conditions. Therefore, even if it is called an insulating film, its resistance value covers the region from the semi-insulator to the insulator, and in this sense, the thin film two-terminal element of the present invention is MI.
Not only the M element, but also unexpectedly, for example, the MSI element (Meta1-Sem-Insulator) or SIS referred to in JP-A-61-260219.
It is also positioned as (semiconductor-insulator-semiconductor, in which "semiconductor" is doped with impurities at a high concentration). In addition, in order to further expand the physical property control range in this hard carbon film, at least 5 atomic% or less of Group III elements of the periodic table as one of the constituent elements relative to all the constituent elements, also the same Group IV element 35 atomic% or less, also Group V element 5 atomic% or less, alkaline earth metal element 5 atomic% or less, alkali metal element 5 atomic% or less, nitrogen atom 5 atomic% or less, oxygen atom 5 atomic% %, A chalcogen element may be included in an amount of 35 atomic% or less, or a halogen element may be included in an amount of 35 atomic% or less. The amount of these elements or atoms can be measured by a conventional elemental analysis method, for example, Auger analysis. Alternatively, this amount can be adjusted to some extent by the amount of other compound contained in the source gas and the film forming conditions. An organic compound gas, particularly a hydrocarbon gas, is used to form the hard carbon film in this way. The phase state of these raw materials does not necessarily have to be a gas phase at room temperature and atmospheric pressure, and a liquid phase or a solid phase can be used as long as it can be vaporized by being melted, evaporated, sublimated by heating or decompressing. Examples of the hydrocarbon gas as the raw material gas include paraffin hydrocarbons such as CH 4 , C 3 H 8 and C 4 H 10 , olefin hydrocarbons such as C 2 H 4 , diolefin hydrocarbons and acetylene carbon. hydrogen,
Furthermore, a gas containing at least all hydrocarbons such as aromatic hydrocarbons can be used.
【0007】本発明における原料ガスからの硬質炭素膜
の形成方法としては、成膜活性種が、直流、低周波、高
周波、あるいはマイクロ波等を用いたプラズマ法により
生成されるプラズマ状態を経て形成される方法が好まし
いが、より大面積化、均一性向上および/または低温成
膜の目的で低圧下で堆積を行わせしめるのには磁界効果
を利用する方法がさらに好ましい。また、高温における
熱分解によっても活性種を形成できる。その他にも、イ
オン化蒸着法、あるいはイオンビーム蒸着法等により生
成されるイオン状態を経て形成されても良いし、真空蒸
着法、あるいはスパッタリング法等により生成される中
性粒子から形成されても良いし、さらには、これらの組
合せにより形成されても良い。こうして作製される硬質
炭素膜の堆積条件の一例はプラズマCVDの場合、概ね
次の通りである。 RF出力:0.01〜50W/cm2 圧 力:10-3〜10Torr 堆積温度:室温〜950℃で行うことができるが、好ま
しくは室温〜300℃。 このプラズマ状態により原料ガスがラジカルとイオンに
分解され反応することによって、基板上に炭素原子Cと
水素原子Hとからなるアモルファス(非晶質)及び微結
晶(結晶の大きさは数nmから数μm)の少なくとも一
方を含む硬質炭素膜が堆積する。硬質炭素膜の諸特性を
表1に示す。As a method of forming a hard carbon film from a raw material gas in the present invention, a film formation active species is formed through a plasma state generated by a plasma method using direct current, low frequency, high frequency, or microwave. The above method is preferable, but a method utilizing a magnetic field effect is more preferable for causing deposition under a low pressure for the purpose of increasing the area, improving the uniformity and / or forming a film at a low temperature. In addition, active species can also be formed by thermal decomposition at high temperature. Besides, it may be formed through an ion state generated by an ionization vapor deposition method, an ion beam vapor deposition method or the like, or may be formed from neutral particles generated by a vacuum vapor deposition method, a sputtering method or the like. However, it may be formed by a combination thereof. In the case of plasma CVD, an example of the deposition conditions of the hard carbon film thus manufactured is as follows. RF output: 0.01 to 50 W / cm 2 Pressure: 10 −3 to 10 Torr Deposition temperature: Room temperature to 950 ° C., preferably room temperature to 300 ° C. The raw material gas is decomposed into radicals and ions by this plasma state and reacts with each other, so that amorphous (amorphous) and microcrystalline (crystal size is several nm to several nm) consisting of carbon atoms C and hydrogen atoms H on the substrate. a hard carbon film containing at least one of Table 1 shows various characteristics of the hard carbon film.
【0008】[0008]
【表1】 注)測定法: 比抵抗(ρ):コプレナー型セルによるI−V特性より
求める。 光学的バンドギャップ(Egopt):分光特性から吸
収係数(α)を求め (αhν)1/2 =β(hν−Egopt) の関係より決定する。 膜中水素量〔C(H)〕:赤外吸収スペクトルから29
00cm-1付近のピークを積分し吸収断面積Aをかけて
求める。すなわち、 〔C(H)〕=A・∫α(ν)/ν・dν SP3/SP2比:赤外吸収スペクトルをSP3、SP2に
それぞれ帰属されるガウス関数に分解し、その面積比よ
り求める。 ビッカース硬度(H):マイクロビッカーズ計による。 屈折率(n):エリプソメーターによる。 欠陥密度:ESRによる。[Table 1] Note) Measurement method: Specific resistance (ρ): Determined from IV characteristics of a coplanar cell. Optical bandgap (Egopt): The absorption coefficient (α) is obtained from the spectral characteristics, and is determined from the relationship of (αhν) 1/2 = β (hν-Egopt). Amount of hydrogen in film [C (H)]: 29 from infrared absorption spectrum
The peak around 00 cm -1 is integrated and the absorption cross section A is multiplied to obtain. That is, [C (H)] = A · ∫α (ν) / ν · dν SP 3 / SP 2 ratio: the infrared absorption spectrum is decomposed into Gaussian functions assigned to SP 3 and SP 2 , respectively, and its area Calculate from the ratio. Vickers hardness (H): According to a micro Vickers meter. Refractive index (n): By ellipsometer. Defect density: According to ESR.
【0009】こうして形成される硬質炭素膜はIR吸収
法およびラマン分光法による分析の結果、それぞれ図4
および図5に示すように炭素原子がSP3の混成軌道と
SP2の混成軌道とを形成した原子間結合が混在してい
ることが明らかになっている。SP3結合とSP2結合の
比率は、IRスペクトルをピーク分離することで概ね推
定できる。IRスペクトルには、2800〜3150c
m-1に多くのモードのスペクトルが重なって測定される
が、それぞれの波数に対応するピークの帰属は明らかに
なっており、図5に示したごときガウス分布によってピ
ーク分離を行い、それぞれのピーク面積を算出し、その
比率を求めればSP3/SP2を知ることができる。ま
た、前記の硬質炭素膜は、X線及び電子線回折分析によ
ればアモルファス状態(a−C:H)、及び/又は約1
0Å〜数μm程度の微結晶粒を含むアモルファス状態に
あることがわかる。一般に量産に適しているプラスマC
VD法の場合には、RF出力が小さいほど膜の比抵抗値
及び硬度が増加し、また低圧力なほど活性種の寿命が増
加するために、基板温度の低温化、大面積での均一化が
図られ、かつ比抵抗、硬度が増加する傾向に有る。更
に、低圧力ではプラズマ密度が減少するため、磁場閉じ
込め効果を利用する方法は、比抵抗の増加には特に効果
的である。更にまた、この方法(プラズマCVD法)は
常温〜150℃程度の比較的低い温度条件でも同様に良
質の硬質炭素膜を形成できるという特徴を有しているた
め、薄膜二端子素子製造プロスセの低温化には最適であ
る。従って、使用する基板材料の選択自由度が広がり、
基板温度をコントロールしやすいために均一な膜が得ら
れるという特徴を持っている。硬質炭素膜の構造、物性
は表1に示したように、広範囲に制御可能であるため、
デバイス特性を自由に設計できる利点も有る。さらには
膜の誘電率も3〜5と従来のMIMに使用されていたT
a2O5、Al2O3、SiNxなどと比較して小さいた
め、同じ電気容量を持った素子を作る場合、素子サイズ
が大きくても済むので、それほど微細加工を必要とせ
ず、歩留まりが向上する(駆動条件の関係からLCDと
MIMの容量比はCLCD/CMIM=10:1程度必要であ
る。)。さらに膜の硬度が高いため、液晶材料封入時の
ラビング工程による素子の損傷が少なく、この点からも
歩留まりが向上する。液晶駆動用薄膜二端子素子として
好適な硬質炭素膜は、駆動条件から膜厚が100〜80
00Å、比抵抗が106〜1012Ω・cmの範囲である
ことが有利である。なお、駆動電圧と耐圧(絶縁破壊電
圧)とのマージンを考慮すると膜厚は200Å以上であ
ることが望ましく、また、画素部と薄膜二端子素子の段
差(セルギャップ差)に起因する色ムラが実用上問題と
ならないようにするには膜厚は6000Å以下であるこ
とが望ましいことから、硬質炭素膜の膜厚は200〜6
000Å、比抵抗は5×105〜1012Ωcmであるこ
とがより好ましい。硬質炭素膜のピンホールによる素子
の欠陥数は膜厚の減少にともなって増加し、300Å以
下では特に顕著になること(欠陥数は1%を超える)、
及び、膜厚の面内均一性は(ひいては素子特性の均一
性)が確保できなくなる(膜厚制御の精度は30Å程度
が限度で、膜厚のバラツキが10%を超える)ことか
ら、膜厚は300Å以上であることがより望ましい。ま
た、ストレスによる硬質炭素膜の剥離が起こりにくくす
るため、及び、より低デューティ比(望ましは1/10
00以下)で駆動するために、膜厚は4000Å以下で
あることがより好ましい。これらを総合して考慮する
と、硬質炭素膜の膜厚は300〜4000Å、比抵抗は
107〜1011Ω・cmであることが一層好ましい。The hard carbon film thus formed was analyzed by the IR absorption method and the Raman spectroscopy, and the results are shown in FIG.
As shown in FIG. 5 and FIG. 5, it has been clarified that interatomic bonds in which carbon atoms form a hybrid orbital of SP 3 and a hybrid orbital of SP 2 are mixed. The ratio of SP 3 bond to SP 2 bond can be roughly estimated by separating peaks in the IR spectrum. IR spectrum shows 2800-3150c
The spectra of many modes are measured overlapping with m −1 , but the attribution of the peaks corresponding to each wave number is clear, and the peaks are separated by the Gaussian distribution as shown in FIG. SP 3 / SP 2 can be known by calculating the area and calculating the ratio. Further, the hard carbon film is in an amorphous state (aC: H) according to X-ray and electron beam diffraction analysis, and / or about 1
It can be seen that it is in an amorphous state containing fine crystal grains of about 0 to several μm. Plasma C, which is generally suitable for mass production
In the case of the VD method, the smaller the RF output, the higher the specific resistance value and hardness of the film, and the lower the pressure, the longer the life of active species. And the specific resistance and hardness tend to increase. Furthermore, since the plasma density decreases at low pressure, the method of utilizing the magnetic field confinement effect is particularly effective for increasing the specific resistance. Furthermore, since this method (plasma CVD method) has the characteristic that a good quality hard carbon film can be similarly formed even at a relatively low temperature condition of room temperature to 150 ° C., the low temperature of the thin film two-terminal device manufacturing process is low. It is most suitable for Therefore, the degree of freedom in selecting the substrate material to be used expands,
It has a feature that a uniform film can be obtained because the substrate temperature can be easily controlled. Since the structure and physical properties of the hard carbon film can be controlled in a wide range as shown in Table 1,
There is also an advantage that the device characteristics can be freely designed. Furthermore, the dielectric constant of the film is 3 to 5, which is T used in the conventional MIM.
Since it is smaller than a 2 O 5 , Al 2 O 3 , SiNx, etc., when making an element with the same electric capacity, a large element size is sufficient, so microfabrication is not required so much, and the yield is improved. (The LCD / MIM capacitance ratio needs to be about C LCD / C MIM = 10: 1 due to the driving conditions.) Furthermore, since the hardness of the film is high, the element is less damaged by the rubbing process when the liquid crystal material is filled, and the yield is improved also from this point. A hard carbon film suitable as a thin film two-terminal element for driving a liquid crystal has a film thickness of 100 to 80 depending on driving conditions.
It is advantageous that 00Å and the specific resistance are in the range of 10 6 to 10 12 Ω · cm. In consideration of the margin between the driving voltage and the withstand voltage (dielectric breakdown voltage), the film thickness is preferably 200 Å or more, and color unevenness caused by the step (cell gap difference) between the pixel portion and the thin film two-terminal element occurs. Since it is desirable that the film thickness is 6000 Å or less in order to prevent practical problems, the hard carbon film has a film thickness of 200 to 6
More preferably, the specific resistance is 000Å and the specific resistance is 5 × 10 5 to 10 12 Ωcm. The number of defects in the device due to pinholes in the hard carbon film increases as the film thickness decreases, and becomes particularly noticeable below 300 Å (the number of defects exceeds 1%).
In addition, the in-plane uniformity of film thickness (and eventually the uniformity of device characteristics) cannot be ensured (the film thickness control accuracy is limited to about 30Å, and the film thickness variation exceeds 10%). Is more preferably 300Å or more. In addition, the hard carbon film is less likely to be peeled off due to stress, and the duty ratio is lower (desirably 1/10).
It is more preferable that the film thickness is 4000 Å or less in order to drive at a temperature of 00 or less). Taking these factors into consideration, it is more preferable that the thickness of the hard carbon film is 300 to 4000 Å and the specific resistance is 10 7 to 10 11 Ω · cm.
【0010】以下、本発明の前記MIM素子およびアク
ティブマトリックス基板の製造法及び構成を図1に基づ
いて具体的に説明する。ガラス、プラスチック板、プラ
スチックフィルム等の基板6上にAl、Ta、Ti、C
r、Ni、Au、Cu、Ag、W、Mo、Pt等の導電
性薄膜を数十から数百nmの厚さに成膜し、所定のパタ
ーンにエッチングして下部電極1とする。次に接着層と
してAl、Ta、Ti、Cr、Ni、Au、Cu、A
g、W、Mo、Pt等の単体もしくは合金の金属薄膜あ
るいは、前記金属の酸化物、窒化物、炭化物やSiN
x、SiOx、SiCx、硬質炭素、ポリイミド、ポリ
エチレン、ポリスチレン等の絶縁膜を数nmから数十n
mの厚さに形成し少なくとも下部電極と上部電極が積層
される部分を含むパターンにエッチングし、さらに絶縁
膜2を数十から数百nmの厚さに製膜し所定のパターン
にエッチングする。最後に上部電極3として、Al、T
a、Ti、Cr、Ni、Co、Fe、Au、Cu、A
g、W、Mo、Pt等の導電性薄膜を数十nmから数百
nmの厚さに成膜し、所定のパターンにエッチングし上
部電極を形成する。引き続き表示用電極4としてITO
(Indium Tin Oxide)、ZnO:A
l、In2O3、SnO2等の透明導電性薄膜を数十から
数百nmの厚さに成膜し所定のパターンにエッチグす
る。各薄膜の形成方法としてはスパッタリング、蒸着
法、CVD等の慣用の薄膜の形成方法が採用できる。こ
のようにして得られたアクティブマトリックス基板は図
1に示すように、第一導体(下部電極)と第二導体(上
部電極)の間に絶縁体層を有し、第二導体を表示用電極
に接続してなるアクティブマトリックス基板において、
第一導体と絶縁体層の間に接着層を有することを特徴と
する。次に実施例により、本発明を具体的に説明する
が、本発明はこれらに限定されるものではない。The manufacturing method and structure of the MIM element and active matrix substrate of the present invention will be specifically described below with reference to FIG. Al, Ta, Ti, C on the substrate 6 such as glass, plastic plate or plastic film
A conductive thin film of r, Ni, Au, Cu, Ag, W, Mo, Pt or the like is formed to a thickness of several tens to several hundreds of nm and etched into a predetermined pattern to form the lower electrode 1. Next, as an adhesive layer, Al, Ta, Ti, Cr, Ni, Au, Cu, A
g, W, Mo, Pt, etc. simple substance or alloy metal thin film, or oxide, nitride, carbide or SiN of the above metal
Insulating films such as x, SiOx, SiCx, hard carbon, polyimide, polyethylene, polystyrene, etc.
It is formed into a thickness of m and is etched into a pattern including at least a portion where the lower electrode and the upper electrode are laminated, and the insulating film 2 is formed into a film having a thickness of several tens to several hundreds of nm and is etched into a predetermined pattern. Finally, as the upper electrode 3, Al, T
a, Ti, Cr, Ni, Co, Fe, Au, Cu, A
A conductive thin film of g, W, Mo, Pt or the like is formed to a thickness of several tens nm to several hundreds nm, and is etched into a predetermined pattern to form an upper electrode. Subsequently, ITO is used as the display electrode 4.
(Indium Tin Oxide), ZnO: A
l, In 2 O 3 , SnO 2 or the like is formed into a transparent conductive thin film with a thickness of several tens to several hundreds of nm and etched into a predetermined pattern. As a method for forming each thin film, a conventional thin film forming method such as sputtering, vapor deposition, or CVD can be adopted. The active matrix substrate thus obtained has an insulator layer between a first conductor (lower electrode) and a second conductor (upper electrode) as shown in FIG. In the active matrix substrate that is connected to
An adhesive layer is provided between the first conductor and the insulator layer. Next, the present invention will be specifically described with reference to examples, but the present invention is not limited thereto.
【0011】[0011]
実施例1 図1に示すようにパイレックスガラス基板上にアクティ
ブマトリックスを以下の様にして設けた。まずTiをス
パッタリング法により約50nm厚に堆積後パターン化
して下部電極1を形成した。その上に、接着層2として
TiCxをスパッタリング法を用いて約10nm形成し
素子部を含むパターンでエッチングし、その後、絶縁体
層3としてプラズマCVDを用いて、硬質炭素膜を20
0nm堆積した。この時の硬質炭素膜の成膜条件は以下
の通りである。 圧 力:0.05Torr CH4 流量:20SCCM RFパワー:0.5W/cm2 これをドライエッチングによりパターン化した。続いて
この上にCrをスパッタリング法により約80nm堆積
し、下部電極と交差するパターンでエッチングし上部電
極4を形成し、最後にITOをスパッタリング法で約6
0nmの厚さに堆積し、ウェットエッチングして、表示
用電極5を形成した。本実施例では接着層として第一導
体と絶縁層の化合物を用いているために接着層/第一導
体、第一導体/絶縁層それぞれの界面の付着力が強く、
絶縁体層の剥離が全く無く、また信頼性の高いアクティ
ブマトリックス基板を作製することができた。Example 1 As shown in FIG. 1, an active matrix was provided on a Pyrex glass substrate as follows. First, Ti was deposited by sputtering to a thickness of about 50 nm and then patterned to form the lower electrode 1. Then, TiCx is formed to a thickness of about 10 nm as an adhesive layer 2 by a sputtering method and etched in a pattern including an element portion, and then a plasma CVD is used as an insulator layer 3 to form a hard carbon film of 20 nm.
0 nm was deposited. The conditions for forming the hard carbon film at this time are as follows. Pressure: 0.05 Torr CH 4 Flow rate: 20 SCCM RF power: 0.5 W / cm 2 This was patterned by dry etching. Then, Cr is deposited thereon by a sputtering method to have a thickness of about 80 nm, and is etched in a pattern intersecting with the lower electrode to form an upper electrode 4. Finally, ITO is sputtered for about 6 nm.
The display electrode 5 was formed by depositing it to a thickness of 0 nm and performing wet etching. In this embodiment, since the compound of the first conductor and the insulating layer is used as the adhesive layer, the adhesive force at the interface between the adhesive layer / first conductor and the first conductor / insulating layer is strong,
It was possible to fabricate an active matrix substrate with high reliability without any peeling of the insulating layer.
【0012】実施例2 図1に示すようにパイレックスガラス基板上にアクティ
ブマトリックスを以下の様にして設けた。まずCrを蒸
着法により約50nm厚に堆積後パターン化して下部電
極1を形成した。その上に、接着層2として硬質炭素膜
をプラズマCVD法を用いて約10nm形成した。この
時の硬質炭素膜の成膜条件は以下の通りである。 圧 力:0.01Torr CH4 流量:20SCCM RFパワー:3.0W/cm2 次に素子部を含むパターンでドライエッチングし、その
後、絶縁体層3としてプラズマCVDを用いて、硬質炭
素膜を100nm堆積した。この時の硬質炭素膜の成膜
条件は以下の通りである。 圧 力:0.05Torr CH4 流量:20SCCM RFパワー:0.5W/cm2 これをドライエッチングによりパターン化した。続いて
この上にNiをスパッタリング法により約80nm堆積
し、下部電極と交差するパターンでエッチングし上部電
極4を形成し、最後にITOをスパッタリング法で約6
0nmの厚さに堆積し、ウェットエッチングして、表示
用電極5を形成した。本実施例では接着層として第一導
体に対して付着力の強い製膜条件で硬質炭素膜を作製
し、その後同じく炭素を多く含む絶縁体層を用いている
ために接着層/第一導体、第一導体/絶縁層それぞれの
界面の付着力が強く、絶縁体層の剥離が無く、かつ信頼
性の高いアクティブマトリックス基板を作製することが
できた。Example 2 As shown in FIG. 1, an active layer was formed on a Pyrex glass substrate.
The bus matrix was provided as follows. First steam Cr
After deposition to a thickness of about 50 nm by the deposition method, patterning is performed and the bottom electrode is
Pole 1 was formed. On top of that, a hard carbon film is used as the adhesive layer 2.
Of about 10 nm was formed by using the plasma CVD method. this
The conditions for forming the hard carbon film at that time are as follows. Pressure: 0.01 Torr CHFour Flow rate: 20 SCCM RF power: 3.0 W / cm2 Next, dry etching with a pattern including the element part,
After that, hard carbon is used as the insulator layer 3 by plasma CVD.
An elementary film was deposited to 100 nm. Deposition of hard carbon film at this time
The conditions are as follows. Pressure: 0.05 Torr CHFour Flow rate: 20 SCCM RF power: 0.5 W / cm2 This was patterned by dry etching. continue
Ni is deposited on this by about 80 nm by sputtering method
Then, etch in a pattern that intersects the lower electrode and
Pole 4 is formed, and finally ITO is sputtered to about 6
Deposited to a thickness of 0 nm, wet-etched, and displayed
The electrode 5 was formed. In this embodiment, the first conductive layer is used as an adhesive layer.
Manufacture a hard carbon film under film forming conditions with strong adhesion to the body
And then using an insulator layer that also contains a lot of carbon
For adhesive layer / first conductor, first conductor / insulating layer respectively
Strong adhesion at the interface, no peeling of the insulation layer, and reliable
To make highly active matrix substrates
did it.
【0013】実施例3 実施例1において接着層と絶縁体層を連続して成膜し、
かつ図2のように同じレジストパターンを用いて、同時
にドライエッチングすることにより、アクティブマトリ
ックス基板作製工程の簡略化を行なうことができた。Example 3 In Example 1, an adhesive layer and an insulating layer were continuously formed,
Moreover, as shown in FIG. 2, by using the same resist pattern and performing dry etching at the same time, the manufacturing process of the active matrix substrate could be simplified.
【0014】実施例4 実施例2において、図3のように絶縁体層のドライエッ
チング後に、接着層2と同じ条件でTiCxを製膜し、
概ね同じ形状にエッチングしたあと、上部電極を形成し
た。これにより薄膜二端子素子に電流−電圧特性の正負
の対称性が極めて1に近くなり、液晶表示装置としてこ
れを用いたときに、液晶に直流バイアスが印加されるこ
とが無く、液晶が劣化変質することが無いため、液晶表
示装置としての信頼性が向上した。Example 4 In Example 2, TiCx was formed under the same conditions as the adhesive layer 2 after dry etching of the insulator layer as shown in FIG.
After etching into substantially the same shape, an upper electrode was formed. As a result, the positive / negative symmetry of the current-voltage characteristics of the thin film two-terminal element becomes extremely close to 1, and when this is used as a liquid crystal display device, a DC bias is not applied to the liquid crystal and the liquid crystal deteriorates and deteriorates. Therefore, the reliability as a liquid crystal display device is improved.
【0015】実施例5 実施例2において接着層形成後に200℃で約2時間の
熱処理を加えたあと絶縁体層と上部電極を形成したとこ
ろ、下部電極内部に炭素原子が拡散し、付着力が増した
ために素子の欠陥率が非常に小さく、液晶表示装置の表
示品質が向上した。Example 5 When an insulating layer and an upper electrode were formed after applying a heat treatment at 200 ° C. for about 2 hours after forming the adhesive layer in Example 2, carbon atoms diffused inside the lower electrode and the adhesive force was increased. As a result, the defect rate of the device is very small and the display quality of the liquid crystal display device is improved.
【0016】実施例6 図1に示すようにパイレックスガラス基板上にアクティ
ブマトリックスを以下の様にして設けた。まずAlをス
パッタリング法により約80nm厚に堆積後パターン化
して下部電極1を形成した。その上に、プラスマCVD
法で絶縁体層を形成するがCH4プラズマ発生前にH2プ
ラズマに約30秒間、基板及び下部電極表面を曝したあ
と、絶縁体層3としてプラスマCVDを用いて、硬質炭
素膜を100nm堆積した。この時の硬質炭素膜の成膜
条件は以下の通りである。 圧 力:0.05Torr CH4 流量:20SCCM RFパワー:0.1W/cm2 以下は実施例1と同様にしてアクティブマトリックス基
板を作製した。本実施例では水素プラズマ処理を行なわ
なければ、硬質炭素膜がアクティブマトリックス基板作
製中に剥がれしまうが、表面処理により絶縁体層の第一
導体に対する付着力が増し、アクティブマトリックス基
板を作製することができた。Example 6 As shown in FIG. 1, an active matrix was provided on a Pyrex glass substrate as follows. First, Al was deposited to a thickness of about 80 nm by sputtering and then patterned to form the lower electrode 1. On top of that, plasma CVD
An insulator layer is formed by the method, but the substrate and the lower electrode surface are exposed to H 2 plasma for about 30 seconds before CH 4 plasma is generated, and then a hard carbon film is deposited to 100 nm as an insulator layer 3 by using plasma CVD. did. The conditions for forming the hard carbon film at this time are as follows. Pressure: 0.05 Torr CH 4 Flow rate: 20 SCCM RF power: 0.1 W / cm 2 An active matrix substrate was produced in the same manner as in Example 1. In this example, if the hydrogen plasma treatment is not performed, the hard carbon film will be peeled off during the production of the active matrix substrate, but the surface treatment increases the adhesion of the insulator layer to the first conductor, and thus the active matrix substrate can be produced. did it.
【0017】実施例7 パイレックスガラス上に640×480画素の実施例2
のスイッチング素子を形成したアクティブマトリックス
基板を用いて、ツイストネマティック方式の液晶表示装
置を作製したところ、長期にわたって絶縁体層の剥離が
無いため欠陥が少なく、表示性能の高い液晶表示装置が
得られた。Example 7 Example 2 of 640 × 480 pixels on Pyrex glass
A twisted nematic liquid crystal display device was manufactured using an active matrix substrate on which switching elements were formed, and a liquid crystal display device with high display performance with few defects due to no peeling of the insulating layer was obtained over a long period of time. .
【0018】[0018]
【効果】本発明のMIM素子は、長期にわたって絶縁体
層の剥離が無いため欠陥が少なく、また、該素子を使用
することにより表示性能の高い液晶表示装置が提供され
た。The MIM element of the present invention has few defects because the insulating layer is not peeled off for a long period of time, and a liquid crystal display device having high display performance is provided by using the element.
【図1】実施例1のアクティブマトリックス基板の構成
を模式的に示す図である。FIG. 1 is a diagram schematically showing a configuration of an active matrix substrate of Example 1.
【図2】実施例3のアクティブマトリックス基板の構成
を模式的に示す図である。FIG. 2 is a diagram schematically showing a configuration of an active matrix substrate of Example 3.
【図3】実施例4のアクティブマトリックス基板の構成
を模式的に示す図である。FIG. 3 is a diagram schematically showing a configuration of an active matrix substrate of Example 4.
1 下部電極(Ti) 2 接着層(TiCx) 3 絶縁体層(硬質炭素膜) 4 上部電極(Cr) 5 表示用電極 10 下部電極(Cr) 20 接着層(硬質炭素膜) 40 上部電極(Ni) 1 Lower Electrode (Ti) 2 Adhesive Layer (TiCx) 3 Insulator Layer (Hard Carbon Film) 4 Upper Electrode (Cr) 5 Display Electrode 10 Lower Electrode (Cr) 20 Adhesive Layer (Hard Carbon Film) 40 Upper Electrode (Ni )
Claims (10)
電極)の間に絶縁体層を有するMIM素子において、第
一導体および/または第二導体と絶縁体層の間に導体お
よび絶縁体層に対し付着力を有する接着層を有すること
を特徴とするアクティブマトリックス基板。1. A MIM element having an insulator layer between a first conductor (lower electrode) and a second conductor (upper electrode), comprising a conductor and a conductor between the first conductor and / or the second conductor and the insulator layer. An active matrix substrate having an adhesive layer having an adhesive force to an insulating layer.
材料の構成元素から選ばれた元素を構成成分とする材料
からなることを特徴とする請求項1記載のMIM素子。2. The MIM element according to claim 1, wherein the adhesive layer is made of a material having an element selected from the constituent elements of the material forming the conductor and the insulator layer.
層と、第二導体と絶縁体層の間に存在する接着層が実質
的に同じ材料で構成されたものあることを特徴とする請
求項1または2記載のMIM素子。3. The adhesive layer present between the first conductor and the insulator layer and the adhesive layer present between the second conductor and the insulator layer are made of substantially the same material. The MIM element according to claim 1 or 2.
形成されたものであることを特徴とする請求項1、2ま
たは3記載のMIM素子。4. The MIM element according to claim 1, wherein the insulating layer and the adhesive layer are formed in substantially the same shape.
ンを用いて連続的に成膜し、また同時にエッチングして
形成されてあることを特徴とする請求項1、2、3また
は4記載のMIM素子。5. The adhesive layer and the insulating layer are formed by continuously forming a film using the same resist pattern and simultaneously etching the film, according to claim 1, 2, 3 or 4. MIM element.
透したものであることを特徴とする請求項1、2、3、
4または5記載のMIM素子。6. The adhesive layer and the first conductor are mutually diffused or permeated, and the adhesive layer and the first conductor are characterized in that:
The MIM element according to 4 or 5.
ことを特徴とする請求項1、2、3、4、5または6記
載のMIM素子。7. The MIM element according to claim 1, wherein the insulating layer and the adhesive layer are hard carbon films.
するMIM素子において、絶縁体層の形成前に第一導体
の表面を絶縁体層に対する付着力を向上させる処理を施
してあることを特徴とするMIM素子。8. A MIM element having an insulator layer between a first conductor and a second conductor, wherein the surface of the first conductor is subjected to a treatment for improving adhesion to the insulator layer before forming the insulator layer. An MIM element characterized by being present.
は8記載のMIM素子の第一導体または第二導体が表示
電極に接続して基板上に形成されたアクティブマトリッ
クス基板。9. An active matrix substrate in which the first conductor or the second conductor of the MIM element according to claim 1, 2, 3, 4, 5, 6, 7 or 8 is connected to a display electrode and formed on the substrate. .
ス基板を用いたことを特徴とする液晶表示装置。10. A liquid crystal display device using the active matrix substrate according to claim 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP35050593A JPH07199229A (en) | 1993-12-28 | 1993-12-28 | Mim element, active matrix substrate and liquid crystal display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP35050593A JPH07199229A (en) | 1993-12-28 | 1993-12-28 | Mim element, active matrix substrate and liquid crystal display device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH07199229A true JPH07199229A (en) | 1995-08-04 |
Family
ID=18410951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP35050593A Pending JPH07199229A (en) | 1993-12-28 | 1993-12-28 | Mim element, active matrix substrate and liquid crystal display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07199229A (en) |
-
1993
- 1993-12-28 JP JP35050593A patent/JPH07199229A/en active Pending
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