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JPH07153994A - Semiconductor light-emitting element and light-emitting device using it - Google Patents

Semiconductor light-emitting element and light-emitting device using it

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Publication number
JPH07153994A
JPH07153994A JP32598893A JP32598893A JPH07153994A JP H07153994 A JPH07153994 A JP H07153994A JP 32598893 A JP32598893 A JP 32598893A JP 32598893 A JP32598893 A JP 32598893A JP H07153994 A JPH07153994 A JP H07153994A
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
light
arrangement direction
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32598893A
Other languages
Japanese (ja)
Inventor
Hideo Tetsu
英男 鐵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP32598893A priority Critical patent/JPH07153994A/en
Publication of JPH07153994A publication Critical patent/JPH07153994A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To provide a light-emitting diode array having a structure in which light-emitting diodes are formed at equal intervals even if they have burrs on both end faces. CONSTITUTION:In a light-emitting diode array 1, a plurality of light-emitting diodes to become light-emitting parts 3 are formed on a semiconductor substrate 2 at fixed intervals D1. Further, both endfaces 4, 4 in the arrangement direction of the light-emitting parts 3 are so shaped to have a prescribed angle theta(0 deg.<theta<90 deg.) to the arrangement direction of the light-emitting parts 3. Since both of these end faces 4, 4 are formed by cleavage while generating a burrs, every light-emitting diode is to be aligned while being shifted in the direction of both end faces 4, 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、発光部が一定の間隔で
複数個配列された半導体発光素子及びこの半導体発光素
子を発光部の配列方向に複数個並べた構成の発光装置に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device having a plurality of light emitting parts arranged at regular intervals and a light emitting device having a plurality of the semiconductor light emitting devices arranged in the direction of arrangement of the light emitting parts. .

【0002】[0002]

【従来の技術】光プリンタ用光源等に使用される発光装
置として、半導体基板上に発光ダイオードを一定の間隔
で複数個配列した発光ダイオードアレイがある。このよ
うな発光装置においては、通常、複数個の発光ダイオー
ドアレイを、発光部の配列方向に並べた構成となってい
る。このように発光ダイオードアレイを複数個並べて発
光装置とする場合、発光ダイオードアレイ間の発光部間
隔を発光ダイオードアレイ上の発光部間隔と等しくする
必要がある。ところで、上記発光ダイオードアレイは、
装置の小型化、高画質化に伴なって発光部の高集積化
(例えば、500dpi程度の場合、発光部間隔は50
μm程度)が要求されている。このため、発光ダイオー
ドアレイの連接部である半導体基板の両終端面はできる
だけ平坦にすることが望ましい。この半導体基板の両終
端面は、ウエハ上で多数形成した発光ダイオードアレイ
をウエハから分割したときの切断面であるが、その切断
面ができるだけ平坦となるような切断方法を用いる必要
がある。従来では、ウエハの切断方法の1つとしてダイ
シング法がある。しかし、このダイシング法は、その切
断面付近に歪を残してしまう等の問題があり、高集積化
された発光ダイオードアレイにおける両終端面の切断方
法として使用することは難しい。
2. Description of the Related Art As a light emitting device used for a light source for an optical printer, there is a light emitting diode array in which a plurality of light emitting diodes are arranged on a semiconductor substrate at regular intervals. In such a light emitting device, usually, a plurality of light emitting diode arrays are arranged in the arrangement direction of the light emitting portions. When a plurality of light emitting diode arrays are arranged in this way to form a light emitting device, it is necessary to make the light emitting portion spacing between the light emitting diode arrays equal to the light emitting portion spacing on the light emitting diode array. By the way, the light emitting diode array is
Higher integration of the light-emitting section accompanying downsizing of the device and higher image quality (for example, in the case of about 500 dpi, the light-emitting section spacing is 50
μm) is required. For this reason, it is desirable to make both end surfaces of the semiconductor substrate, which is the connecting portion of the light emitting diode array, as flat as possible. Both end surfaces of this semiconductor substrate are cut surfaces when a large number of light emitting diode arrays formed on the wafer are divided from the wafer, and it is necessary to use a cutting method that makes the cut surfaces as flat as possible. Conventionally, there is a dicing method as one of the wafer cutting methods. However, this dicing method has a problem that distortion remains in the vicinity of the cut surface, and it is difficult to use it as a method of cutting both end surfaces in a highly integrated light emitting diode array.

【0003】また、他の切断方法として、半導体結晶軸
方向に平行に傷を付け、この傷の部分を加圧する、いわ
ゆるへき開による方法が従来より知られている。このへ
き開を用いて半導体結晶を切断すると、その切断面には
歪みが残らず、しかもその切断面が平坦な状態になるた
め、高集積化された発光ダイオードアレイの両終端面を
切断する方法として最適である。
Further, as another cutting method, there has been conventionally known a method by so-called cleavage in which a scratch is made parallel to the semiconductor crystal axis direction and the scratched portion is pressed. When a semiconductor crystal is cut by using this cleavage, no distortion remains on the cut surface, and the cut surface becomes flat. Therefore, as a method of cutting both end surfaces of a highly integrated light emitting diode array, Optimal.

【0004】[0004]

【発明が解決しようとする課題】しかし、このへき開を
用いたとしても、図6に示すように、終端面4には実際
には最大4μm程度のバリ6が発生する。このように最
大4μmのバリが発生した発光ダイオードアレイ41を
連接させて並べれば、その連接部付近の発光部3の発光
部間隔D2は、発光ダイオードアレイ41上の発光部間
隔D1よりも合計8μm分だけ広がってしまうことにな
る。これを500dpiの場合で考えると、その発光部
間隔40μmの約20%の値であり無視をすることはで
きない。そこで、バリ6の発生量を考慮して、へき開に
より切断する位置をもっと発光部3に近づければ良い
が、発光ダイオードアレイの発光部間隔をバリの発生量
以下に狭くすることができないという問題が生じてく
る。
However, even if this cleavage is used, as shown in FIG. 6, a burr 6 having a maximum size of about 4 .mu.m actually occurs on the end surface 4. As shown in FIG. If the light emitting diode arrays 41 having the maximum burrs of 4 μm are connected and arranged in this manner, the light emitting portion distance D2 of the light emitting portions 3 near the connecting portion is 8 μm in total compared with the light emitting portion distance D1 on the light emitting diode array 41. It will be expanded by that amount. Considering this in the case of 500 dpi, the value is about 20% of the light emitting portion interval of 40 μm and cannot be ignored. Therefore, in consideration of the amount of burr 6 generated, the position to be cut by cleavage may be brought closer to the light emitting part 3, but the interval of the light emitting parts of the light emitting diode array cannot be made smaller than the amount of burr generated. Will occur.

【0005】そこで、本発明は上記の点に着目してなさ
れたものであり、両終端面にバリが発生しても発光部間
隔が等間隔になるように並べることが可能な構造を有す
る発光ダイオードアレイを提供することを目的とするも
のである。即ち、発光ダイオードアレイを並べて発光装
置を構成する際に、発光部3の配列方向と垂直な方向の
ドットずれの許容範囲は、発光部3の配列方向よりも多
少の余裕があることに着目し、発光ダイオードアレイを
発光部3の配列方向と垂直な方向にずらして並べること
によって、発光部間隔を等間隔にすることができるよう
に発光ダイオードアレイを構成する。また発光装置にお
いては、このような発光ダイオードアレイを用いること
により、均一な発光部間隔となるように構成する。
Therefore, the present invention has been made by paying attention to the above points, and has a structure capable of arranging the light emitting portions so that the light emitting portions are arranged at equal intervals even if burrs are generated on both end surfaces. It is intended to provide a diode array. That is, when forming the light emitting device by arranging the light emitting diode arrays, pay attention to the fact that the allowable range of the dot deviation in the direction perpendicular to the arrangement direction of the light emitting units 3 has some margin as compared with the arrangement direction of the light emitting units 3. By arranging the light emitting diode arrays so as to be shifted in the direction perpendicular to the arrangement direction of the light emitting units 3, the light emitting diode arrays are configured so that the light emitting units can be spaced at equal intervals. Further, in the light emitting device, by using such a light emitting diode array, a uniform light emitting portion interval is formed.

【0006】[0006]

【課題を解決するための手段】本発明は、上記目的を達
成するための手段として、半導体基板上に一定の間隔で
配列された複数の発光部を有する半導体発光素子におい
て、前記半導体発光素子を平面で見た時、前記半導体基
板の前記発光部の配列方向における両終端面の方向が、
前記半導体基板のへき開方向に一致していると共に前記
発光部の配列方向に対して所定角度を持たせた方向にな
っていることを特徴とする半導体発光素子を提供しよう
とするものである。
As a means for achieving the above object, the present invention provides a semiconductor light emitting device having a plurality of light emitting portions arranged on a semiconductor substrate at regular intervals, wherein the semiconductor light emitting device is When viewed in a plane, the direction of both end surfaces in the arrangement direction of the light emitting portions of the semiconductor substrate is
An object of the present invention is to provide a semiconductor light emitting device characterized in that it is aligned with the cleavage direction of the semiconductor substrate and has a predetermined angle with respect to the arrangement direction of the light emitting portions.

【0007】また、本発明は、上記目的を達成するため
の手段として、半導体基板上に一定の間隔で配列された
複数の発光部を有し、前記半導体基板の発光部の配列方
向における両終端面が前記発光部の配列方向に対して所
定角度を持たせた形状の半導体発光素子を、前記発光部
の配列方向に複数個並べた構成の発光装置であって、前
記半導体発光素子毎に前記半導体基板の終端面の方向へ
ずらして半導体発光素子を並べたことを特徴とする発光
装置を提供しようとするものである。
As a means for achieving the above object, the present invention has a plurality of light emitting portions arranged on a semiconductor substrate at regular intervals, and both ends of the semiconductor substrate in the arrangement direction of the light emitting portions. A light emitting device having a configuration in which a plurality of semiconductor light emitting elements whose surfaces have a predetermined angle with respect to the arrangement direction of the light emitting portions are arranged in the arrangement direction of the light emitting portions, wherein An object of the present invention is to provide a light emitting device characterized by arranging semiconductor light emitting elements so as to be shifted toward a terminal surface of a semiconductor substrate.

【0008】[0008]

【実施例】以下、添付図面を参照して本発明の一実施例
を説明する。図1は、本願発明の一実施例の発光ダイオ
ードアレイの構造を示す平面図である。同図において、
発光ダイオードアレイ1は、半導体基板2上に発光部3
となる複数の発光ダイオードが一定間隔D1で形成され
ている。また、発光部3の配列方向の両終端面4,4
は、発光部3の配列方向に対して所定角度θ(0°<θ
<90°)を持たせた形状となっている。即ち、この発
光ダイオードアレイ1を平面で見た時、基板2が平行四
辺形を成すように両終端面4,4が形成されている。上
記両終端面4,4の方向は、基板2の結晶軸方向と一致
するように形成されている。即ち、この両終端面部4,
4は、へき開により切断して形成した端面であるが、同
図に示すように、最大4μm程度のバリ6が発生してい
る。この発光ダイオードアレイ1を複数個並べて構成し
た発光装置に付いては後述することにする。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a plan view showing the structure of a light emitting diode array according to an embodiment of the present invention. In the figure,
The light emitting diode array 1 includes a light emitting section 3 on a semiconductor substrate 2.
A plurality of light emitting diodes are formed at regular intervals D1. Further, both end faces 4, 4 in the arrangement direction of the light emitting unit 3
Is a predetermined angle θ (0 ° <θ with respect to the arrangement direction of the light emitting units 3
It has a shape with <90 °. That is, when the light emitting diode array 1 is viewed in a plane, both end faces 4 and 4 are formed so that the substrate 2 forms a parallelogram. The directions of the both end surfaces 4 and 4 are formed so as to coincide with the crystal axis direction of the substrate 2. That is, the two end surface portions 4,
Reference numeral 4 denotes an end face formed by cutting by cleavage, but as shown in the figure, a burr 6 of about 4 μm at maximum is generated. A light emitting device formed by arranging a plurality of the light emitting diode arrays 1 will be described later.

【0009】ここで、上記発光ダイオードアレイ1を作
成するには、ウエハの結晶軸方向に応じて発光ダイオー
ドアレイ1のマスクパターンを焼き付けるようにする。
図2(A)に示すように、ウエハ11には、結晶軸方向
を示す切り欠き12が予め形成されており、この切り欠
き12の方向と発光部3の配列方向とが所定角度θ(例
えば45°)を成すように、発光ダイオードアレイ1形
成用のマスクパターンを焼き付け、ウエハ11上に多数
の発光ダイオードアレイ1を形成する(同図(B))。
この発光ダイオードアレイ1の発光部3の形成は、従来
の発光ダイオードの形成方法と同様に行う。このように
多数の発光部3が形成されたウエハ11表面の拡大図を
同図(C)に示す。同図(C)に示すように多数の発光
ダイオードアレイ1が形成されたウエハ11から発光ダ
イオードアレイ1を分割するには、同図中一点鎖線で示
す分離線14をスクライバ等で傷を付けてその傷の部分
を加圧して切断(へき開)し、同図中点線で示す分離線
15をダイシングソー等の機械的分離手段を用いて切断
すれば良い。上記分離線14は、発光ダイオードアレイ
1の両側面部4,4と成り、また、上記分離線15は両
側面5,5(図1参照)と成る。ところで、上記分離線
14は、ウエハ11の結晶軸方向と一致させているの
で、その分断面はへき開により分断されるが、上述のよ
うに最大4μm程度のバリ6が発生している。そこで、
以下の方法により上記発光ダイオードアレイ1を並べ
る。
Here, in order to form the light emitting diode array 1, the mask pattern of the light emitting diode array 1 is printed according to the crystal axis direction of the wafer.
As shown in FIG. 2A, the wafer 11 is preliminarily formed with a notch 12 indicating the crystal axis direction, and the direction of the notch 12 and the arrangement direction of the light emitting units 3 are a predetermined angle θ (for example, 45 °), a mask pattern for forming the light emitting diode array 1 is printed, and a large number of light emitting diode arrays 1 are formed on the wafer 11 (FIG. 2B).
The light emitting portion 3 of the light emitting diode array 1 is formed in the same manner as the conventional method for forming a light emitting diode. An enlarged view of the surface of the wafer 11 on which a large number of light emitting portions 3 are formed is shown in FIG. In order to divide the light emitting diode array 1 from the wafer 11 on which a large number of light emitting diode arrays 1 are formed as shown in FIG. 3C, a separation line 14 shown by a dashed line in the drawing is scratched with a scriber or the like. It suffices to pressurize (cleave) the scratched portion and cut the separating line 15 shown by the dotted line in the figure using a mechanical separating means such as a dicing saw. The separation lines 14 are both side surfaces 4, 4 of the light emitting diode array 1, and the separation lines 15 are both side surfaces 5, 5 (see FIG. 1). By the way, since the separation line 14 is aligned with the crystal axis direction of the wafer 11, its sectional surface is divided by cleavage, but the burr 6 of about 4 μm at maximum is generated as described above. Therefore,
The light emitting diode arrays 1 are arranged by the following method.

【0010】図3は、上記発光ダイオードアレイ1を複
数個並べて構成した発光装置の要部の拡大図である。図
3(B)に示す発光装置21は、上記発光ダイオードア
レイ1A〜1Cを発光部3の配列方向に並べた構成とな
っている。発光ダイオードアレイ1A〜1Cは、発光部
間隔D1=50μm、発光部3の発光部寸法=20μm
であり、両終端面4,4と発光部3の配列方向とが角度
θ=45°を成すように構成されている。この発光装置
21の発光ダイオードアレイ1A〜1Cの両終端面4,
4には、最大4μm程度のバリ6が発生しており、発光
部3の中心を通る配列方向の中心線7A〜7Cを一致さ
せて発光ダイオードアレイ1を並べると、同図(A)に
示すように、発光部間隔D2は発光ダイオードアレイ1
上の発光部間隔D1(=50μm)より広くなってしま
う。
FIG. 3 is an enlarged view of a main part of a light emitting device having a plurality of the light emitting diode arrays 1 arranged side by side. A light emitting device 21 shown in FIG. 3B has a configuration in which the light emitting diode arrays 1A to 1C are arranged in the arrangement direction of the light emitting units 3. In the light emitting diode arrays 1A to 1C, the light emitting portion interval D1 = 50 μm, the light emitting portion size of the light emitting portion 3 = 20 μm.
Thus, the two end surfaces 4, 4 and the arrangement direction of the light emitting portions 3 form an angle θ = 45 °. Both end faces 4 of the light emitting diode arrays 1A to 1C of the light emitting device 21.
4 has a maximum burr 6 of about 4 μm, and when the light emitting diode arrays 1 are arranged so that the center lines 7A to 7C in the arrangement direction passing through the center of the light emitting section 3 are aligned, it is shown in FIG. As described above, the light emitting portion interval D2 is equal to the light emitting diode array 1
It becomes wider than the upper light emitting portion interval D1 (= 50 μm).

【0011】ここで、発光部3の配列方向に垂直な方向
のドットずれの限界は、発光部寸法(20μm)の1/
2程度までが許容範囲である。そこで、同図(B)に示
すように、発光ダイオードアレイ1毎に両終端面4,4
の方向へずらして並べるようにする。この結果、同図に
示すように、発光ダイオードアレイ1A〜1Cの中心線
7A〜7Cが、発光ダイオードアレイ1毎にずれてしま
うが、並べられた両端部の発光ダイオードアレイ1Aと
発光ダイオードアレイ1Cとの発光部3のドットずれが
許容範囲(発光部寸法の1/2)内であるため問題はな
い。ここで、上記発光ダイオードアレイ1の両終端部
4,4の方向と発光部3の配列方向とのなす角θは、発
光部間隔D1、バリ6の量、発光部3のドットずれの許
容範囲、及び並べる発光ダイオードアレイ1の数等の関
係により、適宜決定されている。即ち、上記実施例では
その角度θを45°としているが、上記条件(発光部間
隔D1、バリ6の量、発光部3のドットずれの許容範
囲、及び並べる発光ダイオードアレイ1の数)によって
は、60°等の他の値としても良い。この両終端面4,
4と発光部3の配列方向とがなす角度θは、上記ウエハ
11上へのマスクの方法により任意に設定可能である。
Here, the limit of dot misalignment in the direction perpendicular to the arrangement direction of the light emitting portions 3 is 1 / the size of the light emitting portion (20 μm).
The allowable range is up to about 2. Therefore, as shown in FIG. 2B, both end faces 4, 4 are provided for each light emitting diode array 1.
Move in the direction of and arrange them side by side. As a result, as shown in the figure, the center lines 7A to 7C of the light emitting diode arrays 1A to 1C deviate for each light emitting diode array 1, but the light emitting diode array 1A and the light emitting diode array 1C at both ends of the array are arranged. There is no problem because the dot deviation of the light emitting portion 3 between the above and the above is within the allowable range (1/2 of the light emitting portion size). Here, the angle θ formed between the directions of the two end portions 4 and 4 of the light emitting diode array 1 and the arrangement direction of the light emitting portions 3 is the light emitting portion interval D1, the amount of burrs 6, and the allowable range of dot deviation of the light emitting portions 3. , And the number of light emitting diode arrays 1 to be arranged, and the like. That is, although the angle θ is set to 45 ° in the above-described embodiment, depending on the above conditions (the light emitting portion interval D1, the amount of burr 6, the allowable range of dot deviation of the light emitting portion 3, and the number of light emitting diode arrays 1 to be arranged). Other values such as 60 ° may be used. Both of these end faces 4,
The angle θ formed by 4 and the arrangement direction of the light emitting portions 3 can be arbitrarily set by the method of masking on the wafer 11.

【0012】ところで、上記発光ダイオードアレイ1
は、平面で見たときの形状が平行四辺形ではなく、図4
に示すように、台形となるように構成しても良い。この
ように台形形状の発光ダイオードアレイ31を複数個並
べる場合、同図に示すように、1個おきに発光部3の配
列方向と垂直な方向にずらす。このように発光ダイオー
ドアレイ31毎にずらして並べることで、台形形状の発
光ダイオードアレイ31においても、発光部間隔D2を
発光ダイオードアレイ31上の発光部間隔D1と等しく
することができる。そして、上記発光ダイオードアレイ
31を作成する場合、2方向のへき開方向を有するウエ
ハを使用すれば良い。2方向のへき開方向が垂直に交わ
る例えばGaAsウエハを使用する場合、ウエハ上に例
えば図5に示すように発光ダイオードアレイ31を形成
(同図においては発光部3を省略してある)する。そし
て、両側面5,5となる分離線16を、ダイシング法に
より切断した後、両終端面4,4となる分離線17をへ
き開を用いて切断して、発光ダイオードアレイ31を分
割する。
By the way, the above light emitting diode array 1
Is not a parallelogram when viewed in a plane,
It may be configured to have a trapezoidal shape as shown in FIG. When a plurality of trapezoidal light emitting diode arrays 31 are arranged in this way, as shown in the figure, every other one is shifted in the direction perpendicular to the arrangement direction of the light emitting units 3. By arranging the light emitting diode arrays 31 in such a manner that they are staggered, the light emitting portion spacing D2 can be made equal to the light emitting portion spacing D1 on the light emitting diode array 31 even in the trapezoidal light emitting diode array 31. When the light emitting diode array 31 is produced, a wafer having two cleavage directions may be used. When using, for example, a GaAs wafer in which the cleavage directions of two directions intersect perpendicularly, a light emitting diode array 31 is formed on the wafer as shown in FIG. 5, for example (the light emitting section 3 is omitted in the figure). Then, after separating the separation lines 16 to be the both side surfaces 5 and 5 by a dicing method, the separation lines 17 to be both the end surfaces 4 and 4 are cut by cleavage to divide the light emitting diode array 31.

【0013】以上のように、発光ダイオードアレイ1,
31の両終端面4,4の方向を、発光部3の配列方向に
対して垂直ではなく、所定角度θを持たせ、更に発光ダ
イオードアレイ1,31毎にずらして配列することで、
バリ6による発光部間隔D2の広がりを無視することが
できるのである。
As described above, the light emitting diode array 1,
By arranging the end surfaces 4 and 4 of the light emitting diode 31 not at right angles to the arrangement direction of the light emitting portions 3 but at a predetermined angle θ, and arranging the light emitting diode arrays 1 and 31 at different positions.
The spread of the light emitting portion distance D2 due to the burr 6 can be ignored.

【0014】[0014]

【発明の効果】以上説明したように本発明の半導体発光
素子によれば、半導体基板上に一定の間隔で配列された
複数の発光部を有する半導体発光素子において、前記半
導体発光素子を平面で見た時、前記半導体基板の前記発
光部の配列方向における両終端面の方向が、前記半導体
基板のへき開方向に一致していると共に前記発光部の配
列方向に対して所定角度を持たせた方向になっているの
で、前記両終端面にバリが発生していても、半導体発光
素子間の発光部間隔を半導体発光素子上の発光部間隔と
等しくなるように並べることができる。また、半導体基
板上に一定の間隔で配列された複数の発光部を有し、前
記半導体基板の発光部の配列方向における両終端面が前
記発光部の配列方向に対して所定角度を持たせた形状の
半導体発光素子を、前記発光部の配列方向に複数個並べ
た構成の発光装置であって、前記半導体発光素子毎に前
記半導体基板の終端面の方向へずらして半導体発光素子
を並べたので、均一な発光部間隔を有する発光装置とす
ることができる等の効果がある。
As described above, according to the semiconductor light emitting device of the present invention, in a semiconductor light emitting device having a plurality of light emitting portions arranged at regular intervals on a semiconductor substrate, the semiconductor light emitting device is viewed in a plane. In this case, the direction of both end surfaces in the arrangement direction of the light emitting portions of the semiconductor substrate coincides with the cleavage direction of the semiconductor substrate, and is in a direction with a predetermined angle with respect to the arrangement direction of the light emitting portions. Therefore, even if burrs are generated on both of the end faces, it is possible to arrange the light emitting portions between the semiconductor light emitting elements so as to be equal in distance to the light emitting portions on the semiconductor light emitting element. Further, the semiconductor substrate has a plurality of light emitting portions arranged at regular intervals, and both end surfaces of the semiconductor substrate in the arrangement direction of the light emitting portions have a predetermined angle with respect to the arrangement direction of the light emitting portions. A light emitting device having a plurality of shaped semiconductor light emitting elements arranged in the arrangement direction of the light emitting portion, wherein the semiconductor light emitting elements are arranged by being shifted toward the terminal surface of the semiconductor substrate for each semiconductor light emitting element. Further, there is an effect that a light emitting device having a uniform light emitting portion interval can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の発光ダイオードアレイの構
造を示す図である。
FIG. 1 is a diagram showing a structure of a light emitting diode array according to an embodiment of the present invention.

【図2】図1に示す発光ダイオードアレイの作成方法を
説明するための図である。
FIG. 2 is a diagram for explaining a method of manufacturing the light emitting diode array shown in FIG.

【図3】図1に示す発光ダイオードアレイを用いて構成
した発光装置の要部の拡大図である。
FIG. 3 is an enlarged view of a main part of a light emitting device configured using the light emitting diode array shown in FIG.

【図4】本発明の発光装置の他の実施例の要部の拡大図
である。
FIG. 4 is an enlarged view of a main part of another embodiment of the light emitting device of the present invention.

【図5】図4における発光ダイオードアレイを分割する
前のウエハの拡大図である。
5 is an enlarged view of a wafer before the light emitting diode array in FIG. 4 is divided.

【図6】従来の発光装置の要部の拡大図である。FIG. 6 is an enlarged view of a main part of a conventional light emitting device.

【符号の説明】[Explanation of symbols]

1,31 発光ダイオードアレイ(半導体発光素子) 2 基板(半導体基板) 3 発光部 4 終端面 5 側面 6 バリ 7A,7B,7C 中心線 11 ウエハ 21 発光装置 1, 31 Light-Emitting Diode Array (Semiconductor Light-Emitting Element) 2 Substrate (Semiconductor Substrate) 3 Light-Emitting Section 4 End Surface 5 Side Surface 6 Burr 7A, 7B, 7C Centerline 11 Wafer 21 Light-Emitting Device

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半導体基板上に一定の間隔で配列された複
数の発光部を有する半導体発光素子において、 前記半導体発光素子を平面で見た時、前記半導体基板の
前記発光部の配列方向における両終端面の方向が、前記
半導体基板のへき開方向に一致していると共に前記発光
部の配列方向に対して所定角度を持たせた方向になって
いることを特徴とする半導体発光素子。
1. A semiconductor light emitting device having a plurality of light emitting units arranged at regular intervals on a semiconductor substrate, wherein when the semiconductor light emitting device is viewed in a plan view, both of the light emitting units of the semiconductor substrate in the arrangement direction are arranged. 2. A semiconductor light emitting device, characterized in that the direction of the terminating surface coincides with the cleavage direction of the semiconductor substrate and has a predetermined angle with respect to the arrangement direction of the light emitting portions.
【請求項2】半導体基板上に一定の間隔で配列された複
数の発光部を有し、前記半導体基板の発光部の配列方向
における両終端面が前記発光部の配列方向に対して所定
角度を持たせた形状の半導体発光素子を、前記発光部の
配列方向に複数個並べた構成の発光装置であって、 前記半導体発光素子毎に前記半導体基板の終端面の方向
へずらして半導体発光素子を並べたことを特徴とする発
光装置。
2. A semiconductor substrate having a plurality of light emitting portions arranged at regular intervals, and both end surfaces of the semiconductor substrate in the arrangement direction of the light emitting portions form a predetermined angle with respect to the arrangement direction of the light emitting portions. A semiconductor light emitting device having a configuration in which a plurality of semiconductor light emitting elements having a given shape are arranged in the arrangement direction of the light emitting portion, wherein each semiconductor light emitting element is shifted toward the end face of the semiconductor substrate to form a semiconductor light emitting element. A light emitting device characterized by being arranged.
JP32598893A 1993-11-30 1993-11-30 Semiconductor light-emitting element and light-emitting device using it Pending JPH07153994A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32598893A JPH07153994A (en) 1993-11-30 1993-11-30 Semiconductor light-emitting element and light-emitting device using it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32598893A JPH07153994A (en) 1993-11-30 1993-11-30 Semiconductor light-emitting element and light-emitting device using it

Publications (1)

Publication Number Publication Date
JPH07153994A true JPH07153994A (en) 1995-06-16

Family

ID=18182845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32598893A Pending JPH07153994A (en) 1993-11-30 1993-11-30 Semiconductor light-emitting element and light-emitting device using it

Country Status (1)

Country Link
JP (1) JPH07153994A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7654638B2 (en) 2000-12-21 2010-02-02 Silverbrook Research Pty Ltd Modular inkjet printhead with mating formations
JP2012134496A (en) * 2010-12-17 2012-07-12 Samsung Led Co Ltd Led light source module and display device including the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7654638B2 (en) 2000-12-21 2010-02-02 Silverbrook Research Pty Ltd Modular inkjet printhead with mating formations
US8292405B2 (en) 2000-12-21 2012-10-23 Zamtec Limited Modular inkjet printhead with mating formations
JP2012134496A (en) * 2010-12-17 2012-07-12 Samsung Led Co Ltd Led light source module and display device including the same

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