JPH07121444A - Auxiliary storage device - Google Patents

Abstract

PURPOSE:To inexpensively provide an auxiliary storage device capable of ensuring the write of specified data and satisfactrily holding the capacity of a cache memory capable of high-speed access at the time of occurrence of a fault in a power source while writing data. CONSTITUTION:In the case of occurrence of the fault in the power source at the time of storing data stored in a buffer memory 13 in a disk 14, the device executes restoring processing which writes only data, which is temporarily stored in a nonvolatile memory 13a, in the disk 14 after restoring the fault of the power source.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an auxiliary storage device having a volatile memory and a non-volatile memory as a buffer memory.

[0002]

2. Description of the Related Art Conventionally, in order to speed up access to an auxiliary storage device represented by a disk device, a buffer memory that serves as a bridge between the CPU and the disk device is often used.

This buffer memory is generally known as a cache memory that temporarily stores data to be read from the disk device by the CPU and reads the data from the buffer memory when the data is read again. ing. In this case, a high-speed accessible memory chip such as a static RAM (SRAM) is used.

The buffer memory not only serves as the cache memory to speed up access, but also
It is also used as a write buffer when writing data.

For example, in Japanese Patent Laid-Open No. 64-66727, a non-volatile memory having a role of a write buffer is provided in a disk device, and data that has not been completely written due to a power failure occurs in the nonvolatile memory after the power is restored. There is disclosed a disk access control method that guarantees writing of data by performing rewriting using a non-volatile memory.

However, according to the above-mentioned conventional technique, it is necessary to hold a large amount of non-volatile memory because it is necessary to hold all the data and the like required for rewriting in the non-volatile memory, and it is recognized that the writing is incomplete. Also, since all the data is rewritten to the disk device, there is a problem that it takes a long time to rewrite after recovery from the power failure.

For this reason, Japanese Patent Application Laid-Open No. 4-138540 discloses a memory backup method that can cope with a power failure at low cost by configuring a part of the main memory with a volatile memory with a battery backup. .

However, the above-mentioned conventional technique is made only from the viewpoint of data protection at the time of writing, and does not consider high-speed access at the time of reading as a cache memory. Therefore, the target file on the volatile memory that is not backed up by the battery cannot be accessed at high speed.

Therefore, in order to increase the number of target files that can be accessed at high speed using the above-mentioned conventional technique, it is necessary to increase the capacity of the volatile memory portion with a battery backup that operates as a cache memory. Will be needed.

[0010]

As described above, even if the above-mentioned conventional technique is used, it is not possible to simultaneously satisfy both requirements of data protection due to power supply abnormality at the time of writing and high-speed accessibility at the time of reading. .

In view of the above, the present invention solves the above-mentioned problems, and when a power failure occurs during data writing, it is possible to guarantee writing of specific data and to have a sufficient capacity of a cache memory that can be accessed at high speed. It is an object of the present invention to provide an auxiliary storage device that can be stored in a memory at low cost.

[0012]

To achieve the above object, the present invention comprises a main memory unit for storing data and a buffer memory, and when writing data to the main memory unit and the main memory unit. In an auxiliary storage device for temporarily storing the data in the buffer memory when reading the data from the storage device, the buffer memory includes a first storage unit made of a non-volatile memory and a second storage unit made of a volatile memory. When writing data to the main storage unit, specific data is selectively stored in the first storage unit, and when a power failure occurs, the specific storage unit is stored in the first storage unit. It is characterized by comprising control means for performing a restoration process by writing only the stored data to the main memory after the power failure is restored.

[0013]

According to the present invention, when a power failure occurs when the data stored in the buffer memory is stored in the main memory, the data is temporarily stored in the first storage means after the power failure is restored. A recovery process of writing only data to the main memory is performed. As a result, it is possible to selectively guarantee writing of specific data and perform a quick recovery process.

When writing data to the main storage unit and reading data from the main storage unit, the data is temporarily stored in the buffer memory composed of the first storage unit and the second storage unit. Therefore, the capacity of the cache memory can be sufficiently held.

Here, whether the first storage means is used or the second storage means is used.
By using the selection information to determine whether or not to use the storage means, it is possible for the user to determine whether or not writing is guaranteed for each data.

Further, by deciding whether to use the first storage means or the second storage means according to the address information of the main storage portion, the user does not have to select the buffer memory. , Writing specific data can be guaranteed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A disk device will be described below as an embodiment of an auxiliary storage device according to the present invention with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of a disk device according to the present invention.

As shown in FIG. 1, this disk device 11
Is a control unit 12, a buffer memory 13, and a disk device 1.
4 and a data bus 15.

The control unit 12 controls writing to the disk 14 and reading from the disk 14, and in any case, controls via the buffer memory 13.

Specifically, if write data for writing to the disk 14 is received from the data bus 15,
It is determined whether the write data is write-guaranteed data using a non-volatile memory (hereinafter referred to as "NVRAM") as a buffer memory by referring to the address information regarding the storage location of the disk 14 given to the write data. However, if the data is guaranteed write data, NVRA
The data is controlled to be stored in a predetermined position on the disk 14 via M.

When a data read instruction is received, data existing in the buffer memory 13 is sent from the buffer memory 13, and data not existing in the buffer memory 13 is sent from the disk 14 to the buffer memory 1.
The data is controlled so as to be sent to the data bus 15 via No. 3.

The buffer memory 13 speeds up access by reading the same data from the buffer memory 13 instead of the disk 14 when reading the same data a plurality of times, and during writing when storing write data in the disk 14. Volatile memory 13b (hereinafter referred to as "RAM13").
b ”) and NVRAM 13a.

The volatile memory 13b is a memory whose contents are refreshed when the power supply is stopped, and an SRAM which can be accessed at high speed or a dynamic RAM (DRAM) which is highly integrated and economical is used as a memory chip.

The NVRAM 13a is a memory that can retain the contents of the memory even when the power supply is stopped, and an SRAM backed up by a battery or the like is used.

The disk 14 is the main body of the disk device and holds write data on the disk.
Various disks such as magnetic disks and optical disks are used as the disks used here.

Next, the overall processing performed by the control unit 12 of the disk device 11 having the above configuration will be described with reference to FIG.

As shown in FIG. 2, the disk device 11 confirms the presence / absence of an input / output request (S201). If there is no input / output request, it is confirmed whether or not unwritten data exists in the buffer memory 13 (step S201). S202). If there is unwritten data, a predetermined amount of the data is swept onto the disk 14 (S203).

The above processing is repeated until an input / output request is made, and the unwritten data that remains in the buffer memory 13 is flushed to the disk 14.

Even if the power failure occurs while writing to the disk 14 from the nonvolatile memory 13a and the writing to the disk 14 is not normally completed, the disk 14 is written to the disk 14 by the above processing after the power is restored. Will be rewritten.

When an input / output request is issued in the input / output request waiting state (S201), it is confirmed whether the request is a write request or a read request (S204). After performing the reading process (S205) via the, the process shifts to the input / output request waiting state (S201).

On the other hand, if the request is a write request, the address of the disk 14 in which the data is written is referenced to confirm whether or not the write is guaranteed (S206).

The guarantee of writing is to rewrite the contents stored in the buffer memory after the power is restored, even if a power failure occurs during writing from the buffer memory 13 storing the received data to the disk 14. It refers to guaranteeing the writing of data to the disk 14.

To guarantee this writing, the NVR
Guaranteed write processing using AM 13a (S207)
After that, the process shifts to the I / O request waiting state (S201). On the other hand, when the write guarantee is not performed, the RAM1
After performing the write process without guarantee (S208) using the free area of 3b or NVRAM 13a, it shifts to the I / O request waiting state (S201).

By performing the above series of processing, the data in the cache 13 is swept out to the disk 14 when there is no input / output request, and it operates as a buffer memory which can be accessed at high speed when there is a read request.
When a write request is made, it can function as a write buffer that protects predetermined data.

Next, among the above-mentioned processes, a writing process (S203) and a reading process (S2) for the disk 14 are performed.
05), guaranteed write processing (S207) and non-guaranteed write processing (S208) will be described in detail.

FIG. 3 is a flow chart showing the flow of the sweeping process (S203) for the disk 14.

As shown in FIG. 3, when the write data is received from the data bus 15, it is first checked whether the write data for the disk 14 is on the NVRAM 13a (S301), and if the write data exists. Stores the data in the disk 14 (S30
3).

Next, it is confirmed whether or not the write data exists on the RAM 13b (S302), and if the write data exists, the data is stored in the disk 14 (S303).

As for the data that has been written, it plays the role of cache data that can be accessed at high speed at the time of reading, so the attribute of the data is changed to read data to distinguish it from unwritten data (S30).
4). Instead of changing the data attribute, a flag or the like generally used in the conventional method can be used.

By performing the above processing, NVRAM
The write data on 13a and RAM 13b can be swept out to the disk 14.

Since a power failure occurs in the middle of writing to the disk 14 and data in the NVRAM that has not been completely written is retained, rewriting can be executed by the above processing.

FIG. 4 is a flowchart showing the flow of the reading process.

As shown in FIG. 4, when a read request is issued to the disk device 11, it is confirmed whether or not the data to be read exists in the buffer memory 13 (S401), and the buffer memory If it exists on the data buffer 13, the corresponding data is read from the buffer memory 13 (S409) and sent to the data bus 15.

On the other hand, when the data is not present in the buffer memory, the data on the disk 14 is read, but it is necessary to check whether or not an area where this data can be cached can be secured in the buffer memory 13. is there.

Therefore, it is first checked whether or not there is a free area in the RAM 13b (S402), and if there is a free area, the RAM 13b is adopted as a buffer memory,
After reading the corresponding data from the disk 14 (S40
In 3), the data is sent to the data bus 15 (S40).
9).

On the other hand, if the RAM 13b has no free space, it is further checked whether or not there is a free area in the NVRAM 13a (S404). It is checked whether or not it exists (S40
5).

Here, the reason for checking the read data is
This is because the write data existing on the buffer memory 13 is data that has not been written and cannot be discarded.

When the read data exists in the buffer memory 13, the oldest read data which is considered to have the lowest utilization is invalidated (S407), and after the data is read into the area (S408). The data is sent to the data bus 15 (S409).

By the way, when there is no read data in the buffer memory 13, the buffer memory 1 is read at this point.
3 means that it is in a full state, so after performing the sweep-out processing (S406) described in FIG. 3 to secure an empty area, the process proceeds to S402.

By performing the above processing, the read data is always cached in the buffer memory 13.

FIG. 5 shows a guaranteed write process (S20
It is a flowchart which shows the flow of 7).

As shown in FIG. 5, when the data write address corresponds to the NVRAM 13a,
The data will be cached in the NVRAM 13a.

More specifically, first, since a mistake occurs when there are a plurality of data having the same data name, it is confirmed whether the data is cached in the buffer memory 13 (S501). The data on the buffer memory is invalidated (S502).

Next, it is confirmed whether or not there is a free area in the NVRAM 13a where the data can be cached (S503). If there is a free area, NVRA is used.
The data is read into M13a (S507).

On the other hand, when there is no free area in the NVRAM 13a, it is confirmed whether there is read data in the NVRAM 13a (S504), as in the read process shown in FIG. 4, and there is read data. If so, the oldest read data is invalidated (S506) and the data is written in the corresponding portion (S507).

If there is no read data in the NVRAM 13a, the NVRAM 13a, FIG.
After the flushing process (S505) for the disk 14 described in 1) is performed to secure an empty area, S5 is performed.
Move to 03.

By carrying out the above processing, the data having the specific address information is always cached in the NVRAM 13a.

FIG. 6 shows a write process without guarantee (S20
It is a flow chart which shows a flow of 8).

As shown in FIG. 6, when the write guarantee is not performed, it is not necessary to distinguish between the NVRAM 13a and the RAM 13b. Therefore, the process for the NVRAM 13a shown in FIG. 5 is replaced with the process using the buffer memory 13. Can be realized.

By performing the write process without guarantee (S208) and the write process with guarantee (S207), all write data is cached in the buffer memory 13. Therefore, after the write is completed, the data can be written at high speed. It becomes possible to access.

By performing the series of processes described above, even if a power failure occurs during data writing,
Writing of data having specific address information can be guaranteed, and high-speed access as a buffer memory can be maintained.

In the above embodiment, the write guarantee is made for the data having the specific address information, but the NVRAM 13a or RAM 13b is used as the data.
It is also possible to guarantee the writing of specific information by using the selection information indicating which one has been selected.

In the above embodiment, the NVRAM is used.
13a and the RAM 13b are handled in the same manner, but a dynamic RAM (DRAM) having a high degree of integration and a low price can be used as the RAM 13b, and it can be assumed that sufficient RAM is mounted.
In this case, in the reading process shown in FIG.
It is not necessary to perform the confirmation processing of the empty area of the NVRAM 13a performed in 04.

As described above, in this embodiment, the nonvolatile memory (NVRAM 13a) and the volatile memory (RA
M13b) is attached to the disk device 11 as the buffer memory 13 and is configured to perform cache control using the address information of the data, so that it has specific address information when a power failure occurs during data writing. Data can be guaranteed to be written by using the NVRAM 13a.

Since only the data having the specific address information is cached in the NVRAM 13a, the flushing process can be performed quickly when the power is restored.

Further, as the buffer memory 13, the NVR
Since not only the AM 13a but also the RAM 13b can be used, a sufficient cache capacity can be held.

Further, the disk device 11 can be constructed at a lower cost than when the buffer memory 13 is entirely composed of the non-volatile memory 13a.

In this embodiment, the case where the buffer memory 13 is incorporated in the disk device 11 has been described, but the present invention is not limited to this, and the buffer memory 13 is attached to the computer main body side and an external device. Can also be configured as.

[0070]

As described in detail above, according to the present invention, a non-volatile memory and a volatile memory are mounted on an auxiliary storage device as a buffer memory, and the buffer memory is used as a cache memory at the time of reading and is also used at the time of writing. Since it is configured to operate as a write buffer, it has the following advantages.

1) When a power failure occurs during data writing, it is possible to guarantee the writing of specific data held in the non-volatile memory, and it is possible to sufficiently hold the capacity of the cache memory. Become.

2) The buffer memory can be constructed at a low cost as compared with the case where the buffer memory is composed of only the non-volatile memory.

3) When data that has not been completely written due to a power supply error during writing is written after the power is restored, only the specific data held in the non-volatile memory is written, so recovery processing is performed quickly. It becomes possible.

4) Since the non-volatile memory and the volatile memory can be used as the buffer memory, it is possible to sufficiently hold the capacity of the buffer memory.

5) In the second invention, the buffer memory to be used can be selected for each data according to the data characteristics such as the importance and the confidentiality.

6) In the third invention, since the buffer memory is controlled based on the address information added to the data,
The operation of selecting the buffer memory to be used for each data can be omitted, and the buffer memory can be transparently constructed.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a disk device that is an embodiment of the present invention.

FIG. 2 is a flowchart showing a flow of overall processing performed by a control unit shown in FIG.

FIG. 3 is a flowchart showing a flow of sweeping processing shown in FIG.

FIG. 4 is a flowchart showing the flow of read processing shown in FIG.

5 is a flowchart showing the flow of guaranteed write processing shown in FIG. 2. FIG.

FIG. 6 is a flowchart showing the flow of write processing without guarantee shown in FIG.

[Explanation of symbols]

11 disk device, 12 control unit, 13 buffer memory, 13a non-volatile memory, 13b volatile memory, 14 disk, 15 data bus

Claims (3)

[Claims] 1. A buffer memory comprising: a main memory unit for storing data; and a buffer memory, wherein the data is temporarily written in the main memory unit and in reading the data from the main memory unit. In the auxiliary storage device, the buffer memory includes: a first storage unit made of a non-volatile memory; and a second storage unit made of a volatile memory, and writes data to the main storage unit. At this time, the specific data is selectively stored in the first storage means, and when a power failure occurs, only the data stored in the first storage means is restored after the power failure is restored. An auxiliary storage device comprising a control means for performing a recovery process by writing in a storage unit. 2. The control means determines whether to write the data in the first storage means or the second storage means according to the selection information given when writing the data. The auxiliary storage device according to claim 1. 3. The control means determines whether to write the data in the first storage means or the second storage means according to the address information of the main storage portion given when writing the data. The auxiliary storage device according to claim 1, wherein: