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JPH07113150B2 - Thin film forming equipment - Google Patents

Thin film forming equipment

Info

Publication number
JPH07113150B2
JPH07113150B2 JP15782483A JP15782483A JPH07113150B2 JP H07113150 B2 JPH07113150 B2 JP H07113150B2 JP 15782483 A JP15782483 A JP 15782483A JP 15782483 A JP15782483 A JP 15782483A JP H07113150 B2 JPH07113150 B2 JP H07113150B2
Authority
JP
Japan
Prior art keywords
unit
section
main body
thin film
film forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP15782483A
Other languages
Japanese (ja)
Other versions
JPS6050162A (en
Inventor
宏 中村
政邦 秋葉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15782483A priority Critical patent/JPH07113150B2/en
Publication of JPS6050162A publication Critical patent/JPS6050162A/en
Publication of JPH07113150B2 publication Critical patent/JPH07113150B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/02Pretreatment of the material to be coated
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/56Apparatus specially adapted for continuous coating; Arrangements for maintaining the vacuum, e.g. vacuum locks

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  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、半導体ウエーハに薄膜を形成する薄膜形成装
置に関するものである。
TECHNICAL FIELD The present invention relates to a thin film forming apparatus for forming a thin film on a semiconductor wafer.

〔背景技術〕[Background technology]

一般にIC,LSI,トランジスタ等の半導体装置の製造に際
しては蒸着又はスパッタ等の方法による薄膜を形成する
工程が必要とされる。例えば、半導体ウエーハの主面に
形成した素子間の配線材料としてAl膜が利用され、この
Al膜をスパッタ法により形成することがある。ところ
で、このAl膜のスパッタ形成に際しては、半導体ウエー
ハの表面に吸着ガスや水分が付着していると、形成した
Al膜に良質のものが得られ難い。このため、前処理とし
て半導体ウエーハを真空炉内に入れてこれをベークし、
このベークによって表面の吸着ガスや水分を除去する必
要がある。よって、薄膜を形成する装置も第1図に示す
ように、ロード部1、ベーク部2、エッチ部3、スパッ
タ部4、アンロード部5を一連に形成し、半導体ウエー
ハWを前記各部内で順序的に移動させかつ処理すること
により真空ベークおよびスパッタ成膜の処理を行なうよ
うに構成することを考えた。前記エッチ部3は半導体ウ
エーハ表面の酸化膜を除去するためのものであり、所謂
ドライエッチ法が採用されている。
Generally, when manufacturing a semiconductor device such as an IC, LSI, or transistor, a step of forming a thin film by a method such as vapor deposition or sputtering is required. For example, an Al film is used as a wiring material between elements formed on the main surface of a semiconductor wafer.
The Al film may be formed by a sputtering method. By the way, when the Al film was formed by sputtering, it was found that the adsorbed gas or moisture adhered to the surface of the semiconductor wafer.
It is difficult to obtain a good quality Al film. Therefore, as a pretreatment, the semiconductor wafer is put in a vacuum furnace and baked,
It is necessary to remove the adsorbed gas and moisture on the surface by this baking. Therefore, as shown in FIG. 1, the apparatus for forming a thin film also has a loading unit 1, a baking unit 2, an etching unit 3, a sputtering unit 4, and an unloading unit 5 formed in series to form a semiconductor wafer W in each of the above units. It was considered that the vacuum baking and the sputtering film formation are performed by sequentially moving and processing. The etching part 3 is for removing an oxide film on the surface of the semiconductor wafer, and a so-called dry etching method is adopted.

しかしながら、実際に良質のAl膜を形成するためには、
真空ベークをベーク部2において十分に時間をかけて行
なわなければならず、この処理時間がエッチ部3、スパ
ッタ部4における処理時間に較べて長いものになる。こ
のため、第1図の装置を使用したAl膜形成ではベーク部
2における処理時間のみが長くなり、結局この装置で半
導体ウエーハを連続的に処理しようとしてもベーク部2
の処理がネックになって効率のよいAl膜形成を行なうこ
とが難しいものになる。処理効率を上げるためにベーク
時間を短縮すれば、特に付着水分の除去が不十分とな
り、質の悪い膜が形成されてスループットが低下され
る。
However, in order to actually form a high-quality Al film,
Vacuum baking must be performed in the baking unit 2 for a sufficient time, and this processing time is longer than the processing time in the etching unit 3 and the sputtering unit 4. For this reason, in the Al film formation using the apparatus of FIG. 1, only the processing time in the bake section 2 becomes long, and even if an attempt is made to continuously process semiconductor wafers with this apparatus, the bake section 2 will be used.
This becomes a bottleneck, making it difficult to form an efficient Al film. If the baking time is shortened in order to improve the processing efficiency, the removal of the adhering water becomes insufficient in particular, a poor quality film is formed, and the throughput is lowered.

〔発明の目的〕[Object of the Invention]

本発明の目的は、半導体ウエーハを一枚ずつ処理する枚
葉処理による薄膜形成において、個々を半導体ウエーハ
の真空ベーク処理や薄膜形成における所要時間の長短に
影響されることなく、良質の薄膜を高効率で形成するこ
とが可能な薄膜形成装置を提供することにある。
An object of the present invention is to form a thin film of high quality by thin film formation by single-wafer treatment of semiconductor wafers one by one, without being affected by the length of time required for vacuum baking treatment or thin film formation of the semiconductor wafer. An object of the present invention is to provide a thin film forming apparatus that can be formed efficiently.

本発明の前記ならびにそのほかの目的と新規な特徴は、
本明細書の記述および添付図面からあきらかになるであ
ろう。
The above and other objects and novel characteristics of the present invention are
It will be apparent from the description of the present specification and the accompanying drawings.

〔発明の概要〕[Outline of Invention]

本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。
The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows.

すなわち、本発明の薄膜形成装置は、 互いに独立に設けられた第1および第2の本体と、第2
の本体から第1の本体へと半導体ウエーハの搬送を行う
搬送手段とからなり、 第1の本体は、 薄膜形成前の半導体ウエーハを一枚ずつ個別に加熱して
表面の吸着ガスや吸着水分を除去する真空ベーク部、 薄膜形成前の半導体ウエーハを一枚ずつ個別にエッチン
グして表面の不要膜を除去するエッチ部、 エッチング済みの半導体ウエーハの表面に一枚ずつ個別
に薄膜を形成する膜形成部、 外部から半導体アエーハを一枚ずつ個別に真空ベーク部
に供給する第1のローダ部、 膜形成部から膜形成済みの半導体ウエーハを一枚ずつ個
別に取り出して外部に搬出する第1のアンローダ部、 第1のローダ部、真空ベーク部、エッチ部、膜形成部お
よび第1のアンローダ部の各々の間を開閉自在に仕切る
複数の第1のゲードバルブ、 からなり、 第2の本体は、 半導体ウエーハを一枚ずつ収容する真空チャンバ内に設
けられたヒータによって半導体ウエーハを加熱すること
により、表面の吸着ガスや吸着水分を除去する予備真空
ベーク部、 予備真空ベーク部の前後に配置され、当該予備真空ベー
ク部に対する半導体ウエーハの搬入および搬出を一枚ず
つ個別に行う第2のローダ部および第2のアンローダ
部、 予備真空ベーク部、第2のローダ部、および第2のアン
ローダ部の各々の間を開閉自在に仕切る複数の第2のゲ
ードバルブ、 からなる、 ものである。
That is, the thin film forming apparatus of the present invention includes the first and second main bodies, which are provided independently of each other, and the second main body.
Of the semiconductor wafer from the main body of the semiconductor wafer to the first main body, and the first main body individually heats the semiconductor wafers before thin film formation one by one to remove adsorbed gas and adsorbed water on the surface. Vacuum bake part to remove, etching part to remove unnecessary film on the surface by individually etching each semiconductor wafer before thin film formation, film formation to individually form thin film on the surface of etched semiconductor wafer Section, a first loader section for individually supplying semiconductor wafers from the outside to the vacuum bake section, and a first unloader for individually taking out film-formed semiconductor wafers one by one from the film forming section and carrying them out to the outside. The first loader section, the vacuum bake section, the etch section, the film forming section, and the first unloader section, and a plurality of first gated valves partitioning the opening and closing freely. The main body consists of a preliminary vacuum bake unit that removes adsorbed gas and adsorbed water on the surface by heating the semiconductor wafer with a heater provided in a vacuum chamber that houses the semiconductor wafers one by one, and before and after the preliminary vacuum bake unit. A second loader section and a second unloader section, which are arranged and individually carry in and out semiconductor wafers to and from the preliminary vacuum bake section, a preliminary vacuum bake section, a second loader section, and a second unloader. And a plurality of second gated valves for partitioning each of the parts so as to be openable and closable.

〔実施例1〕 第2図は本発明の薄膜形成装置の一実施例を示す。図に
おいて、10は薄膜形成装置でありローダ部12(第1のロ
ーダ部)、真空ベーク部13、エッチ部14、膜形成部15、
アンローダ部16(第1のアンローダ部)を一体に並設し
ている。即ち、これらの各部は容器状本体11(第1の本
体)の両端および各部間に設けたゲードバルブ17〜22
(第1のゲートバルブ)により各室に区画され、かつ真
空ポンプ23を介装した排気管24を接続して内部を真空状
態に保持している。そして、表面に薄膜が形成される試
料としての半導体ウエーハWは各ゲートバルブ17〜22を
通して適宜治具によりローダ部12からアンローダ部16へ
と移動される。
[Embodiment 1] FIG. 2 shows an embodiment of the thin film forming apparatus of the present invention. In the figure, 10 is a thin film forming apparatus, which is a loader unit 12 (first loader unit), a vacuum bake unit 13, an etching unit 14, a film forming unit 15,
The unloader section 16 (first unloader section) is integrally arranged in parallel. That is, these respective parts are the gate valves 17 to 22 provided at both ends of the container-shaped main body 11 (first main body) and between the respective parts.
An exhaust pipe 24, which is divided into each chamber by a (first gate valve) and has a vacuum pump 23 interposed, is connected to maintain the inside in a vacuum state. Then, a semiconductor wafer W as a sample on which a thin film is formed on the surface is moved from the loader unit 12 to the unloader unit 16 by an appropriate jig through the gate valves 17 to 22.

前記真空ベーク部13はヒータ25を有し、ウエーハWを真
空状態で加熱してウエーハ表面に吸着したガスや付着し
た水分を除去する。エッチ部14は電極構体26を有すると
共にエッチガス供給管27を接続し、ウエーハW表面の酸
化膜等の不要膜をドライエッチング、例えばプラズマエ
ッチングする。膜形成部15は電極構体28およびターゲッ
ト29(本例ではAlターゲット)を有すると共に、反応ガ
ス供給管30を接続し、ウエーハW表面にAl薄膜をスパッ
タ形成する。
The vacuum bake unit 13 has a heater 25 and heats the wafer W in a vacuum state to remove the gas adsorbed on the wafer surface and the adhering moisture. The etching section 14 has an electrode assembly 26 and is connected to an etching gas supply pipe 27, and dry-etches, for example, plasma-etches an unnecessary film such as an oxide film on the surface of the wafer W. The film forming unit 15 has an electrode structure 28 and a target 29 (Al target in this example), is connected to a reaction gas supply pipe 30, and sputters an Al thin film on the surface of the wafer W.

一方、前記本体11の前工程位置には独立して容器状の予
備処理本体31(第2の本体)を配設している。この予備
処理本体31はローダ部32(第2のローダ)、予備真空ベ
ーク部33、アンローダ部34(第2のアンローダ部)とで
構成され、各部は本体31に設けたゲートバルブ35〜38
(第2のゲートバルブ)により区画され、ウエーハWは
ローダ部32からアンローダ部34へと移動される。また、
各部には前記排気管24の一部が延設接続され、各部32,3
3,34内を真空状態にする。なお、予備真空ベーク部33は
ローダ部32,アンローダ部33よりも高真空に保たれてい
る。そして、前記予備真空ベーク部33内にはヒータ42を
内装し、内部に移動されたウエーハWを加熱処理するこ
とができる。
On the other hand, a pretreatment main body 31 (second main body) in the form of a container is independently provided at the previous process position of the main body 11. The pretreatment main body 31 is composed of a loader section 32 (second loader), a preliminary vacuum bake section 33, and an unloader section 34 (second unloader section), and each section is provided with gate valves 35 to 38 provided on the main body 31.
The wafer W is partitioned by the (second gate valve) and moved from the loader unit 32 to the unloader unit 34. Also,
A part of the exhaust pipe 24 is extendedly connected to each part, and each part 32, 3
Make a vacuum inside 3,34. The preliminary vacuum bake unit 33 is kept at a higher vacuum than the loader unit 32 and the unloader unit 33. A heater 42 is installed inside the preliminary vacuum bake unit 33 so that the wafer W moved inside can be heat-treated.

図中、39,40,41は搬送手段であり、夫々図示矢印方向に
ウエーハWを搬送することができる。
In the figure, 39, 40, 41 are transfer means, respectively, which can transfer the wafer W in the direction of the arrow shown.

次に以上の構成になる本実施例装置の作用と共に本発明
方法を説明する。先ず、ウエーハWは搬送手段39により
予備処理本体31のローダ部32内に搬入され、ここで外気
と遮断された状態でゲートバルブ36を通して予備真空ベ
ーク部33内にセットされ、ヒータ42により加熱(ベー
ク)される。これにより、ウエーハWは表面に吸着した
ガスや付着した水分が除去される。このベークは比較的
に短い時間であり、ガスや水分は大部分が除去されるが
幾分は残存される。その後ウエーハWはアンロード部34
を通して本体31外に搬出される。この間においても、ウ
エーハWでは残熱によりガスや水分が若干除去される。
Next, the method of the present invention will be described together with the operation of the apparatus of the present embodiment having the above-mentioned configuration. First, the wafer W is carried into the loader section 32 of the pretreatment main body 31 by the transfer means 39, set in the prevacuum bake section 33 through the gate valve 36 while being shielded from the outside air, and heated by the heater 42 ( Bake). As a result, the gas adsorbed on the surface of the wafer W and the attached water are removed. This bake is a relatively short period of time, with most of the gas and water removed but some remains. After that, the wafer W is unloading part 34
Through the main body 31. Even during this period, some gas and moisture are removed from the wafer W by the residual heat.

次いでウエーハWは搬送手段40により本体11のローダ部
12内に移動され、ここで外気と遮断された上でゲートバ
ルブ18を通して真空ベーク部13に搬入される。ずっと、
ここでもウエーハWはヒータ25により加熱され、前述と
同様にガス,水分の除去が行なわれる。この場合、ウエ
ーハでは大部分のガス,水分が前工程において除去され
ているので残存ガス,水分を除去するだけでよく、同様
に短い時間のベークを行なうだけで殆んど全部のガス,
水分を除去することができる。実際には、真空ベーク一
度のみで行なう場合のベーク時間の約半分の時間で前記
各ベーク部33,13の処理を行なうことができる。
Next, the wafer W is transferred by the transfer means 40 to the loader section of the main body 11.
It is moved into the inside 12, where it is cut off from the outside air, and is then carried into the vacuum baking section 13 through the gate valve 18. Forever
In this case as well, the wafer W is heated by the heater 25, and gas and moisture are removed in the same manner as described above. In this case, since most of the gas and water are removed from the wafer in the previous step, it is only necessary to remove the residual gas and water, and similarly, almost all the gas and water are removed by baking for a short time.
Water can be removed. Actually, the processing of each of the baking units 33 and 13 can be performed in about half the baking time in the case of performing vacuum baking only once.

ベークの完了したウエーハWはゲートバルブ19を通して
エッチ部14へ移動され、ここで例えばプラズマエッチン
グによって表面の酸化膜等がエッチング除去され、ウエ
ーハの表面(活性面)が露呈される。その上でウエーハ
Wをゲートバルブ20を通して膜形成部15に移動し、スパ
ッタ法によるAl薄膜を形成する。形成された薄膜は、2
工程のベークによって吸着ガス,水分が良好に除去され
ているため高品質のものとされる。膜形成されたウエー
ハWはゲートバルブ21からアンローダ部16へ移動され、
更にアンローダ部16から本体11外に出された後に搬送手
段41によって次工程へ搬送されることになる。
The baked wafer W is moved to the etching section 14 through the gate valve 19, where an oxide film or the like on the surface is removed by etching, for example, to expose the surface (active surface) of the wafer. Then, the wafer W is moved to the film forming portion 15 through the gate valve 20 to form an Al thin film by the sputtering method. The thin film formed is 2
Since the adsorbed gas and moisture are well removed by baking in the process, it is of high quality. The film-formed wafer W is moved from the gate valve 21 to the unloader section 16,
Further, after being ejected from the unloader unit 16 to the outside of the main body 11, it is conveyed to the next step by the conveying means 41.

そして、前述した一連のウエーハ成膜工程にあっては、
予備真空ベーク部33と真空ベーク部13の各ベーク処理時
間が一度だけ真空ベークを行なう場合の約半分に短縮で
きるので、各ベーク処理時間をエッチ部14や膜形成部15
の各処理時間に近いものにできる。したがって、ウエー
ハの各部における処理時間を略均一化しでき、これによ
りウエーハを順次処理する連続処理が可能になり、処理
効率、つまり成膜効率を高いものにできる。なお、本実
施例においては、搬送手段40において、ウエーハが外気
にさらされているが、一度真空ベークした場合、再度ウ
エーハに付着する水分やガスの量は微量なもので問題は
ない。
Then, in the series of wafer film forming steps described above,
Since each bake processing time of the preliminary vacuum bake unit 33 and the vacuum bake unit 13 can be reduced to about half that in the case of performing a vacuum bake only once, each bake processing time is reduced to the etching unit 14 or the film forming unit 15.
Can be close to each processing time. Therefore, the processing time in each part of the wafer can be made substantially uniform, whereby continuous processing of sequentially processing the wafer becomes possible, and processing efficiency, that is, film forming efficiency can be increased. Note that, in the present embodiment, the wafer is exposed to the outside air in the transfer means 40, but once vacuum-baked, the amount of water or gas adhering to the wafer again is very small, and there is no problem.

〔効 果〕[Effect]

(1) ウエーハの膜形成前に予備真空ベークと真空ベ
ークとを、互いに独立な第2の本体の予備真空ベーク部
および第1の本体の真空ベーク部で独立して行うので、
各ベークにおける所要時間を短縮し充分なベーク時間を
確保して吸着ガスと付着水分の除去を確実に行うことが
できるとともに、第1の本体における膜形成部と真空ベ
ーク部および第1のアンローダ部とが第1のゲートバル
ブによって完全に隔絶された状態で膜形成が行われるの
で、膜形成部における外部異物による汚染の懸念がな
く、ウエーハに良質な薄膜を形成できる。
(1) Since the preliminary vacuum bake and the vacuum bake are independently performed by the preliminary vacuum bake section of the second main body and the vacuum bake section of the first main body, which are independent of each other, before the film formation of the wafer.
The time required for each bake can be shortened and a sufficient bake time can be secured to reliably remove adsorbed gas and adhering water, and at the same time, the film forming part, the vacuum bake part and the first unloader part in the first main body. Since the film formation is performed with the first gate valve completely isolated from each other, there is no concern of contamination by external foreign matter in the film formation portion, and a good quality thin film can be formed on the wafer.

また、第1の本体に設けられた膜形成部での薄膜形成処
理の所要時間と、第2の本体内の予備真空ベーク部にお
ける予備真空ベークの所要時間との間に差があっても、
互いに他の処理のために待たされることがない。
Further, even if there is a difference between the time required for the thin film forming process in the film forming unit provided in the first main body and the time required for the preliminary vacuum bake in the preliminary vacuum bake unit in the second main body,
There is no need to wait for each other's processing.

この結果、半導体ウエーハを一枚ずつ処理する枚葉処理
による薄膜形成において、個々の半導体ウエーハの真空
ベーク処理や薄膜形成における所要時間の長短に影響さ
れることなく、良質の薄膜を高効率で形成することがで
きる、という効果が得られる。
As a result, in thin film formation by single-wafer processing that processes semiconductor wafers one by one, high-quality thin films can be formed with high efficiency without being affected by the length of time required for vacuum baking processing and thin film formation of individual semiconductor wafers. The effect of being able to do is obtained.

以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。たとえば、膜形成部に
は蒸着やCVD法を用いるようにしてもよい。
Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and can be variously modified without departing from the scope of the invention. Nor. For example, vapor deposition or a CVD method may be used for the film forming portion.

【図面の簡単な説明】[Brief description of drawings]

第1図は考えられる装置の一例の模式構成図、 第2図は本発明の一実施例の全体構成図、 12……ロード部、13……真空ベーク部、14……エッチ
部、15……膜形成部、16……アンロード部、17〜22……
ゲートバルブ、23……真空ポンプ、24……排気管、25…
…ヒータ、26……電極構体、28……電極構体、32……ロ
ード部、33……予備真空ベーク部、34……アンロード
部、35〜38……ゲートバルブ、39〜41……搬送手段、42
……ヒータ、
FIG. 1 is a schematic configuration diagram of an example of a possible device, and FIG. 2 is an overall configuration diagram of an embodiment of the present invention, 12 ... load section, 13 ... vacuum bake section, 14 ... etch section, 15 ... … Film formation part, 16 …… Unload part, 17〜22 ……
Gate valve, 23 ... vacuum pump, 24 ... exhaust pipe, 25 ...
… Heater, 26 …… Electrode structure, 28 …… Electrode structure, 32 …… Load section, 33 …… Preliminary vacuum bake section, 34 …… Unload section, 35 to 38 …… Gate valve, 39 to 41 …… Transfer Means, 42
……heater,

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】互いに独立に設けられた第1および第2の
本体と、前記第2の本体から前記第1の本体へと半導体
ウエーハの搬送を行う搬送手段とからなり、 前記第1の本体は、 薄膜形成前の半導体ウエーハを一枚ずつ個別に加熱して
表面の吸着ガスや吸着水分を除去する真空ベーク部、 薄膜形成前の前記半導体ウエーハを一枚ずつ個別にエッ
チングして表面の不要膜を除去するエッチ部、 エッチング済みの前記半導体ウエーハの表面に一枚ずつ
個別に薄膜を形成する膜形成部、 外部から前記半導体ウエーハを一枚ずつ個別に前記真空
ベーク部に供給する第1のローダ部、 前記膜形成部から膜形成済みの前記半導体ウエーハを一
枚ずつ個別に取り出して外部に搬出する第1のアンロー
ダ部、 前記第1のローダ部、前記真空ベーク部、前記エッチ
部、前記膜形成部および前記第1のアンローダ部の各々
の間を開閉自在に仕切る複数の第1のゲードバルブ、か
らなり、 前記第2の本体は、 前記半導体ウエーハを一枚ずつ収容する真空チャンバ内
に設けられたヒータによって前記半導体ウエーハを加熱
することにより、表面の吸着ガスや吸着水分を除去する
予備真空ベーク部、 前記予備真空ベーク部の前後に配置され、当該予備真空
ベーク部に対する前記半導体ウエーハの搬入および搬出
を一枚ずつ個別に行う第2のローダ部および第2のアン
ローダ部、 前記予備真空ベーク部、前記第2のローダ部、および前
記第2のアンローダ部の各々の間を開閉自在に仕切る複
数の第2のゲートバルブ、からなる、 ことを特徴とする薄膜形成装置。
1. A first main body and a second main body, which are provided independently of each other, and a transfer means for transferring a semiconductor wafer from the second main body to the first main body. Is a vacuum bake unit that individually heats the semiconductor wafers before thin film formation to remove adsorbed gas and adsorbed moisture on the surface.Each semiconductor wafer before thin film formation is individually etched to eliminate the need for surface. An etching part for removing a film, a film forming part for individually forming a thin film on the surface of the semiconductor wafer after etching, and a semiconductor wafer for external supply to the vacuum bake part one by one A loader section, a first unloader section for individually taking out the film-formed semiconductor wafers one by one from the film forming section and carrying them out to the outside, the first loader section, the vacuum bake section, the A plurality of first gated valves for partitioning each of the switch portion, the film forming portion and the first unloader portion so as to be openable and closable, and the second main body accommodates the semiconductor wafers one by one. By heating the semiconductor wafer with a heater provided in a vacuum chamber, a preliminary vacuum bake unit for removing adsorbed gas and adsorbed moisture on the surface, arranged before and after the preliminary vacuum bake unit, for the preliminary vacuum bake unit. Between each of the second loader unit and the second unloader unit that individually carry in and carry out the semiconductor wafers one by one, the preliminary vacuum bake unit, the second loader unit, and the second unloader unit. A thin film forming apparatus comprising: a plurality of second gate valves for partitioning the opening and closing.
JP15782483A 1983-08-31 1983-08-31 Thin film forming equipment Expired - Lifetime JPH07113150B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15782483A JPH07113150B2 (en) 1983-08-31 1983-08-31 Thin film forming equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15782483A JPH07113150B2 (en) 1983-08-31 1983-08-31 Thin film forming equipment

Publications (2)

Publication Number Publication Date
JPS6050162A JPS6050162A (en) 1985-03-19
JPH07113150B2 true JPH07113150B2 (en) 1995-12-06

Family

ID=15658110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15782483A Expired - Lifetime JPH07113150B2 (en) 1983-08-31 1983-08-31 Thin film forming equipment

Country Status (1)

Country Link
JP (1) JPH07113150B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02159025A (en) * 1988-12-12 1990-06-19 Nec Yamaguchi Ltd Manufacturing device for semiconductor device
JPH0471230A (en) * 1990-07-11 1992-03-05 Nec Yamagata Ltd Manufacture of semiconductor device
WO2016172429A1 (en) * 2015-04-23 2016-10-27 General Plasma, Inc. Chamber valve

Also Published As

Publication number Publication date
JPS6050162A (en) 1985-03-19

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