JPH07111449A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a data output circuit which is produced by a same mask and can be coped with plural power supplies by providing a selection circuit to select whether or not a boosting circuit is in use. CONSTITUTION:An output control circuit 1 generates a drive signal phi1 or phi2 based on a data signal Data and a control signal Enable and the signal phi1 is boosted into a drive signal phi3 higher than a potential of a power supply by a boosting circuit 3 and a selection circuit 2 selects the signal phi1 or phi3 based on a Boot signal fed to a pad 4 and the selected signal is inputted to a gate of a transistor(TR) Q1 and output data Dout are provided as an output. When a picture signal voltage is 5V, a high speed output is obtained not via the boosting circuit 3 and when the power supply voltage is 3.3V, an output via the boosting circuit is obtained. Thus, the data output circuit coping with plural power supplies is produced by a same mask and the manufacturing cost is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device. In particular, the present invention relates to a data output circuit of a semiconductor device which can operate with a plurality of power supply voltages.

[0002]

2. Description of the Related Art Digital information "H" or "L"
In a semiconductor device that outputs
There is a configuration in which OS transistors are connected in series and an output is taken out from the midpoint. Since the N-channel MOS transistor uses electrons having high mobility as carriers, it operates at high speed, and a relatively small transistor can drive a large current. Therefore, even if the internal circuit structure is a complete CMOS, the final stage of the data output circuit is often composed of only N-channel MOS transistors.

When an N-channel type MOS transistor is used on the high side (power supply voltage side), as long as the gate is driven by the power supply voltage, the output voltage drops by the threshold value (threshold value drop) and the power supply is completely supplied. It does not become a voltage. A conventional product (5V product) driven by a power supply voltage of 5V regulates 2.4V or more as an "H" level, and therefore threshold drop does not pose a problem.

In recent years, attempts have been made to reduce the power supply voltage to 5 V or less in response to the miniaturization of the inside of the chip. However, when the power supply voltage is lowered, the above-mentioned threshold drop becomes a problem. For example, if the power supply voltage is 3.3
When set to V, the threshold of the MOS transistor is 1.5
Assuming V, 3.3V-1.5V = 1.8V, which is smaller than 2.4V which is the "H" level specified value. For this reason, the product corresponding to the 3.3V power supply voltage (3.3V product) has a booster circuit connected to the input stage of the N-channel MOS transistor at the final stage of the data output circuit to eliminate the threshold drop. There is.

Since the internal circuit configurations of the 5V product and the 3.3V product are almost the same, most masks can be made common in the manufacturing process. The two products can be made separately by making only the metal wiring layer different.

FIG. 4 shows an example of producing a plurality of power supply voltage products by using an output circuit using N-channel type MOS transistors. That is, the N-channel type MOS transistor Q1
, Q2, booster circuit 3, data output pad 5, and metal wiring option portions 91, 92, 93. The metal wiring option part can select whether or not to connect by the metal wiring layer. When manufacturing a 5V product, the metal wiring option unit 93
Is short-circuited and 91 and 92 are opened. As a result, the booster circuit 3 is cut off, and the signal Data is directly applied to the gate of the transistor Q1. As a result, the output data output pad 5 outputs the signal Dout whose threshold value is lower than the power supply voltage 5V. Further, when manufacturing a 3.3V product, the metal wiring option part 93 is opened, and
Short 2 As a result, the booster circuit 3 is connected to the front stage of the transistor Q1 and the booster control signal obtained by boosting the signal Data is applied to the gate of the transistor Q1. As a result, the output data output pad 5 has almost the same power supply voltage of 3.3V. The potential signal Dout is output and there is no threshold drop.

[0007] As described above, conventionally, different wirings are formed by exchanging a mask for metal wirings (mostly aluminum wirings), and products corresponding to a plurality of voltages are manufactured by changing circuit configurations.

[0008]

As described above, conventionally, different wiring is performed by replacing the mask,
They had to change the circuit configuration to make products that support multiple voltages. However, it is necessary to prepare multiple masks,
This led to an increase in costs. SUMMARY OF THE INVENTION It is an object of the present invention to eliminate the above drawbacks and provide a semiconductor device which is manufactured with the same mask and includes a data output circuit compatible with a plurality of power supplies.

[0009]

In order to achieve the above object, according to the present invention, an output control circuit (1) for generating first and second drive signals according to output data, and a first drive signal. A boosting circuit (2) for boosting the voltage to generate a boosting drive signal having a potential higher than the power supply potential, a drain connected to the power supply potential, a source connected to the output pad, and a gate receiving the first drive signal or the boosting drive signal. A first N-channel type MOS transistor (Q1) to be input, and a second N-channel type MOS transistor whose drain is connected to the output pad, source is connected to the ground potential and a second drive signal is input to the gate.
There is provided a semiconductor device including an S transistor (Q2) and a selection circuit (2) for selecting either the first drive signal or the boost drive signal and inputting it to the gate of the first N-channel MOS transistor.

[0010]

When the means provided by the present invention is used, the selection circuit selects whether to use the booster circuit or not. Therefore, a semiconductor device which is manufactured with the same mask and has a data output circuit capable of supporting a plurality of power supplies is provided. Can be provided.

[0011]

Embodiments of the present invention will be described with reference to FIGS. 1 to 3. The data output circuit used in the semiconductor device of the present invention has the configuration shown in FIG. That is, the output control circuit 1 that generates the drive signal φ1 and the drive signal φ2 according to the output data signal Data and the control signal Enable, and the booster that boosts the drive signal φ1 and generates the booster drive signal φ3 higher than the power supply potential. A circuit 2, an N-channel MOS transistor Q1 whose drain is connected to the power supply potential, whose source is connected to the output pad 5 and whose gate receives the drive signal φ1 or the boost drive signal φ3, and its drain are connected to the output pad 5. N-channel type M whose source is connected to ground potential and drive signal φ 2 is input to the gate
OS transistor Q2 and Boot applied to pad 4
The selection circuit 2 selects either the drive signal φ1 or the boost drive signal φ3 according to the t signal and inputs the selected signal to the gate of the N-channel MOS transistor Q1.

The output control circuit 1 includes AND gates 11 and 12.
And an inverter 13 and drive signals φ 1 and φ 1 depending on a signal Enable and an output data signal Data.
The value of 2 is determined. When the signal Enable is "L", the drive signals .phi.1 and .phi.2 are both "L". Signal Ena
When ble is "H", either the drive signal φ1 or φ2 becomes "H" according to the output data signal Data. For example, when the output data signal Data is "H", .phi.1 is "H" and .phi.2 is "L", and when the output data signal Data is "L", .phi.1 is "L" and .phi.2 is "H".

The selection circuit 2 includes a first switch composed of an N-channel MOS transistor Q21 and a P-channel MOS transistor Q22 connected in parallel, and an N-channel MOS transistor.
Transistor Q23 and P-channel MOS transistor Q
Second switch and inverter 2 consisting of parallel connection with 24
1 and both switches are complementarily turned on / off in response to the signal Boot.

The booster circuit 3 includes a diode-connected transistor Q31, a capacitor C1 and a P-channel type transistor Q3.
2. It consists of an inverter 31. That is, since the gate of the transistor Q31 is connected to Vcc, the transistor Q31 is always on. Then, the node N also always has the power supply voltage of 3.3V. The capacity C1 is 3.3.
V is charged. Then, the input is from "L" to "H"
Rises to node N due to capacitive coupling of capacitance C1.
Is the boosted potential (for example, 5
V). The P-channel MOS transistor Q32 is turned on, and this boosted potential is transferred to the gate of the transistor Q1 as the boosting drive signal φ3.

Next, the operation of this circuit will be described. When the signal Enable is "L", the drive signals .phi.1 and .phi.2 are both "L", the transistors Q1 and Q2 are both off, and as a result, the output pad 5 is in a floating state.

When the signal Enable is "H", either the drive signal φ1 or φ2 becomes "H" depending on the output data signal Data. For example, when the output data signal Data is "H", .phi.1 is "H" and .phi.2 is "L", and when the output data signal Data is "L", .phi.1 is "L" and .phi.2 is "H".

When the signal Boot is "H", the transistors Q23 and Q24 are turned on and the transistors Q21 and Q22 are turned off. As a result, the signal φ1 remains as it is in the transistor Q.
Input to 1 gate. When the signal .phi.1 is at "H" level, that is, the power supply potential, the output signal Dout has a value lower than the power supply potential by the threshold voltage of the transistor Q1.

When the signal Boot is "L", the transistors Q23 and Q24 are turned off and the transistors Q21 and Q22 are turned on. As a result, the signal φ1 is input to the booster circuit 3,
The boost drive signal φ3 is generated. The boosting drive signal φ3 is input to the gate of Q1. That is, the output data Da
If ta is "H", the signal .phi.1 is at "H" level, that is, the power supply potential, and the boost drive signal .phi.3 is the boost potential (for example, 5V). As a result, the output signal Dout becomes the power supply potential. When the output data Data is "L", the transistor Q1 is turned off and the output signal Dout becomes 0V.

To summarize the above, when the signal Enable is "H" and the output data Data is "H", and the signal Boot is "H", Dout is a voltage lower than the power supply voltage by the threshold voltage. If the signal Boot is "L", the power supply voltage is output to Dout. Signal Ena
When ble is "H" and the output data Data is "L", .phi.2 becomes "H" and the transistor Q2 is turned on, so that Dout becomes 0V. When the signal Enable is "L", Dout is in a floating state.

As described above, when the external signal Boot is "H", the output potential has a value lower than the threshold value, and when the external signal Boot is "L", the threshold value does not decrease. This enables a high-speed output that does not go through the booster circuit when the power supply voltage is 5V and a reliable output that goes through the booster circuit when the power supply voltage is 3.3V.

Next, the means for generating the signal Boot will be described. [FIG. 2] (a) shows the semiconductor device before molding. That is, the semiconductor chip 41 having the pad 4, the inner lead 42, and the bonding wire 43 connecting the pad 4 and the inner lead 42 are shown. Of the inner leads 42, the remaining leads 42 that are not used for input / output or power supply are used for inputting the signal Boot. With this configuration, it can be set from outside whether or not the booster circuit 3 is used.

[FIG. 2] (b) also shows the semiconductor device before being molded. This is an example of generating the signal Boot according to the bonding option. Ie pad 4
Also, the semiconductor chip 41 having the power supply pad 6, the inner lead 42, and the bonding wires 44 and 45 connecting the pad 4 and the inner lead 42 are shown. It is possible to select whether the pad 4 is connected to the Vcc (5V) inner lead or the Vss (0V) inner lead by a bonding wire. Bonding wire 44 is V
When connected to cc, bonding wire 45 is connected to Vss. According to this structure, the chips are 5V products and 3.
Separated into 3V products, 5V products do not use booster circuit 3.3
The V product can be shipped separately by using the booster circuit 3 to eliminate the drop in the output threshold value.

FIG. 3 shows another example of the Boot signal generating means. That is, the power supply pad 6 and the dividing resistors 61, 6
2. A reference voltage (Vref) generation circuit 7 and a comparison circuit 8. With this configuration, for example, when Vcc is set to a predetermined potential (for example, 4V) or higher, the Boot signal is "H".
Further, when Vcc is set to be less than the predetermined potential, the Boot signal can be controlled to "L". As a result, it is possible to automatically determine whether or not to use the booster circuit 3, and there is no need to distinguish between 3.3V products and 5V products before shipping.

[0024]

As described above, when the means provided by the present invention is used, since the selection circuit selects whether to use the booster circuit or not, the data produced by the same mask and compatible with a plurality of power supplies can be used. A semiconductor device including an output circuit can be provided.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 2 is a diagram of a semiconductor device according to an embodiment of the present invention before being molded.

FIG. 3 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 4 is a circuit configuration diagram of a conventional example.

[Explanation of symbols]

 1 Output Control Circuit 2 Selection Circuit 3 Booster Circuit 4, 5 Pads 11, 12 AND Gate 13, 21, 31 Inverter C Capacitance Element Q Transistor

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI Technical display location H03K 19/094 8839-5J H03K 19/094 C

Claims (4)

[Claims] 1. An output control circuit for generating first and second drive signals according to output data, and a booster circuit for boosting the first drive signal and generating a boost drive signal having a potential higher than a power supply potential. A drain connected to the output pad, a drain connected to the power supply potential, a source connected to the output pad, and a gate to which the first drive signal or the boost drive signal is input. A second N-channel type MOS transistor connected to the source, connected to the ground potential, and having the gate to which the second drive signal is input; and selecting one of the first drive signal and the boost drive signal, A semiconductor device comprising: a selection circuit for inputting to the gate of a first N-channel MOS transistor. 2. The semiconductor device according to claim 1, wherein the selection circuit performs the selection by a voltage applied to a pin outside the chip. 3. The semiconductor device according to claim 1, wherein the selection circuit performs the selection according to a bonding state between a pad and a lead wire. 4. The semiconductor device according to claim 1, wherein the selection circuit performs the selection according to a power supply voltage.