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JPH07105594B2 - Method for forming multilayer insulating film - Google Patents

Method for forming multilayer insulating film

Info

Publication number
JPH07105594B2
JPH07105594B2 JP6364690A JP6364690A JPH07105594B2 JP H07105594 B2 JPH07105594 B2 JP H07105594B2 JP 6364690 A JP6364690 A JP 6364690A JP 6364690 A JP6364690 A JP 6364690A JP H07105594 B2 JPH07105594 B2 JP H07105594B2
Authority
JP
Japan
Prior art keywords
insulating film
substrate
predetermined
baking
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6364690A
Other languages
Japanese (ja)
Other versions
JPH03263393A (en
Inventor
成光 松本
幸雄 藤田
英男 茂木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6364690A priority Critical patent/JPH07105594B2/en
Publication of JPH03263393A publication Critical patent/JPH03263393A/en
Publication of JPH07105594B2 publication Critical patent/JPH07105594B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 〔概要〕 多層セラミックプリント基板に関し、 該セラミックプリント基板上に形成する多層薄膜パター
ン間を絶縁する多層絶縁膜が均一な厚さで得られるのを
目的とし、 基板上に絶縁膜形成材料を塗布後、該基板を所定の温度
と所定の湿度の雰囲気内で所定時間放置して基板上に塗
布形成された絶縁層形成材料を均一に拡散させる拡散塗
布工程、 前記基板を所定の温度で所定時間加熱処理する第1ベー
キング処理工程、 該絶縁膜を所定のパターンに露光および現像して所定の
寸法のビアホールを形成する露光工程および現像工程、 前記基板を不活性ガス雰囲気内で所定の温度で所定時間
加熱処理する第2ベーキング処理工程より成る上記複数
の処理工程を1周期の処理工程として上記基板上に絶縁
膜を多層に塗布する毎に繰り返して行い、上記複数の処
理工程を終了して多層構造に形成した絶縁膜に、不活性
ガス雰囲気内で所定の時間毎に階段状に温度上昇して加
熱する第3ベーキング処理工程を行うことで構成する。
DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to a multilayer ceramic printed circuit board, wherein a multilayer insulating film for insulating between multilayer thin film patterns formed on the ceramic printed circuit board is obtained with a uniform thickness. After applying the insulating film forming material, the substrate is allowed to stand in an atmosphere of a predetermined temperature and a predetermined humidity for a predetermined time to uniformly diffuse the insulating layer forming material applied and formed on the substrate. A first baking treatment step of heat treatment at a prescribed temperature for a prescribed time; an exposure step and a development step of exposing and developing the insulating film into a prescribed pattern to form a via hole of a prescribed size; and the substrate in an inert gas atmosphere. The insulating film is applied in multiple layers on the substrate by using the plurality of processing steps including the second baking processing step of heating at a predetermined temperature for a predetermined time as one cycle processing step. A third baking treatment step in which the insulating film formed into a multi-layered structure by repeating the above-mentioned plurality of treatment steps is heated stepwise at a predetermined temperature in an inert gas atmosphere in a stepwise manner. It is configured by performing.

〔産業上の利用分野〕[Industrial application field]

本発明は多層セラミック基板上に形成する多層薄膜パタ
ーンを絶縁分離するための多層絶縁膜の形成方法に関す
る。
The present invention relates to a method for forming a multilayer insulating film for insulating and separating a multilayer thin film pattern formed on a multilayer ceramic substrate.

内層導体層を形成した多層セラミックプリント基板上に
多層薄膜パターンを形成する場合に、該薄膜パターンの
層間絶縁膜としてポリイミド樹脂が用いられている。こ
のポリイミド樹脂は粘度が大で、回転塗布装置を用いて
薄層状態に塗布形成でき、また加熱処理することで硬化
して絶縁性を呈し、また紫外線等の光に感光するために
露光現像処理ができて導体層間を接続するビアホールが
容易に形成できる等の多数の利点があるので多層プリン
ト基板に形成する多層薄膜導体層パターンの層間絶縁膜
として注目されている。
When a multilayer thin film pattern is formed on a multilayer ceramic printed board on which an inner conductor layer is formed, a polyimide resin is used as an interlayer insulating film of the thin film pattern. This polyimide resin has a high viscosity, can be applied in a thin layer using a spin coater, and can be cured by heating to exhibit insulating properties. It is also exposed and developed to be exposed to light such as ultraviolet rays. As a result, there are many advantages such as easy formation of via holes for connecting conductor layers, and therefore, it is attracting attention as an interlayer insulating film of a multilayer thin film conductor layer pattern formed on a multilayer printed circuit board.

〔従来の技術〕[Conventional technology]

従来、このようなポリイミド樹脂を用いて多層絶縁膜を
形成する場合、第8図に示すようにビアホール導体(図
示せず)を有し、表面に二酸化シリコン(SiO2)膜1を
有し、薄膜の導体層パターン2を形成したセラミック基
板3上に粘度が4000〜5000ポイズのポリイミドより成る
第1層絶縁膜4を第6図に示すスピナーのような回転塗
布装置5を用いて10μmの厚さに塗布形成する。
Conventionally, when a multilayer insulating film is formed using such a polyimide resin, it has a via-hole conductor (not shown) as shown in FIG. 8 and a silicon dioxide (SiO 2 ) film 1 on its surface. A first layer insulating film 4 made of polyimide having a viscosity of 4000 to 5000 poise is formed on a ceramic substrate 3 having a thin conductor layer pattern 2 formed thereon by using a spin coater 5 such as a spinner shown in FIG. It is applied and formed.

次いでこの第1層絶縁膜4を第2図に示すように80℃の
温度で30分間ベーキングした後、露光、現像して第1ビ
アホール6を開口た後、第8図に示すようにその上にポ
リイミドよりなる第2層絶縁膜7を前記したスピナーを
用いて10μmの厚さに回転塗布した後、前記した第2図
に示すような温度プロフィルにてベーキングした後、露
光、現像して第2ビアホール8を開口している。
Next, as shown in FIG. 2, the first insulating layer 4 is baked at a temperature of 80 ° C. for 30 minutes, exposed and developed to open the first via hole 6, and then, as shown in FIG. Then, a second insulating film 7 made of polyimide is spin-coated to a thickness of 10 μm by using the above spinner, then baked at a temperature profile as shown in FIG. Two via holes 8 are opened.

このように第1層絶縁膜4に形成した第1ビアホール6
の直径より第2層絶縁膜7に形成した第2ビアホール8
の直径を大にすることで、該ビアホール内の内壁に、ス
パッタ法による金属膜の導体層が確実に被覆形成される
ようにしている。
The first via hole 6 thus formed in the first-layer insulating film 4
Second via hole 8 formed in the second insulating film 7 from the diameter of
By increasing the diameter of the conductive layer, the inner wall of the via hole is surely covered with the conductive layer of the metal film by the sputtering method.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

然し、上記したポリイミド樹脂を回転塗布すると、この
ポリイミド樹脂は粘度が4000〜5000ポイズと高いため
に、第7図(a)および第7図(a)のVII−VII′線断
面図に示すように、セラミック基板3の中心Oより放射
線状に筋状の凹部領域9が形成され、塗布形成されたポ
リイミド膜の表面が平坦と成らない問題がある。
However, when the above-mentioned polyimide resin is spin-coated, the viscosity of this polyimide resin is as high as 4000 to 5000 poise, so that the cross-sectional view taken along the line VII-VII ′ in FIGS. 7 (a) and 7 (a) is shown. In addition, there is a problem that the stripe-shaped concave region 9 is formed radially from the center O of the ceramic substrate 3 and the surface of the applied polyimide film is not flat.

また第1層のポリイミド膜を所定のパターンに形成し
て、その上に第2層のポリイミド膜を塗布した場合、第
1層のポリイミド膜が完全に硬化していない半硬化の状
態であることより、第2層のポリイミド膜に含まれ、該
ポリイミド樹脂の溶媒となるN−メチルピロリドンが、
第1層のポリイミド膜に吸収されて変形する。
Further, when the first layer polyimide film is formed in a predetermined pattern and the second layer polyimide film is applied thereon, the first layer polyimide film must be in a semi-cured state that is not completely cured. Therefore, N-methylpyrrolidone, which is contained in the second layer polyimide film and serves as a solvent for the polyimide resin,
The polyimide film of the first layer absorbs and deforms.

そのため、第9図(a)に示すように第2層のポリイミ
ド膜よりなる第2層絶縁膜7がセラミック基板3の中心
部に向かって凹状に窪んで形成されるので、第2層絶縁
膜7が基板の中央部と周辺部とでは厚さが異なり、第9
図(b)に示す中央部の厚さの薄い第2層絶縁膜のポリ
イミド膜が現像過多になって所定の寸法のビアホールが
形成されない問題がある。
Therefore, as shown in FIG. 9A, the second-layer insulating film 7 made of the second-layer polyimide film is concavely formed toward the center of the ceramic substrate 3, so that the second-layer insulating film is formed. 7 is different in thickness between the central part and the peripheral part of the substrate.
There is a problem that the polyimide film of the second-layer insulating film having a thin central portion shown in FIG. 6B is overdeveloped and a via hole having a predetermined size is not formed.

本発明は上記した問題点を解決し、上記した回転塗布し
たポリイミド膜に基板を中心として周囲に放射状に延び
る凹凸形状が形成されないようにし、更に第1層のポリ
イミド膜を確実にベーキングして充分に硬化させるよう
にし、第2層のポリイミド膜を塗布形成した際に、該第
2層のポリイミド膜の溶剤が染み込まないようにした多
層絶縁膜の形成方法を目的とする。
The present invention solves the above-mentioned problems, prevents the above-mentioned spin-coated polyimide film from being formed with irregularities extending radially around the substrate, and further ensures that the first-layer polyimide film is securely baked. An object of the present invention is to provide a method for forming a multi-layered insulating film, which is cured so as to prevent the solvent of the second layer polyimide film from permeating when the second layer polyimide film is formed by coating.

〔課題を解決するための手段〕[Means for Solving the Problems]

上記目的を達成する本発明の多層絶縁膜の形成方法は、
基板上に絶縁膜形成材料を塗布後、該基板を所定の温度
と所定の湿度の雰囲気内で所定時間放置して基板上に塗
布形成された絶縁膜形成材料を均一に拡散させる拡散塗
布工程、 前記基板を所定の温度で所定時間加熱処理する第1ベー
キング処理工程、 該絶縁膜を所定のパターンに露光および現像して所定の
寸法のビアホールを形成する露光工程と現像工程、 前記基板を不活性ガス雰囲気内で所定の温度で所定時間
加熱処理する第2ベーキング処理工程より成る上記複数
の処理工程を1周期の処理工程として上記基板上に絶縁
膜を多層に塗布する毎に繰り返して行い、上記複数の処
理工程を終了して多層構造に形成した絶縁膜に、不活性
ガス雰囲気内で所定の時間毎に階段状に温度上昇して加
熱する第3ベーキング処理工程を行うことを特徴とす
る。
The method for forming a multilayer insulating film of the present invention to achieve the above object,
A diffusion coating step of applying an insulating film forming material on a substrate and then leaving the substrate in an atmosphere of a predetermined temperature and a predetermined humidity for a predetermined time to uniformly diffuse the insulating film forming material applied and formed on the substrate, A first baking treatment step of heat-treating the substrate at a prescribed temperature for a prescribed time; an exposure step and a developing step of forming a via hole of a prescribed size by exposing and developing the insulating film to a prescribed pattern; The plurality of processing steps including the second baking processing step of performing a heat treatment at a predetermined temperature for a predetermined time in a gas atmosphere are repeatedly performed as one cycle of the processing steps each time an insulating film is applied in multiple layers on the substrate. A third baking treatment step of heating the insulating film formed into a multi-layered structure after finishing the plurality of treatment steps by raising the temperature stepwise at a predetermined time in an inert gas atmosphere To.

〔作用〕[Action]

本発明の方法は、ポリイミド膜を塗布した後、基板を所
定の温度と所定の湿度で放置する工程を設け、回転塗布
形成されたポリイミド樹脂が基板の周辺部に均一に拡散
していく拡散塗布工程を設ける。このようにすると回転
塗布されたポリイミド膜が基板上に均一に拡散して拡が
る。
The method of the present invention includes a step of leaving a substrate at a predetermined temperature and a predetermined humidity after applying a polyimide film, and the polyimide resin formed by spin coating is uniformly diffused in the peripheral portion of the substrate. Establish a process. In this way, the spin-coated polyimide film is uniformly diffused and spread on the substrate.

また露光現像してビアホールを形成した第1層のポリイ
ミド膜を200℃の高温でかつ不活性ガスの雰囲気内でベ
ーキング処理することで硬化させる。このようにすると
第2層のポリイミド膜を塗布しても、第1層のポリイミ
ド膜が硬化しているので、第2のポリイミド膜に含まれ
る溶剤を吸収することが出来ない。
The polyimide film of the first layer, which is exposed and developed to form via holes, is cured by baking at a high temperature of 200 ° C. in an inert gas atmosphere. In this way, even if the second layer polyimide film is applied, the solvent contained in the second polyimide film cannot be absorbed because the first layer polyimide film is cured.

更に第2層のポリイミド膜にビアホールを現像、露光に
より形成した後、不活性ガス雰囲気内で所定の時間毎に
階段状に温度を上昇させる加熱処理を行うことで、多層
構造に形成された層間絶縁膜をクラックや亀裂が入らな
いようにして確実に硬化することができ、高信頼度の多
層絶縁膜が得られる。
Further, after forming a via hole in the second layer polyimide film by developing and exposing, a heat treatment for raising the temperature stepwise at a predetermined time in an inert gas atmosphere is performed, whereby an interlayer formed in a multilayer structure is formed. The insulating film can be reliably cured without cracks or cracks, and a highly reliable multilayer insulating film can be obtained.

〔実施例〕〔Example〕

以下、図面を用いて本発明の一実施例につき詳細に説明
する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

第1図は本発明の多層絶縁膜の形成方法の工程を示す説
明図、 第2図は本発明に於ける第1ベーキング工程の温度プロ
フィル図、第3図は本発明に於ける第2ベーキング工程
の温度プロフィル図、 第4図は本発明に於ける第3ベーキング工程の温度プロ
フィル図、 第5図は本発明の方法を説明するプリント基板の要部断
面図である。
FIG. 1 is an explanatory view showing the steps of the method for forming a multilayer insulating film according to the present invention, FIG. 2 is a temperature profile diagram of the first baking step according to the present invention, and FIG. 3 is a second baking step according to the present invention. FIG. 4 is a temperature profile diagram of the process, FIG. 4 is a temperature profile diagram of the third baking process in the present invention, and FIG. 5 is a sectional view of an essential part of a printed circuit board for explaining the method of the present invention.

第5図では図面を簡単にするために基板の上部に絶縁膜
を形成した状態を示したが、基板の下部にも同様な絶縁
膜が形成されているものとする。
Although FIG. 5 shows a state in which an insulating film is formed on the upper portion of the substrate for the sake of simplicity, it is assumed that a similar insulating film is formed on the lower portion of the substrate.

第1図、および第5図に図示するように、内部に導体層
11を形成したビアホール12を有するセラミック基板13に
設けた導体層パターン14上にSiO2膜15を介して第1層ポ
リイミド膜16をスピナーを用いて10μmの厚さに塗布形
成する塗布工程101を実施する。
As shown in FIGS. 1 and 5, a conductor layer is provided inside.
A coating step 101 for coating and forming a first layer polyimide film 16 with a thickness of 10 μm on a conductor layer pattern 14 provided on a ceramic substrate 13 having a via hole 12 formed with a SiO 2 film 15 with a spinner. carry out.

次いで第1図に示すように上記ポリイミド膜を形成した
基板を22±3℃の温度、45±5%の湿度で5分間静置す
る拡散塗布工程102を実施する。
Then, as shown in FIG. 1, a diffusion coating step 102 is carried out in which the substrate having the polyimide film formed thereon is allowed to stand at a temperature of 22 ± 3 ° C. and a humidity of 45 ± 5% for 5 minutes.

このような温湿度の環境で基板を静置するとクラック等
が入らない状態で基板の四方にポリイミド膜が緩く拡散
して均一な厚さとなる。
When the substrate is left to stand in such an environment of temperature and humidity, the polyimide film loosely diffuses in all directions of the substrate without cracks and the like, and the thickness becomes uniform.

次いで第1図、および第2図に於けるように上記第1層
のポリイミド膜を80℃の温度で30分間、大気中の雰囲気
でベーキングする第1ベーキング工程103を実施する。
Next, as shown in FIGS. 1 and 2, a first baking step 103 is performed in which the polyimide film of the first layer is baked at a temperature of 80 ° C. for 30 minutes in the atmosphere.

次いで第1図に示すように、上記第1層のポリイミド膜
を所定のパターンに露光する露光工程104を実施する。
Next, as shown in FIG. 1, an exposure step 104 of exposing the first layer polyimide film in a predetermined pattern is performed.

次いで第1図、および第5図に示すように上記露光した
第1層のポリイミド膜を現像液で現像処理する現像工程
105を実施して所定の寸法の第1のビアホール17を形成
する。
Next, as shown in FIG. 1 and FIG. 5, a developing step of developing the exposed first layer polyimide film with a developing solution.
Step 105 is performed to form a first via hole 17 having a predetermined size.

次いで、第1図、および第3図に示すように、上記現像
処理して第1ビアホール17を開口した第1層ポリイミド
膜16を酸素ガスの含有量が5ppm以下の窒素ガス雰囲気内
で200℃の温度で60分間ベーキングする第2ベーキング
工程106を実施して該ポリイミド膜16を確実に硬化させ
る。
Then, as shown in FIG. 1 and FIG. 3, the first layer polyimide film 16 having the first via holes 17 opened by the above-mentioned development treatment is heated to 200 ° C. in a nitrogen gas atmosphere having an oxygen gas content of 5 ppm or less. A second baking step 106, in which the polyimide film 16 is baked at the temperature of 60 minutes, is performed to surely cure the polyimide film 16.

次いで第1図、および第4図に示すように第2層のポリ
イミド膜18をスピナーを用いて10μmの厚さに回転塗布
する塗布工程101を実施する。
Next, as shown in FIG. 1 and FIG. 4, a coating step 101 is carried out in which the second layer polyimide film 18 is spin coated to a thickness of 10 μm using a spinner.

次いで前記した第1図に示す拡散塗布工程102を再度行
う。
Then, the diffusion coating step 102 shown in FIG. 1 is performed again.

次いで前記した第1図、第2図に示す第1のベーキング
工程103を再度実施する。
Then, the first baking step 103 shown in FIGS. 1 and 2 is performed again.

次いで前記した第1図、および第4図に示すように第2
層ポリイミド膜18に露光工程104と現像工程105を再度実
施して前記第1のビアホールよた直径の大きい第2のビ
アホール19を形成する。
Then, as shown in FIG. 1 and FIG.
The exposure process 104 and the development process 105 are performed again on the layer polyimide film 18 to form a second via hole 19 having a diameter larger than that of the first via hole.

次いで前記した第1図、および第3図に示すように第2
ベーキング工程106を再度実施する。
Then, as shown in FIG. 1 and FIG.
The baking step 106 is performed again.

次いで第1図、および第4図に示すように該基板を30分
毎に温度が所定の値に階段状に上昇する第3ベーキング
工程107を実施する。
Next, as shown in FIGS. 1 and 4, the substrate is subjected to a third baking step 107 in which the temperature rises stepwise to a predetermined value every 30 minutes.

この階段状に温度を上げてベーキングを行うことで絶縁
膜にクラック等が入らない状態で硬化することができ
る。
By raising the temperature stepwise and baking, the insulating film can be cured without cracks or the like.

このようにすれば、多層構造に形成された絶縁膜に開口
部の寸法が異なる第1および第2図のビアホールが精度
良く形成でき、このようなビアホール内にはスパッタ法
により導体層が亀裂を発生しない状態でビアホールの内
壁を充分被覆するようになるので高信頼度の多層プリン
ト基板が得られる。
By doing so, the via holes shown in FIGS. 1 and 2 having different opening sizes can be accurately formed in the insulating film formed in the multilayer structure, and the conductor layer may be cracked in such via holes by the sputtering method. Since the inner wall of the via hole is sufficiently covered in the state where it does not occur, a highly reliable multilayer printed circuit board can be obtained.

また上記のようにすると凹凸やうねりの無い状態で層間
絶縁膜が精度良く所定の厚さに形成でき、この上に形成
される導体層パターンも厚さの変動が無い状態で得られ
るので、該導体層パターンの抵抗値が部分的に変動する
ような不都合が解消され、高信頼度の多層セラミックプ
リント基板が得られる。
Further, when the above is performed, the interlayer insulating film can be accurately formed to a predetermined thickness without any unevenness or waviness, and the conductor layer pattern formed on the interlayer insulating film can be obtained in a state where the thickness does not change. The inconvenience that the resistance value of the conductor layer pattern partially changes is eliminated, and a highly reliable multilayer ceramic printed board can be obtained.

なお、本実施例では第2、第3のベーキング処理工程で
窒素ガスを用いたが、ヘリウム、アルゴン等の不活性ガ
スを用いても良い。
Although nitrogen gas is used in the second and third baking processing steps in this embodiment, an inert gas such as helium or argon may be used.

またこの第2、第3のベーキング工程で酸素濃度を5ppm
以下の濃度に抑えることで、導体層パターン14が酸化す
るようなことは無い。
Also, the oxygen concentration is 5 ppm in the second and third baking steps.
By controlling the concentration to the following, the conductor layer pattern 14 will not be oxidized.

なお、本実施例では2層構造の絶縁膜の形成の場合につ
い述べたが、新たな絶縁膜を塗布する毎に第1図の拡散
塗布工程102から第2ベーキング工程106迄の工程を繰り
返して行い、最終的に第3ベーキング工程107を実施す
るようにすると良い。
In the present embodiment, the case of forming an insulating film having a two-layer structure has been described. However, every time a new insulating film is applied, the steps from the diffusion coating step 102 to the second baking step 106 in FIG. 1 are repeated. The third baking step 107 may be finally performed.

〔発明の効果〕〔The invention's effect〕

以上の説明から明らかなように、本発明の多層絶縁層の
形成方法によれば、該絶縁層が平坦な状態で得られ、ま
た形成されるビアホールも所定の寸法で高精度に形成さ
れる効果がある。
As is clear from the above description, according to the method for forming a multilayer insulating layer of the present invention, the insulating layer can be obtained in a flat state, and the via hole to be formed can also be formed with a predetermined size and with high precision. There is.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の多層絶縁膜の形成方法の工程を示す説
明図、 第2図は第1ベーキング工程の温度プロフィル図、 第3図は第2ベーキング工程の温度プロフィル図、 第4図は第2ベーキング工程の温度プロフィル図、 第5図は本発明の方法を説明するプリント基板の要部断
面図、 第6図は従来の方法の説明図、 第7図(a)は従来の方法による絶縁膜の平面図、 第7図(b)は第7図(a)のVII−VII′線断面図、 第8図は多層絶縁膜の形成方法を示す断面図、 第9図は従来の方法に於ける不都合な状態を示す断面図
である。 図において、 11は導体層、12はビアホール、13セラミック基板、14は
導体層パターン、15はSiO2膜、16は第1層ポリイミド
膜、17は第1ビアホール、18第2層ポリイミド膜、19は
第2ビアホール、101は塗布工程、102は拡散塗布工程、
103は第1ベーキング工程、104は露光工程、105は現像
工程、106は第2ベーキング工程、107は第3ベーキング
工程を示す。
FIG. 1 is an explanatory diagram showing the steps of the method for forming a multilayer insulating film according to the present invention, FIG. 2 is a temperature profile diagram of the first baking process, FIG. 3 is a temperature profile diagram of the second baking process, and FIG. FIG. 5 is a temperature profile diagram of the second baking step, FIG. 5 is a sectional view of a main part of a printed circuit board for explaining the method of the present invention, FIG. 6 is an explanatory view of a conventional method, and FIG. 7 (a) is a conventional method. FIG. 7 (b) is a sectional view taken along line VII-VII ′ of FIG. 7 (a), FIG. 8 is a sectional view showing a method for forming a multilayer insulating film, and FIG. 9 is a conventional method. FIG. 6 is a cross-sectional view showing an inconvenient state in FIG. In the figure, 11 is a conductor layer, 12 is a via hole, 13 is a ceramic substrate, 14 is a conductor layer pattern, 15 is a SiO 2 film, 16 is a first layer polyimide film, 17 is a first via hole, 18 is a second layer polyimide film, and 19 is a second layer polyimide film. Is a second via hole, 101 is a coating process, 102 is a diffusion coating process,
103 is a first baking step, 104 is an exposure step, 105 is a developing step, 106 is a second baking step, and 107 is a third baking step.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−202939(JP,A) 特開 平2−36591(JP,A) 特開 昭61−94346(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-63-202939 (JP, A) JP-A-2-36591 (JP, A) JP-A-61-94346 (JP, A)

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板(13)上に絶縁膜形成材料を塗布後、
該基板を所定の温度と所定の湿度の雰囲気内で所定時間
放置して基板上に塗布形成された絶縁膜形成材料を均一
に拡散させる拡散塗布工程(102)、 前記基板(13)を所定の温度で所定時間加熱処理する第
1ベーキング工程(103)、 該絶縁膜を所定のパターンに露光および現像して所定の
寸法のビアホールを形成する露光工程(104)と現像工
程(105)、 前記基板を不活性ガス雰囲気内で所定の温度で所定時間
加熱処理する第2ベーキング工程(106)より成る上記
複数の処理工程を1周期の処理工程として上記基板上に
絶縁膜を塗布する毎に繰り返して行い、上記複数の処理
工程を終了して多層構造に形成した絶縁膜に、不活性ガ
ス雰囲気内で所定の時間毎に階段状に温度上昇して加熱
する第3ベーキング工程(107)を行うことを特徴とす
る多層絶縁膜の形成方法。
1. After applying an insulating film forming material on a substrate (13),
A diffusion coating step (102) for uniformly diffusing an insulating film forming material applied and formed on the substrate by leaving the substrate in an atmosphere of a predetermined temperature and a predetermined humidity for a predetermined time; A first baking step (103) of performing heat treatment at a temperature for a predetermined time, an exposure step (104) of exposing and developing the insulating film in a predetermined pattern to form a via hole of a predetermined size, and a developing step (105); The plurality of treatment steps including the second baking step (106) in which the heat treatment is performed at a predetermined temperature for a predetermined time in an inert gas atmosphere are repeated as one cycle of the treatment step each time the insulating film is applied onto the substrate. And performing a third baking step (107) of heating the insulating film formed in the multi-layered structure after finishing the plurality of processing steps in a stepwise manner at predetermined time intervals in an inert gas atmosphere. Characterized by Method for forming the insulating film.
【請求項2】前記拡散塗布工程(102)に於ける基板を
設置する雰囲気の温度が22±3℃で、湿度が45±5%で
あることを特徴とする請求項(1)記載の多層絶縁膜の
形成方法。
2. The multilayer according to claim 1, wherein in the diffusion coating step (102), the temperature of the atmosphere for installing the substrate is 22 ± 3 ° C. and the humidity is 45 ± 5%. Method of forming insulating film.
【請求項3】前記2および第3ベーキング工程(106,10
7)に用いる不活性ガスが、酸素含有量が5ppm以下の不
活性ガスであることを特徴とする請求項(1)記載の多
層絶縁膜の形成方法。
3. The second and third baking steps (106,10)
The method for forming a multilayer insulating film according to claim 1, wherein the inert gas used in 7) is an inert gas having an oxygen content of 5 ppm or less.
JP6364690A 1990-03-13 1990-03-13 Method for forming multilayer insulating film Expired - Fee Related JPH07105594B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6364690A JPH07105594B2 (en) 1990-03-13 1990-03-13 Method for forming multilayer insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6364690A JPH07105594B2 (en) 1990-03-13 1990-03-13 Method for forming multilayer insulating film

Publications (2)

Publication Number Publication Date
JPH03263393A JPH03263393A (en) 1991-11-22
JPH07105594B2 true JPH07105594B2 (en) 1995-11-13

Family

ID=13235325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6364690A Expired - Fee Related JPH07105594B2 (en) 1990-03-13 1990-03-13 Method for forming multilayer insulating film

Country Status (1)

Country Link
JP (1) JPH07105594B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3067021B2 (en) 1998-09-18 2000-07-17 インターナショナル・ビジネス・マシーンズ・コーポレ−ション Method for manufacturing double-sided wiring board

Also Published As

Publication number Publication date
JPH03263393A (en) 1991-11-22

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