JPH0698300A - Number of scanning line converter - Google Patents

Abstract

PURPOSE:To commonly use a field memory both for an inter-field interpolation in an interpolation mode, and for a time base conversion in a compression mode. CONSTITUTION:First and second switches 8 and 9 are switched by the switching signal of the compression mode and the interpolation mode, and a processing is performed by using a field memory 4 as a delay element in the interpolation mode, and as a time base varying means in the compression mode. Then, a scanning line-interpolated video signal and a compressed video signal including a no-picture area are selected, and outputted.

Description

Detailed Description of the Invention

[0001]

This invention relates to MUSE (Multiple S
Converting high-definition signals such as ub-Nyquist Sampling Encoding) signals to NTSC signals, CRT (CRT)
The present invention relates to a scanning line number conversion device capable of displaying on the screen. In particular, it relates to a television receiver.

[0002]

2. Description of the Related Art Conventionally, there are the following two methods for performing scanning line interpolation which are used for aspect ratio conversion and the like. In one method, the input video signal is stored in the line memory 6 for inter-field interpolation and converted by the scanning line number conversion circuit 1. This processing is to interpolate between lines and is a processing method suitable for moving image.

In the other method, the video signal is stored in the field memory 4b for inter-field interpolation and converted by the scanning line number conversion circuit 1. This processing is to perform interpolation between fields, and is a processing method suitable for a still image video that hardly moves between fields. With this scanning line conversion circuit 1, the number of lines is 7 /
The frame scan line is 5 times that of the current broadcasting because it changes 5 times.
From 25 to 735. And the time adjustment circuit 4c
Is for differentiating the phase of the read reset signal in the compression mode and the interpolation mode.

Here, with the motion signal obtained by discriminating the motion of the image, the motion processing circuit 2 adjusts the mixing ratio of the A signal for inter-field interpolation and the B signal for inter-field interpolation. For example, when a still image with no motion continues, the motion signal is zero, and the motion adaptive processing circuit 2
Sets the mixing ratio of the A signal and the B signal to 0:10 and prioritizes only the B signal, that is, the interfield interpolation signal.

Then, in order to display the above-mentioned 735 scanning lines on the current television, the time axis conversion circuit 3 increases the line frequency by 7/5. This is called an interpolation mode. According to this interpolation mode, inter-field interpolation is performed on a still image, and line flicker (flicker on the screen) is reduced.
In addition, the video is inter-field interpolated. Therefore, in this interpolation mode, the vertical video signal does not change between input and output.

Further, the time axis of the video signal is converted to 7/5 by the read clock as described above, and the time axis conversion memory 4a for storing the video signal of one field is used as shown in FIG.
As shown by, the video signal is compressed, and the compression produces a non-image portion. This is called compressed mode. At this time, if compression is not performed, a 16: 9 image is displayed on a 4: 3 screen, so that a vertically long image is obtained as shown in FIG. 4b.
The vertical direction can be compressed by changing the number of scanning lines on the screen of 4: 3 from 525 to 735 and placing 483 effective scanning lines on the 735 scanning lines. As a result, it is possible to output a video signal that maintains the roundness.

Then, the interpolation mode and the compression mode are switched by the first switch 8, and the obtained signal is the image quality adjusting circuit 5.
In, adjust the pedestal level and the level of the non-image area.

FIG. 4 is a diagram showing the relationship of aspect ratios. FIG. 4a is a diagram showing a high-definition broadcast transmitted on a 16: 9 screen, and has 1125 scanning lines. Figure 4b shows the HDTV broadcast in full mode 4:
This is the case when the image is displayed on the screen of 3
Since the image is reduced to three in the horizontal direction, the image is vertically long.

FIG. 4c shows the screen of FIG. 4b in which the scanning lines are increased in the vertical direction. Therefore, the image is vertically compressed and approaches a perfect circle, and the image signal is 16: 9. . This is obtained by the compressed mode.

In other words, in the compressed mode, the number of scanning lines of the video signal is effectively used, so that the number of scanning lines of the entire screen is increased, and a 16: 9 sensation of reality can be maintained to obtain a video signal without deformation. it can.

[0011]

However, according to the above-mentioned conventional example, the field memories are required for the inter-field interpolation in the interpolation mode and for the time base conversion in the compression mode, respectively, and are very expensive, and the circuit configuration is also high. Each has the drawback of becoming complicated.

[0012]

According to the present invention, there is provided storage means for storing an input video signal for each field and outputting a video signal for one field at a first read clock, and the video signal and the signal of the storage means. A scanning line conversion unit that converts the number of scanning lines of a video signal into a predetermined number of scanning lines, and a video signal that compresses an image by controlling the storage unit with a second read clock to provide a non-image area without an image. The present invention provides a scanning line number conversion device including a signal obtained by converting the number of scanning lines to the predetermined number of scanning lines and a selection unit that selects the signal of the scanning line number conversion unit.

[0013]

According to the present invention, the read clock of the field memory used in the interpolation mode can be switched and the field memory in the compression mode and the time axis conversion circuit can be used in common.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention, in which the same parts as those in the conventional example are designated by the same reference numerals, and the description thereof will be omitted.

Reference numeral 4 is a field memory whose write and read timings are controlled by a write reset signal and a read reset signal which are outputs from the timing controller 7. As the read clock, the first read clock of the interpolation mode clock and the second read clock of the compressed mode clock are selected by the second switch. The frequency of the first read clock is 910 times the line frequency fh, and the frequency of the second read clock is 910 fh × 7/5, which is 7/5 times the first read clock frequency.

In the present invention, for example, the number of scanning lines on the entire screen is set to 5
The number is converted from 25 to 735.

In the interpolation mode, the input video signal is inter-field interpolated (A signal) and inter-field interpolated (B signal) by the scanning line number conversion circuit 1, and the mixing ratio is changed by the motion signal by the motion processing circuit 2.

At this time, the field memory 4 does not perform time-axis conversion, but simply operates as field delay means. The signal processed by the motion processing circuit 2 is converted by the time axis conversion circuit 3 into a line frequency of 7/5 times, and the number of scanning lines is converted from 525 to 735. Then, it is input to the image quality adjustment circuit 5 via the first switch 8, the pedestal section is set to a fixed level, and the signal is output.

On the other hand, in the compressed mode, the input video signal is time-axis converted in the field memory 4 to a line frequency of 7/5 times in a field unit, and the number of scanning lines is changed from 525 to 735. At that time, the remaining period in which the input video signal is compressed is processed as a non-image portion as shown in FIG. 3b.

Here, the above-mentioned interpolation mode and the switching signal for controlling this compression mode will be described. The second switch 9 is switched together with the switching of the first switch 8 to select the read clock.

Further, in conjunction with the first switch 8, as shown in FIG. 3, the read position (read / read reset signal) is made different between the interpolation mode and the compression mode. That is, in the interpolation mode, the write reset signal and the read reset signal are at the high level at the same position, but in the compressed mode, the read reset signal is at the high level after the write reset signal.
The delayed period becomes a non-image area where no video signal exists. This makes it clear from FIG. 3 that the above-mentioned no-image area is generated. The write reset signal and the read reset signal control the vertical position (memory address).

In the interpolation mode, the screen start signal in FIG. 3 has the same phase as the write reset signal and the read reset signal, and the written video signal is read as it is. In the compressed mode, since the phases are shifted, a signal having a non-image portion at the top and bottom of the screen is created as shown in FIG. 4c.

Here, the video signal region and the non-image region can be adjusted by shifting the screen start signal. Even if the non-image region is divided after the video signal period and exists, it is before the video signal period. May exist in.

Further, although the input signal is used in the embodiment, a luminance signal or a color difference signal (RY signal, BY signal, etc.) is used.
It goes without saying that the same can be applied to the above.

[0025]

According to the present invention, one field memory can be omitted by using the field memory for still image processing in the interpolation mode and the field memory for time base conversion in the compression mode, so that the circuit configuration can be simplified. Will lead to cost reduction.

[Brief description of drawings]

FIG. 1 is a block diagram showing a scanning line number conversion apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional scanning line number converting apparatus.

FIG. 3 is a diagram showing writing / reading for scanning line number conversion.

FIG. 4 is a diagram illustrating a compression mode.

[Explanation of symbols]

 1 scanning line number conversion circuit 2 motion processing circuit 3 time axis conversion circuit 4 field memory 5 image quality adjustment circuit 6 line memory 7 timing controller 8 first switch 9 second switch

Claims (1)

[Claims] 1. An input video signal is stored for each field,
Storage means for outputting a video signal of one field with a first read clock; scanning line conversion means for converting the number of scanning lines of the video signal into a predetermined number of scanning lines by the video signal and the signal of the storage means; An image is compressed by controlling the storage means with a clock, and a signal obtained by converting the number of scanning lines of a video signal provided with an image-free area without an image into the predetermined number of scanning lines; A scanning line number conversion device comprising a selection means for selecting a signal.