JPH0697750B2 - Signal interpolation circuit - Google Patents

Description

The present invention relates to a gate circuit for turning off a switch provided in a signal path mainly for the purpose of removing pulse noise, and the interpolating signal is supplied to the gate circuit while the switch is off. The present invention relates to a signal interpolation circuit for supplying.

B Outline of the Invention A gate circuit for turning off a switch provided in a signal path mainly for the purpose of removing pulse noise further has a first holding capacitor connected to the output of the switch, and the capacitor Signal obtained by combining the output signal of the differential amplifier for amplifying the potential difference appearing across the resistor connected in series with the capacitor and the output signal of the amplifier for amplifying the potential of the capacitor to detect the current of Is a signal interpolation circuit formed so that the switch of the first holding capacitor can be supplied via the second holding capacitor when the switch is off.

C Prior Art FIG. 3 is a block diagram showing the configuration of a conventional signal interpolation circuit,
FIG. 4 is a diagram showing signal interpolation waveforms obtained by the circuit shown in FIG.

In the circuit shown in FIG. 3, the signal input from the input ₁ is divided into two signal paths S ₁ and S ₂ , one of which is a phase shift circuit 4 in which the phase delay increases as the frequency increases. as the gate circuit I5, other signal S ₂ as it is gate circuit II6
Enter These gate circuits 5 and 6 are intended to remove, for example, pulse noise. When noise enters and a signal is input from the switching signal input 3, the two gate circuits 5 and 6 are turned on at the same time. Works off.

Immediately after the gate circuits 5 and 6 are turned off, the capacitors C ₁ and C ₂ are charged with the potentials indicated by P ₁ and P ₂ of the signals shown in FIG. 4, respectively. Letting T _{SW be} the length of the switching period in which the gate circuits 5 and 6 are turned off, the potential of the signal S ₁ during switching must move from P ₁ to P ₃ .
At this time, if the phase difference φ between the signal S ₁ and the signal S ₂ generated by the phase shift circuit 4 corresponds to the period T _SW , the potential P
₃ can be obtained as the potential P ₂ . If you ask the potential P ₂ of the capacitor C ₂ is between sampling hold the switching-period T _SW, the potential P ₂ is output from the buffer II8, the Yotsute P ₁ to a time constant circuit including a capacitor C ₁ and resistor R
Signal interpolation connecting P ₃ can be performed, and the signal subjected to the signal interpolation is output from the output terminal 2 through the buffer I 7.

D Problems to be Solved by the Invention However, in the circuit shown in FIG. 3, the gate circuits 5 and 6 are complicated, and the phase shift circuit 4 requires a phase shift capacitor,
There are drawbacks such as a large number of parts and a widening of the pulse noise time width in the transfer circuit 4.

It is an object of the present invention to provide a signal interpolation circuit capable of performing signal interpolation capable of reducing waveform distortion during switching in a gate circuit whose main purpose is to remove pulse noise.

E Means for Solving the Problems In order to achieve the above object, the signal interpolating circuit according to the present invention is always on, and switch means for turning off the input voltage in response to a noise detection signal; and the switch means. A first resistor and a first resistor connected in series between the output side of the
And a circuit for obtaining an output voltage corresponding to the difference between the terminal voltage of the first capacitor and the differential signal voltage of the input voltage, which appears at the terminal of the first resistor immediately before the switch means is turned off. A second capacitor which receives the input voltage immediately before turning off and the output voltage, holds a differential voltage between the two voltages, and outputs an interpolation signal based on the differential voltage when the switch means is off; It is characterized by having.

If the input signal contains noise, the switching means turns off the input signal for a predetermined period to remove the noise.

Then, the charge / discharge signal according to the holding signal obtained by holding the level of the input signal immediately before turning off by the first and second capacitors during the off period is obtained. An interpolation signal corresponding to the charge / discharge signal is output from the second capacitor starting from the above level during the off period to perform interpolation during the noise removal period of the input signal.

G Embodiment FIG. 1 is a block diagram of a signal interpolation circuit according to the present invention, and FIG.
The figure shows a signal interpolation waveform obtained by the circuit shown in FIG.

In the circuit shown in FIG. ₁ , A ₁ to A ₅ represent amplifiers, the input impedance of each amplifier is infinite, and the output impedance is almost 0 for each load. The voltage gain of the amplifiers A ₁ , A ₂ and A ₄ is 1. The audio signal is input from terminal 1 and output from terminal 2. When a switching signal is input to the terminal 3, for example, when pulse noise is input to the terminal 1, the switching circuit SW is turned off immediately before the pulse noise passes, and is turned on immediately when the pulse noise disappears. In addition, the switching circuit SW is controlled by the signal from the terminal 3.

Switch SW when no pulse noise is input
Is turned on, and the signal vi input to terminal 1 is vi = v ₁ = v ₂
= V ₀ is output from the terminal 2. At this time, the current i ₁ passing through the resistor R ₁ and the capacitor C ₃ is C ₃ (vi−R ₁ i ₁ ) = ∫i ₁ dt, and if R ₁ · i ₁ << v ₁ , then i ₁ = C ₃ It becomes dvi / dt, and the differentiated current of the input signal vi flows.

Therefore, if R ₁ is a small resistance value that satisfies R ₁ I ₁ << vi, the differential signal voltage R ₁ i ₁ of vi is given to the input of the differential amplifier A ₃ . If the voltage gain of amplifier A ₃ is Gv ₃ ,
The output signal v ₃ of ₃ becomes _{v 3 = -R 1 i 1 Gv} 3.

If the terminal voltage of capacitor C ₃ is v _C3 , amplifier A
Output v ₄ of _4, since the voltage gain of A ₄ is 1, v is ₄ = v _C3.

Therefore, if v ₅ is the current flowing through the resistor R ₂ , i ₂ Then, assuming that the voltage gain of the amplifier A ₅ is 2, v ₆ is represented by v ₆ = v _C3 −R ₁ i ₁ Gv ₃ (1).

If the terminal voltage of the capacitor C ₄ is v _C4 , v _C4 = v ₁ −v ₆ = R ₁ i ₁ (1 + Gv ₃ ) (2) Therefore, it can be seen that v _C4 and i ₁ have a proportional relationship. .

Therefore, if vi changes, its differential current i ₁ changes, and accordingly v _{C4 is} always set.

Next, the case where the switch SW is turned off in this state will be described.

If v _C4 is almost constant and does not change due to C ₃ << C ₄ when the switch SW is turned off, then i ₁ can be calculated from equation (2). Is. From now on, the current just before the switch SW is turned off continues to flow.

The above is explained with reference to FIG. 2. The solid line represents the signal v ₂ coming through the switch SW, and the dotted line represents the differential current i ₁ of v ₂ . Set the switch start time when the switch SW turns off.
Let T _{1 be} the end point and T _{2 be} the end point, and set the switching period length to T _SW.
And At time T ₁ , the potential v ₂ is P ₁ and the current i ₁ is P ₄ . When the switch SW is turned off, i ₁ becomes constant from the point P _{4 according} to the equation (3) and continues until the point P ₅ at the time point T ₂ .

As a result, the terminal voltage v during the switching of the capacitor C _{3
C3 (off)} Becomes Here, i _{1 (off)} is the current flowing through the resistor R ₁ and the capacitor C ₃ when the switch SW is off, and ▲ v _C
^′ ₃ ▼ is the terminal voltage of the capacitor C ₃ immediately before the switch SW is turned off.

At this time, if the R ₁ i ₁ «v _C3 and _(off), v _{C3 (OFF)} is v ₂ becomes in switching-this result, v ₂ are switch SW
There can be brought closer to the period T _SW in noise is changed from the point P ₁ as a signal which has been removed to the point P _2, the correct potential point P ₃ of the original signal is off and summer.

For example, when noise is detected, the switch SW is turned off,
The level V _C4 (P ₁ ) of the audio signal immediately before being turned off is held, and the capacitor C ₃ is charged / discharged according to the held signal i ₁ . That is, the uniform distribution of P _{1 to} P ₂ is determined according to i ₁ . Then, an interpolating signal starting from P ₁ and reaching P ₂ is obtained by the charge / discharge signal Vc _{3 for} this charge / discharge.

As described above, signal interpolation is performed during switching, but when the switch SW is turned off and the current i ₁ is decreasing, the following operation prevents the current from decreasing.

When the current i ₁ decreases, v ₆ shown in the equation (1) increases. Since v _C4 is constant, the rise of v ₆ becomes the rise of v ₂ as it is, and accordingly i ₁ increases and stabilizes at the current given by the equation (3).

On the contrary, when the switch is turned off and the current i ₁ is increased, v ₆ is decreased and the current i ₁ is decreased.
Therefore, the change of the current i ₁ does not occur at the time when the switch SW shifts from on to off.

H Effect of the Invention As described above, according to the present invention, the number of switch circuits for removing noise is one, and the number of capacitors for signal interpolation is small. Therefore, the circuit is simpler than the conventional circuit. Also. Since the phase shift circuit is not used unlike the conventional method, it is not necessary to consider the rounding of the noise waveform.

Furthermore, the advantage of being suitable for an IC circuit can be obtained due to the small number of capacitors.

[Brief description of drawings]

FIG. 1 is a block diagram of a signal interpolation circuit according to the present invention, and FIG.
The figure shows a signal interpolation waveform obtained by the circuit shown in FIG. 1, FIG. 3 is a block diagram showing the configuration of a conventional signal interpolation circuit, and FIG. 4 is the signal interpolation waveform obtained by the circuit shown in FIG. FIG. A ₁ ~ A ₅ …… High input, low output impedance amplifier, SW…
… Switch, R ₁ , R ₂ …… Resistance, C ₃ , C ₄ …… Capacitor, 1
…… Signal input terminal, 2 …… Signal output terminal, 3 …… Switching signal input terminal.

Claims (1)

[Claims] 1. A switch means which is always on and turns off an input voltage in response to a noise detection signal, a first resistor and a first resistor connected in series between an output side of the switch means and ground. A differentiating circuit formed of a capacitor, and a circuit for obtaining an output voltage corresponding to a difference between a terminal voltage of the first capacitor and a differential signal voltage of the input voltage appearing at a terminal of the first resistor immediately before the switching means is turned off. , The input voltage immediately before turning off and the output voltage are added,
And a second capacitor that holds a difference voltage between the two voltages and outputs an interpolation signal based on the difference voltage when the switch means is turned off.