JPH0691110B2 - Inversion type high electron mobility transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to an inverting high electron mobility transistor,
The use of a compound semiconductor containing In as a constituent material of the channel layer, and further, the composition value of In is graded from the carrier supply layer side to the surface side in contact with the electrode, thereby spreading the surface depletion layer. By making it possible to suppress the above, it is possible to make the channel layer thinner, and as a result, it is possible to increase the mutual conductance g _m .

[Industrial application field]

The present invention provides a so-called inversion type high electron mobility transistor (high electron mobility transistor) in which the channel layer is on the surface side of the carrier supply layer.
electron mobility transistor (HEMT) improvement.

[Conventional technology]

There are two basic configurations of HEMT, one of which is a normal type in which a carrier supply layer and an electrode are sequentially formed on a channel layer when viewed from the substrate side, and the other of which is from the substrate side. As seen, it is an inversion type in which a channel layer and an electrode are sequentially formed on the carrier supply layer. As the constituent material, so-called AlGaAs / GaAs system is often used,
In that case, the channel layer is made of GaAs, and the carrier supply layer is made of AlGaAs.

[Problems to be solved by the invention]

Generally, the inverted HEMT has very few advantages as compared with the conventional HEMT. For example, since the electrode is formed on GaAs, the contact is better than that formed on AlGaAs like the conventional HEMT. However, since it has major drawbacks, it is rarely used.

One of the drawbacks is that the channel layer must be thick.

Unlike the conventional HEMT, the inverted HEMT can form a gate electrode on the surface of the channel layer, so that the distance between the gate electrode and the two-dimensional carrier gas layer is short, and therefore the carrier concentration is efficiently controlled. Although it should be possible, in reality, the surface depletion layer suffers and it does not meet expectations.

FIG. 3 is a cutaway side view of a main part showing a conventional example of an inverted HEMT.

In the figure, 21 is a semi-insulating GaAs substrate, 22 is n-type AlGaAs.
An electron supply layer, 23 is an undoped GaAs channel layer, 24 is a gate electrode, 25 is a two-dimensional electron gas layer, and 26 is a surface depletion layer.

In the inverted HEMT, the channel layer 23 which is the uppermost semiconductor layer is used.
The Fermi level on the surface of the is pinned depending on the surface level, and the surface is depleted even when the gate electrode is not formed. It can be understood from this that even if the gate electrode 24 made of a metal material is formed on the channel layer 23, the width of the depletion layer therebelow is almost the same as that of the surface depletion layer 26.

Therefore, the electron concentration in the two-dimensional electron gas layer is reduced, and the channel layer 23 must be made thicker to compensate for this, resulting in a decrease in the mutual conductance g _m .

For this reason, the gate electrode 24 is the channel layer.
Even though the structure is formed on the surface of 23, since the channel layer 23 must be formed thick, the efficiency of controlling the electron concentration in the two-dimensional electron gas layer 25 is poor and the mutual conductance g _m is extremely small. It has the drawback of becoming

However, even with such an inverted HEMT, if the channel layer 23 can be made thin and the two-dimensional electron gas layer 25 can be prevented from covering the surface depletion layer 26, a normal type HEMT can be used.
The transconductance g _m should be higher than that of HEMT.

The present invention seeks to provide a channel layer having a sufficiently thin channel layer and improved transconductance g _m as compared with a conventional inverted HEMT.

[Means for Solving Problems] In the HEMT according to the present invention, an electron supply layer (eg, electron supply layer 3) and a channel layer (comprising a III-V group compound semiconductor) on a substrate (eg, substrate 1) ( For example, the channel layer 5A and
5B) and a gate electrode (for example, the gate electrode 9) are formed in this order, in the transistor, the channel layer contains In, and the composition ratio of In is on the surface on the side where the gate electrode is formed. It has a graded structure that increases toward the surface so as to suppress the formation of a surface depletion layer.

[Action]

By adopting the above means, the surface depletion layer does not spread in the channel layer, so that the two-dimensional carrier gas layer is not adversely affected by the surface depletion layer, and therefore the channel layer can be thinned. Therefore, the distance between the gate electrode and the two-dimensional carrier gas layer is shortened, the mutual conductance g _m can be increased, the power consumption can be reduced, and the carrier gas concentration in the two-dimensional carrier gas layer can be reduced. It can be controlled efficiently.

〔Example〕

FIG. 1 (A) shows a cutaway side view of an essential part of one embodiment of the present invention, and FIG. 1 (B) shows an energy band diagram of the inverted HEMT shown in FIG. 1 (A).

In the figure, 1 is a semi-insulating InP substrate, 2 is undoped I
n _y Al _1-y As buffer layer, 3 n-type In _y Al _1-y As electron supply layer, 4 undoped In _y Al _1-y As spacer layer, 5A undoped In _x Ga _{1- x} As channel layer, 5B undoped In _u G
a _1-u As graded channel layer, 6 is undoped Al
_z Ga _1-z As contact layer, 7 source electrode, 8 drain electrode, 9 gate electrode, 10 two-dimensional electron gas layer, E _F is Fermi level, E _C is bottom of conduction band, E _V
Indicate the tops of the valence bands, respectively.

The following is an example of the main data in each part.

(1) About substrate 1 Additive: Fe (2) About buffer layer 2 y value: 0.52 Thickness: 0.5 [μm] (3) About electron supply layer 3 y value: 0.52 Thickness: 300 [Å] Impurity concentration: 1 × 10 ¹⁸ [cm ^-3 ] (4) Spacer layer 4 y value: 0.52 Thickness: 50 [Å] (5) Channel layer 5A x value: 0.53 Thickness: 300 [Å] (6) Graded・ Channel layer 5B u value: 0.53 → 0.8 Thickness: 300 [Å] (7) Contact layer 6 z value: 0.3 Thickness: 300 [Å] (8) Source electrode 7 and drain electrode 8 Material: AuGe / Au thickness: 500 [Å] / 2000 [Å] (9) Gate electrode 9 Material: Al thickness: 2000 [Å] In this embodiment, the spacer layer 4 is an ionization impurity in the electron supply layer 3. The contact layer 6 is provided in order to suppress carrier scattering due to this, and may be formed as needed. Further, the contact layer 6 is formed of a graded material as an underlying layer.
If 5B is In _0.8 Ga _0.2 As and the Schottky gate electrode 9 is formed there, a high Schottky withstand voltage cannot be obtained. Therefore, it is provided to compensate for this, and this is also necessary. It may be formed accordingly.

In the present embodiment, the graded channel layer 5B formed continuously with the channel layer 5A has an In composition that gradually increases from the channel layer 5A side toward the surface side.

When the compound semiconductor containing In is used in this way, the surface depletion layer is not generated, so the two-dimensional electron gas layer 10 is not affected, and therefore the channel layer 5A and the graded channel layer 5B are thinned. The two-dimensional electron gas layer 10
The electron concentration in the two-dimensional electron gas layer 10 can be efficiently controlled by reducing the distance between the gate electrode 9 and the gate electrode 9.

By the way, the transconductance g _m in HEMT is proportional to the capacitance C existing under the gate electrode 9, that is,
g _m ^∞ C, and the magnitude of this capacitance C is inversely proportional to the distance from the gate electrode 9 to the two-dimensional electron gas layer 10 which is a channel, so that as described above, the channel layer 5A
If 5 and 5B can be made thin, the capacitance C will be large, and as a result, the transconductance g _m will be high.

Figure 2 shows In _u Ga _{1-u in the} graded channel layer 5B.
It is an energy band diagram for explaining how to determine the u value of As, and the same symbols as those used in FIG. 1 indicate the same parts or have the same meanings.

In the figure, M is a metal part and S is an In _u Ga _1-u As part.

As is clear from the figure, when the u value is 0.53, the band
The gap has a bend toward the conduction band, is flat at 0.8, and is also toward the valence band at 1.0. Therefore, it is understood that the u value should be 0.8 in order to prevent the generation of the surface depletion layer.

〔The invention's effect〕

The inversion type high electron mobility transistor according to the present invention is a transistor having a structure in which an electron supply layer, a channel layer made of a III-V group compound semiconductor, and a gate electrode are sequentially formed on a substrate, The channel layer contains In, and the composition ratio of In becomes large toward the surface where the gate electrode is formed so as to increase toward the surface so as to suppress generation of a surface depletion layer. There is.

By adopting this configuration, since the surface depletion layer does not spread in the channel layer, the two-dimensional carrier gas layer is not adversely affected by the surface depletion layer, and therefore the channel layer can be thinned. Therefore, the distance between the gate electrode and the two-dimensional carrier gas layer is shortened, the mutual conductance g _m can be increased, the power consumption can be reduced, and the carrier gas concentration in the two-dimensional carrier gas layer can be reduced. It can be controlled efficiently.

[Brief description of drawings]

FIG. 1 (A) is a cutaway side view of an essential part of one embodiment of the present invention, FIG. 1 (B) is an energy band diagram of the inverted HEMT shown in FIG. 1 (A), and FIG. 2 is In _u Ga. FIG. 3 is an energy band diagram for explaining how to determine the u value in _1-u As, and FIG. In the figure, 1 is a semi-insulating InP substrate, 2 is undoped I
n _y Al _1-y As buffer layer, 3 n-type In _y Al _1-y As electron supply layer, 4 undoped In _y Al _1-y As spacer layer, 5A undoped In _x Ga _{1- x} As channel layer, 5B undoped In _u G
a _1-u As graded channel layer, 6 is undoped Al
_z Ga _1-z As contact layer, 7 source electrode, 8 drain electrode, 9 gate electrode, 10 two-dimensional electron gas layer, E _F is Fermi level, E _C is bottom of conduction band, E _V
Indicate the tops of the valence bands, respectively.

Claims (1)

[Claims] 1. A transistor having a structure in which an electron supply layer, a channel layer made of a III-V group compound semiconductor, and a gate electrode are sequentially formed on a substrate, the channel layer containing In and In. The inversion type high electron mobility transistor is characterized in that the composition ratio of is graded so as to increase toward the surface so as to suppress the generation of a surface depletion layer on the surface on which the gate electrode is formed.