JPH068994B2 - Automatic playing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an automatic performance device capable of recording, reproducing and editing performance data. More specifically, the performance data can be written at a designated address. The present invention relates to an automatic performance device.

[Conventional technology]

In the conventional automatic performance apparatus, in order to read and confirm the performance data in the memory, the address counter for reading and controlling the memory is read by counting up / down by a manual switch step by step, or by setting the playback mode. I had to perform automatic performance at a predetermined performance tempo.

[Problems to be solved by the invention]

According to the above-mentioned conventional technique, when reading with the manual switch, the actual performance tempo cannot be confirmed, and when the playback mode is set and the automatic performance is performed, the recording or editing mode is performed. When performing the processing of inputting, changing, deleting, inserting, etc. of performance data in, it is necessary to terminate the processing once and change to the reproduction mode, which causes a problem in recording / editing processing.

[Means for solving problems]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has storage means having a large number of addresses for sequentially storing performance data as a song progresses, and address designation for designating addresses of the storage means. Means, an address manual update instruction operator for instructing to change the address designated by the address designating means by one performance data from the current designated address to the front or back, and the address designating means. An address automatic update instruction operator for instructing start and stop of automatic address update and a start address instruction operator for instructing to change the address specified by the address specifying means from the currently specified address to the start address of the storage means. In response to the instruction to start the automatic address update from the automatic address update instruction operator, The address designated by the address designating means is automatically updated sequentially from the current designated address without changing to the start address of the storing means so that the music progresses and the address is automatically updated by the address automatic update instruction operator. First address control means for stopping the automatic update of the address in response to the update stop instruction, and when the address manual update instruction operator is operated during the stop of the automatic update of the address, the address is updated for each operation. In response to the operation of the second address control means for changing the address designated by the designating means by one performance data to the front or the back from the current designated address, and the operation of the head address designating operator,
Third address control means for changing the address designated by the address designating means from the current designated address to the start address of the storing means, and the changed address every time the address designated by the address designating means is changed. Musical tone signal generating means for generating a musical tone signal based on the musical performance data corresponding to the above, musical performance data input means for inputting musical performance data to be written in the storage means, and musical performance data input means for inputting musical performance data while the automatic updating of addresses is stopped. When there is, an automatic performance device is constructed by the writing means for writing this performance data to the address designated by the address designating means in the storage means.

[Action]

According to the above-described configuration of the present invention, an arbitrary address is automatically updated and then stopped, and while the automatic updating of the address is stopped, one address of performance data is manually moved from the address to the front or the back. The performance data can be easily written to an arbitrary address because the number can be changed. That is, it is possible to manually specify the address only near the address where the performance data is to be written, and automatically update before and after that. This makes it easy to find the desired performance data from a large number of performance data,
It is possible to easily rewrite or add data. In this case, since the address is automatically and sequentially updated from the current designated address without changing to the head address of the storage means, any address can be designated quickly and easily.

Further, since it is possible to manually advance to a desired address, automatically update the address from that address, and stop the update at the desired address by a stop instruction, it is possible to automatically perform any desired section. This facilitates confirmation of the stored performance data.

Further, by operating the head address designating operator, it is possible to instantly start checking the input performance data from the head of the music.

In the following embodiments, chord data will be described as an example, but the present invention is not limited to this, and performance data such as melody data and bass data may of course be used.

〔Example〕

Circuit Configuration (FIG. 1) FIG. 1 shows the circuit configuration of an automatic performance device according to an embodiment of the present invention. This automatic performance device is controlled by a microcomputer to record and edit automatic performance data. And a reproducing process.

The bidirectional bus 1 includes a key switch circuit 2, a control operator circuit 3, a central processing unit (hereinafter referred to as “CPU”) 4, a program memory 5, a working memory 6, a registration memory 7, a performance data memory 8, and a rhythm pattern. The memory 9, the tempo oscillator 10, and the tone forming circuit 11 are connected.

The key switch circuit 2 includes a plurality of key switches corresponding to the respective keys of the keyboard, so that key operation information, that is, pitch data can be detected by sequentially and repeatedly scanning these key switches. Has become.

The control operator circuit 3 is an operator for controlling a musical tone such as a tone color, a volume and an effect arranged on the operation panel, an operator for an automatic rhythm such as rhythm select, intro, break and ending, an auto arpeggio, an auto bass chord etc. It includes an automatic accompaniment operator and an automatic performance operator used for recording / editing / playback of performance data, and can detect control data according to the operation of these operators. It should be noted that among a large number of these operators, those particularly necessary for explaining this embodiment will be described later with reference to FIG.

The CPU 4 executes various processes for automatic performance such as recording / editing / playback of performance data according to a program stored in a program memory 5 including a ROM (Read Only Memory). Details will be described later with reference to FIGS. 5 to 16.

The working memory 6 is a RAM (random access memory).
It is composed of a memory) and functions as a register, a counter, a pointer, a flag, etc. used in various processes by the CPU 4.

The registration memory 7 is composed of a RAM and stores the setting state of each operator of the control operator circuit 3 as registration data (hereinafter referred to as “registration state”). In this embodiment, nine types of registration states are registered. You can remember.

The performance data memory 8 is composed of a RAM storing performance data of a desired music piece, and can store up to four music pieces in this example. Performance data format is No. 4
It will be described later with reference to the drawings.

Rhythm pattern memory 9 includes normal patterns, intro patterns, etc. of various rhythms such as waltz, march, and rumba.
It consists of a ROM that stores automatic rhythms such as ending patterns and pronunciation control pattern data of automatic accompaniment such as auto arpeggios and auto bass chords over a plurality of measures. To be done. This tempo clock signal is also utilized when the performance data is sequentially read from the performance data memory 8 and reproduced.

The musical tone forming circuit 11 responds to the pitch data from the key switch circuit 2, the musical performance data from the musical performance data memory 8 and the pattern data from the rhythm pattern memory 9 to generate various musical tones based on the control data from the control operator circuit 3. It is designed to generate a signal. The generated tone signal is
It is supplied to the speaker 13 via the output amplifier 12 and converted into sound.

Operation Panel (FIG. 2) FIG. 2 is a plan view showing a part of the operation panel A, showing only the operation elements particularly necessary for this embodiment among the many operation elements of the control operation circuit 3. is there. Although not shown, each switch shown in FIG. 2 is a push-on / push-off switch with a built-in light emitting diode. The push-on turns on the light-emitting diode, and the push-off turns off the light-emitting diode. .

In FIG. 2, switches 20a to 20d are song selection switches (hereinafter referred to as "SONG switches") for setting SONG numbers for designating storage areas of the respective songs in the performance data memory 8 in which the performance data of four songs are stored. , A switch 21 is a reproduction switch for reproducing the music selected by the SONG switches 20a to 20d, a switch 22 is a recording switch for newly creating performance data, and a switch 23 is an editing switch for editing the recorded performance data. Then, by selecting any one of the reproduction switch 21, the recording switch 22 and the editing switch 23, a desired mode can be set and the performance data of the music selected by the SONG switches 20a to 20d can be reproduced, recorded or edited. It is a thing.

Next, the switches 24 to 31 used for inputting or editing performance data will be described.

The switch 24 with a treble clef is an expansion switch, and exhibits a predetermined function when it is turned on together with other switches, as will be described later, and does not exhibit any function when it is turned on alone.

The switches 25a and 25b are cursor switches for up-counting or down-counting the address pointer for the performance data memory 8 one by one each time the switch is turned on in the recording mode or the editing mode to assist the recording / editing work. It is a thing. The cursor switches 25a and 25b are turned on together with the expansion switch 24 to exert an expanded function, the details of which will be described later.

The switch 26 is a stop symbol switch, and generates stop symbol data indicating the end of the performance data.

Switches 27a to 27c are beat length switches, and switch 2
7a produces 4 beats, switch 27b produces 2 beats, and switch 27c produces 1 beat.

The switches 28a to 28c are repetitive symbol switches. The switch 28a generates the seine, the switch 28b generates the coder, and the switch 28c generates the Darse sign repetitive symbol data. The meaning of each repetition symbol will be described later in detail with reference to FIG.

A switch 29 is a registration switch, which stores registration data stored in the registration memory 7 and registration select switch data, which will be described later, in the performance data memory 8
For loading.

The switch 30 is a delete switch for deleting a part of performance data, and the switch 31 is an insert switch for inserting new data into the performance data.

Next, the switches 32a to 32h, 33, 34 related to the registration memory 7 will be described.

The switches 32a to 32h and 33 are registration select switches, and designate the storage areas of nine types of registration data in the registration memory 7.

The switch 34 is a registration memory switch. When the switch 34 is turned on together with the above-mentioned registration select switches 32a to 32h and 33, the registration data indicating the registration state at that time is loaded into each storage area of the registration memory 7. If the registration select switch is turned on independently, the corresponding registration data will be stored in the memory 7
And the operation panel is set to the registration state.

The switch 35 is a switch for controlling the start / stop of the autorhythm, and is also used for the start / stop of the automatic cursor in the recording or editing mode and the reproduction start / stop control in the reproducing mode.

Example of Music Score and Performance Data (FIGS. 3 and 4) Next, before entering various routines, an example of a music score to be input to the SONG number area of the performance data memory 8 and performance data corresponding to this music score. An example will be sequentially described with reference to FIGS. 3 and 4.

FIG. 4 is an example of a musical score showing a chord part, which is a rest with the first measure, a C major of 4 beats in the second measure, an F major chord of 4 beats in the third measure, and a G beat of 2 beats in the fourth measure. Seventh chord, 1-beat D minor chord and rest, 4th beat A in bar 5
Minor chords are listed. Also, the repeat symbol on the 3rd bar line (Coder), repeat symbol D. S. (Dalsegno) is listed. These repetitive symbols are for instructing the progression of music and are known in the literature, so detailed description thereof will be omitted. S. Symbol is before and closest to this symbol Go back after the (Segno) sign, or if there is no sign, go back to the beginning of the song. In the case of this score, since there is no Segno symbol, it means returning to the beginning of the song. The coder symbol is
D. S. After repetition occurs in the symbol, D. S. Encountered this symbol without encountering the symbol, D. S.
Instruct to jump after the sign. Therefore,
The music progression based on this score is as follows. In addition,
Numbers in parentheses indicate the number of measures.

(1) → (2) → (3) → (4) → (1) → (2) → (3) → (5) → In addition, in this score, the first to fourth measures are set to the resist C and the fifth measure. It is instructed to set each measure in the resist 1.

FIG. 4 shows performance data corresponding to the musical score shown in FIG.
Registration data area 40 for storing registration data
And a tone data area 41 for storing tone data, and reset data is stored in the blank portion. In the registration data area 40, the contents of the registration memory 7 are loaded as they are, and in the score data area 41, rest data and beat length data, chord data and beat length data, repetitive symbol data, registration number data and The end symbol data is stored in 1-byte units in the order of writing the score.

The data at the head of the musical score data area 41 will be referred to as "head data" hereinafter. In this example, rest data and beat length data of 4 beats are the leading data.

Such performance data is transmitted to the SONG switches 20a-20
It is stored in each SONG number area in the performance data memory 8 designated by d.

Main Routine (FIG. 5) Next, the processing of the main routine will be described with reference to FIG. First, in step 50, it is determined whether or not the recording switch 22 is on. If it is on, the recording process is performed in step 51, and if it is off, the process proceeds to step 52.

In step 52, it is determined whether or not the edit switch 23 is on. If it is on, the edit process is performed in step 53, and if it is off, the process proceeds to step 54.

In step 54, it is determined whether or not the regeneration switch 21 is on. If it is on, the regeneration process is performed in step 55, and if it is off, the process returns to step 50. In the reproduction process, as an initial state, the musical tone being sounded is stopped, and the light emitting diode built in the reproduction switch 21 is turned on to display that the reproduction mode is selected.
The light emitting diode of the selected switch of the ONG switches 20a to 20d is turned on. Further, the performance data of the song selected by the SONG switch is read from the SONG number area in the performance data memory 8 and the registration data in the registration data area 40 is loaded into the registration memory 7. As a result, each operator of the control operator circuit 3 is set in the resist state at the beginning of bending by the registration data C.

When the rhythm start / stop switch 35 is turned on after this initial state is completed, the musical score data is sequentially read from the musical score data area 41 in synchronization with the rhythm tempo,
Reproduction processing is performed.

When the termination symbol data or the reset data is read, the reproduction process ends and the process returns to step 50. The reproduction process also ends when the rhythm start / stop switch 35 is turned on again to stop the rhythm.

REC Processing Routine (FIG. 6) Details of the recording processing in step 51 shown in FIG. 5 will be described with reference to FIG. Recording switch 2 as shown in FIG.
When 2 is on, this recording process is performed.

First, in step 60, if the speaker 13 is producing a sound, the sound production is stopped, the recording light emitting diode is turned on, the music selection light emitting diode is blinked, and blink induction is performed.

Next, at step 61, if one of the music selection switches is turned on, the process proceeds to step 62.

In step 62, the music selection light emitting diode which has been turned on is turned on, and the other music selection light emitting diodes are turned off.

In step 63, the reset data is loaded into the SONG number of the music selection switch that is turned on, that is, the SONG number area in the performance data memory 8 corresponding to the selected SONG number, and the data in the selected SONG number area is cleared. To do. Further, it resets various registers, counters, pointers, flags and the like in the working memory 6 corresponding to the selected SONG number. These registers are used to control the memory 8 when storing performance data in the SONG number area in the memory 8.

Next, in step 64, the registration state of the operation panel A is set as the bending start registration data C and the selected SO is selected.
The registration data area 40 in the NG number area is loaded.

In step 65, the registration data 1 to 8 loaded in the registration memory 7 are stored in the selected S
The registration data area 40 in the ONG number area is loaded.

Next, at step 66, if the recording switch 22 is on and the reproducing switch 21 is off, the routine proceeds to step 67. In step 67, the data input shown in FIG.
Perform edit processing. If the recording switch 22 is off or the reproducing switch 21 is on, the routine proceeds to step 68.

In step 68, the registration data in the registration memory 7 is loaded into the selected SONG number area and rewritten. This is because the contents of the registration memory 7 may be changed during execution of the data input / edit processing step 67.

In step 69, the recording light emitting diode and the music selection light emitting diode are turned off.

In step 61, if none of the music selection switches are turned on, the process proceeds to step 70. Step 70
If the predetermined time has not elapsed in step 6, step 6
Return to 1. If the predetermined time has elapsed, the process proceeds to step 69.

The above is all the processing operations of the REC processing routine.

Next, the data input / editing process will be described with reference to FIGS. This processing is a subroutine common to step 67 in the REC processing routine and step 77 in the EDIT processing routine described above.

Data Input / Edit Processing Routine (FIG. 8) FIG. 8 is a data input / edit processing routine. Steps 81 to 87 are the switches 24 to 31 of the operation panel A.
Then, the on / off state of the switch 35 is determined, and if it is on, the respective processes are performed in steps 88 to 94.
If the process is completed or if the switches are all off, the process routine returns to step 66 shown in FIG. 6 or step 76 shown in FIG.

The step 81 judges whether or not any of the beat length switches 27a to 27c is turned on, and if it is turned on, the step 8 is performed.
In step 8, chord / rest data input processing (FIG. 9) is performed.

In step 82, it is judged whether any of the termination symbol step 26 or the iterative symbol steps 28a to 28c is on. If it is on, the symbol data input process (FIG. 10) is performed in step 89.

In step 83, it is determined whether or not the registration switch 29 is on. If it is on, the registration data input process (FIG. 11) is performed in step 90.

In step 84, it is determined whether or not the insert switch 31 is on, and if it is on, insert mode setting (FIG. 12) is performed in step 91.

In step 85, it is determined whether or not the delete switch 30 is on. If it is on, the delete process is executed in step 92 (first
(Fig. 3).

Step 86 is the cursor switch 25a or 25b.
Is on, and if it is on, step 93
The cursor movement processing (FIG. 14) is performed with. in this case,
The expansion switch 24 is the cursor switch 25a or 25
It is also determined whether or not it is turned on together with b.

Step 87 is the rhythm start / stop switch 3
It is determined whether or not 5 is on, and if it is on, step 9
In step 4, automatic cursor processing (FIGS. 15 and 16) is performed.

Next, each routine of steps 88 to 94 shown in FIG. 8 will be described.

Chord / rest data input processing routine (FIG. 9) First, the chord / rest input processing routine shown in step 88 will be described with reference to FIG.

In step 100, the beat length light emitting diode incorporated in the beat length switch selected in step 81 is turned on, and the other beat length light emitting diodes are turned off.

Next, in step 101, it is judged whether or not the insert mode is set, and if it is not the insert mode, step 102, and if it is the insert mode, step 1
Go to 08. If the insert switch 31 is turned on, the insert mode setting routine described later (FIG. 12) will be performed.
Press to enter insert mode.

In step 102, it is judged whether or not there is a memory space in the performance data memory 8. If there is a memory space, the process proceeds to step 103, and if there is no memory space, the process proceeds to step 110.

In step 103, the performance data at the address pointer position is cleared, in step 104 it is judged whether or not the pitch data is output from the key switch circuit 2, and if so, the process proceeds to step 105, and if not, the step Proceed to 106.

In step 105, the beat length data by the selected beat length switch and the chord data formed based on the pitch data detected from the key switch circuit 2 are loaded into the memory location indicated by the address pointer.

In step 106, the beat length data and rest data by the selected beat length switch are loaded into the memory location indicated by the address pointer.

Next, in step 107, the selected beat length light emitting diode is turned off, the address pointer is advanced by one, and the next data is displayed. However, if the pitch data is output from the key switch circuit 2 at this time, the pitch data is prioritized and the sound generation by the performance data in the performance data memory 8 is stopped.

If it is the insert mode in step 101, the process proceeds to step 108, and it is determined in step 108 whether or not there is a memory space in the performance data memory 8. If there is memory space, the process proceeds to step 109, and if there is no memory space, the process proceeds to step 110.

In step 109, the insert flag set in the insert mode setting routine (FIG. 12) described later is reset, the insert light emitting diode is turned off, and the performance data after the address pointer position is shifted backward by 1 byte.

At step 110, a warning sound indicating that there is no more memory space is generated, and the beat length light emitting diode selected at step 111 is turned off.

The above is all the processing operations of the chord / rest data input processing routine.

Symbol Data Input Processing Routine (FIG. 10) Next, the symbol data input processing routine shown in step 89 of FIG. 8 will be described with reference to FIG.

First, in step 120, the symbol light-emitting diode built in the selected symbol switch is turned on.

The processing operations of steps 121 to 123 are the same as the processing operations of steps 101 to 103 shown in FIG.

Next, at step 124, the symbol data by the selected symbol switch is loaded into the performance data memory 8 at the memory location indicated by the address pointer, and the routine proceeds to step 125.

In step 125, it is judged whether or not the symbol data is a termination symbol, and if it is a termination symbol, this processing is terminated,
If it is not the termination symbol, the process proceeds to step 126.

The processing operation of step 126 is the same as step 1 shown in FIG.
It is the same processing operation as 07.

The processing operation of steps 127 to 130 is also the same as the processing operation of steps 108 to 111 shown in FIG.

The above is all the processing operations of this routine.

Registration Data Input Processing (FIG. 11) Next, the registration data input processing routine shown in step 90 of FIG. 8 will be described with reference to FIG.

First, in step 131, the resist light emitting diode built in the resist switch 29 is turned on.

Next, at step 132, it is judged whether the position of the address pointer is the position of the head data. If it is the position of the head data, the process proceeds to step 133, and if not, the process proceeds to step 139.

In step 133, the registration memory 7
The memory content of the registration memory switch number (hereinafter referred to as "select number") on the operation panel A for designating the area in, for example, if the select number is 1, the content of area 1 of the registration memory 7 is operated. Reproduce on panel A.

The processing operations of steps 134 to 136 have the same contents as the processing operations of steps 101 to 103 shown in FIG.

Next, in step 137, the select number is loaded into the memory location indicated by the address pointer, and in step 138
Go to.

The processing operation of step 138 is the same as step 1 shown in FIG.
It is similar to the processing operation of 07.

In step 132, if the address pointer is at the head data position, the process proceeds to step 139, where the registration state on the operation panel A is changed to the registration start data, that is, the fourth registration data.
Registration data C in the registration data area 40 shown in the figure
Is loaded into the performance data memory 8. Then, it progresses to step 143.

The processing operation of steps 140 to 143 is the same as the processing operation of steps 108 to 111 shown in FIG.

The above is all the processing operations of this routine.

Insert Mode Set Routine (FIG. 12) Next, the insert mode set routine of step 91 of FIG. 8 will be described with reference to FIG.

First, in step 150, it is determined whether or not the insert flag is set. If it is not set, the process proceeds to step 151, and if it is set, the process proceeds to step 152.

In step 151, the insert light emitting diode is turned on and the insert flag is set.

In step 152, the light emitting diode for insert is turned off and the insert flag is reset.

The above is all the processing operations of this routine.

Delete Processing Routine (FIG. 13) Next, the delete processing routine of step 92 in FIG. 8 will be described with reference to FIG.

First, in step 160, the delete light emitting diode is turned on.

Next, at step 161, it is judged whether or not the symbol switch is the stop symbol switch 26, and if it is not the stop symbol switch 26, the routine proceeds to step 162, and if it is the stop symbol symbol switch 26, it proceeds to step 164.

In step 162, the performance data at the position indicated by the address pointer is cleared, and the performance data after the address pointer is shifted forward by 1 byte, and step 16
Go to 3.

The processing operation of step 163 is the same as step 1 shown in FIG.
It is similar to the processing operation of 07.

In step 164, the delete light emitting diode is turned off, and a warning sound indicating the end symbol is generated.

The above is all the processing operations of this routine.

Cursor Movement Processing Routine (FIG. 14) Next, the cursor movement processing routine of step 93 shown in FIG. 8 will be described with reference to FIG.

First, in step 170, the cursor light emitting diode is turned on.

Next, in step 171, the type of cursor is determined, and if the cursor switch 25a is the left cursor, the process proceeds to step 172. If the cursor switch 25b is the → cursor, the process proceeds to step 176. The expansion switch shown in FIG. By 24 If it is the cursor of and ←, the process proceeds to step 178 and the expansion switch 24 is used. If the cursors are and, the process proceeds to step 179.

First, the case where the cursor is ← will be described. In step 172, it is judged whether or not the position of the cursor is the position of the leading data, and if it is the position of the leading data, step 1
In step 80, the cursor light emitting diode is turned off, and the processing of this routine ends. If the position of the cursor is not the position of the leading data, the process proceeds to step 173.

In step 173, the position of the address pointer is set to 1
Just to the front, that is, to the younger one, the performance data is displayed and pronounced. However, if the pitch data is output from the key switch circuit 2 at this time, the pitch data is given priority and the chord based on the performance data in the performance data memory 8 is stopped.

Next, at step 174, it is again judged whether or not the position of the address pointer is the position of the leading data, and if it is not the position of the leading data, the routine proceeds to step 180, the cursor light emitting diode is turned off, and the processing of this routine ends. . If it is the position of the head data, the process proceeds to step 175.

In step 175, the song start registration data C is set on the operation panel A, and the process proceeds to step 180.

The operation in step 180 is as described above.

Next, the case where the cursor is → will be described. First, in step 176, if the data at the position indicated by the address pointer is the termination symbol data or the reset data, the process proceeds to step 180, and the processing of this routine ends. If there is no data, go to step 177.

In step 177, the position of the address pointer is set to 1
Just afterwards, that is, to move to the old number, the performance data is displayed and pronounced. However, if the pitch data is output from the key switch circuit 2 at this time, the pitch data is given priority and the chord based on the performance data in the performance data memory 8 is stopped.

Then, it proceeds to step 180.

Then the cursor The case of a combination of and ← will be described. in this case,
Proceeding to step 178, the address pointer is set to the position of the head data, the performance data is displayed / pronuncated, the song start registration data C is set on the operation panel A, and then the process proceeds to step 180.

Then the cursor The case of a combination of and → will be described. In this case, the process proceeds to step 179, the address pointer is set to the stop symbol data position, and if there is no stop symbol data, the reset data position is set and the data at that position is displayed.
Proceed to 80.

The above is all the processing operations of this routine.

Auto Cursor Processing Routine (FIGS. 15 and 16) Next, the auto cursor processing routine of step 94 shown in FIG. 8 will be described with reference to FIGS. 15 and 16.
First, at step 200, the performance data at the address pointer position is read and displayed.

Next, at step 201, it is judged whether or not the rhythm start / stop switch 35 is off, and if not off, the routine proceeds to step 202.

In step 202, it is judged whether or not the rhythm run flag is set. If not set, the process proceeds to step 203, and if it is set, step 20
Return to 1. That is, if the rhythm start / stop switch 35 is not turned off and the rhythm run flag is set, the same operation is repeated by drawing a loop in step 201 and step 202 (hereinafter, this operation is referred to as "repeating operation") and other processing. Never go to

Next, at step 203, it is determined what the performance data at the address pointer position is. If the performance data is a chord / rest, the process proceeds to step 204, if it is registration data, the process proceeds to step 205, and if it is a repetitive symbol, the process proceeds to step 206.
First, the case where the performance data is a chord / rest and the process proceeds to step 204 will be described. In step 204, the operation of the rhythm counter for reading the rhythm pattern from the rhythm pattern memory 9 is started, the rhythm run flag is set, a chord is sounded from the speaker 13, and the beat length data is set in the beat length counter. When this series of processing is completed, the process returns to step 200, but since the rhythm run flag has been set, step 201 and step 202
And repeat operation. Although not shown in this flowchart, when the rhythm run flag is set, an interrupt is generated at every quarter note interval, and the processing operation is the automatic cursor process (interrupt) shown in FIG. Routine ”).

In this interrupt routine, the beat length counter counts, and when the count ends, the same processing operation as the routine of the auto cursor processing shown in FIG. 15 is performed.

When an interrupt occurs in the auto cursor processing routine, the processing operation proceeds to step 210 of the interrupt routine.

In step 210, the beat length counter counts down by one.

Next, at step 211, it is judged whether or not the content of the beat length counter is "0", and if it is not "0", the process returns to the routine of the automatic cursor processing shown in FIG.
If it is "0", the process proceeds to step 212. In this way, the processing operation goes back and forth between the automatic cursor processing routine and the interrupt routine until the beat length counter becomes “0”. The operation when the beat length counter becomes “0” will be described later.

Next, the processing operation when it is determined that the performance data at the address pointer position is the registration data in step 203 of the auto cursor processing routine shown in FIG. 15 will be described. In this case, the processing operation is Step 2
Go to 05. In step 205, the resist data is set on the operation panel A, and the process proceeds to step 206.

In step 206, the address pointer is incremented by 1, and step 200 is returned to.

Next, when it is determined in step 203 that the performance data at the address pointer position is the repeat symbol, the processing operation proceeds to step 206, the address pointer is incremented by 1, and the operation returns to step 200.

Next, when it is determined in step 203 that the performance data at the address pointer position is the end / reset, the processing operation of this routine ends. That is, the process returns to step 66 shown in FIG.

Next, the processing operation when the beat length counter becomes "0" in step 211 of the interrupt routine shown in FIG. 16 will be described. In this case, the processing operation is step 211.
To step 212.

In step 212, the address pointer is advanced by 1 to read the performance data from the performance data memory 8 and display it.

Next, at step 213, the contents of the performance data at the address pointer position are judged. The performance data is a chord
If it is a rest, the process proceeds to step 214, if it is an end / reset, it proceeds to step 215, if it is registration data, it proceeds to step 216, and if it is a repeat symbol, it returns to step 212.

First, the case where the performance data is a chord / rest will be described. In this case, in step 214, the chord is sounded from the speaker 13, the beat length data is set in the beat length counter, and the routine returns to the automatic cursor processing routine shown in FIG.

Next, when the performance data is the end / reset, step 21
At 5, the operation of the rhythm counter is stopped, the rhythm run flag is reset, and the generation of chords is stopped. In this case, the operation of the automatic cursor processing is also completed, and R shown in FIG.
Returning to step 66 of the EC processing routine.

If the performance data is registration data, the registration data is set on the operation panel A in step 216, and the process returns to step 212.

If the performance data is a repeat symbol, no processing operation is performed,
Immediately return to step 212.

Next, in step 201 of the automatic cursor processing routine shown in FIG. 15, when it is determined that the rhythm start / stop switch 35 is off, the processing operation is step 20.
Move to 7.

At step 207, the performance data at the address pointer position is read out, displayed and sounded, and the routine proceeds to step 208.

In step 208, the rhythm counter is stopped, the rhythm run flag is reset, the chord is stopped, and this processing routine is ended.

The above is all of the automatic cursor processing operation shown in FIGS.

EDIT Processing Routine (FIG. 7) Next, the editing processing routine will be described with reference to FIG. As shown in FIG. 5, if the recording switch 22 is off and the editing switch 23 is on, this editing process is performed.

First, in step 71, if the speaker 13 is producing sound, the production of sound is stopped, the light emitting diode for editing is turned on, the light emitting diode for music selection is blinked, and blink induction is performed.

Next, at step 72, if one of the music selection switches is turned on, the process proceeds to step 73.

In step 73, the selected song selection light emitting diode is turned on and the other song selection light emitting diodes are turned off.

Next, in step 74, the registration data from the registration data area 40 of the selected SONG number area is set in the operation panel A and the registration memory 7.

Next, at step 75, the address pointer is set to the position of the head data and the head data is read and displayed. In addition,
"Display" means to play the chord if the read data is chord data, turn on the light emitting diode in the corresponding beat switch if it is the beat data, and in the corresponding symbol switch if it is the sign data. LED of the control panel is turned on, and if it is registration data, the LED of the registration switch is turned on, and the LED of the corresponding registration number switch or registration cancel switch is turned on to bring it to the corresponding registration state. Set the child. Therefore, in the example of FIG. 4, since the rest data and the 4-beat data are read, the light emitting diode in the beat length switch 27a is turned on.

Next, at step 76, the edit switch 23 is turned on,
If the reproduction switch 21 is off, the process proceeds to step 77. If the edit switch 23 is off or the reproduction switch 21 is on, the process proceeds to step 78.

In step 77, the same processing as step 67 shown in FIG. 6 described above is performed. For this process,
This will be described later with reference to FIGS. 8 to 16.

In step 78, the registration data in the registration memory 7 is loaded into the performance data memory 8 and rewritten. This is similar to step 68 described above.

Next, at step 79, the light emitting diode for editing and the light emitting diode for song selection are turned off.

If none of the music selection switches are turned on in step 72, the process proceeds to step 80. Step 80
In step 7, if the predetermined time has not elapsed, step 7
Return to 2. If the predetermined time has elapsed, the process proceeds to step 79.

The above is all of the processing operation of the EDIT processing routine.

〔The invention's effect〕

As described above, according to the present invention, the address is automatically / manually stepped to directly specify the write address, so that the performance data to be changed / edited can be easily searched and the performance data to be changed / edited can be easily searched. It can be specified accurately, and performance data editing work can be performed efficiently.

That is, since the first address control means automatically updates the addresses sequentially from the current designated address without changing the head address of the storage means, the second address control means designates an arbitrary address. After the performance data is corrected, the current designated address can be automatically updated, and any address after the current designated address can be designated quickly and easily.

In addition, after the performance data is input or the performance data is corrected by the third address control means, the input performance data can be instantly started to be confirmed from the beginning of the music, and the current designated address is the music. In the latter half, the address of the first half of the music can be specified quickly and easily.

Specifically, by automatically updating to an arbitrary address and manually changing the address from there while playing, the address can be manually changed only in the vicinity of the address where you want to write the performance data. The address can be automatically updated before and after the designation. As a result, it is possible to easily find a desired one from a large number of performance data and easily rewrite or add the performance data.

Further, by manually advancing to a desired address and automatically updating only the desired range from that address, it is possible to automatically perform an arbitrary desired section, so that the stored performance data can be easily confirmed. .

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of an automatic musical instrument according to the present invention, FIG. 2 is a plan view showing a part of an operation panel of this device, FIG. 3 is a musical score diagram showing an example of a musical score, FIG. 4 is a data state diagram showing an example of performance data, FIG. 5 is a flow chart showing a main routine, FIG. 6 is a flow chart showing a REC processing routine, FIG. 7 is a flow chart showing an EDIT processing routine, and FIG. 8 is data. FIG. 9 is a flowchart showing an input / edit processing routine, FIG. 9 is a flowchart showing a chord / rest data input processing routine, FIG. 10 is a flowchart showing a symbol data input processing routine, and FIG. 11 is a flowchart showing a registration data input processing routine. , FIG. 12 is a flowchart showing an insert mode setting routine, and FIG. 13 is a delete processing routine. To flowcharts, the flowchart Fig. 14 showing the cursor moving processing routine, the flow chart FIG. 15 showing the AutoCursor processing routine, FIG. 16 is a flowchart showing the automatic cursor processing routine (interrupt). 1 ... bus, 2 ... key switch circuit, 3 ... control operator circuit, 4 ... CPU, 5 ... program memory, 6 ... working memory, 7 ... registration memory, 8 ... performance data memory , 9 ... Rhythm pattern memory, 10 ... Tempo oscillator, 11 ... Music forming circuit, 12 ... Amplifier, 13 ... Speaker, A ... Operation panel, 20a-20d ... Song selection switch, 21 ... Playback Switch, 22 ... Recording switch, 23 ... Editing switch, 24 ... Expansion switch, 25a, 25b ... Cursor switch, 26, 28a-28c ... Symbol switch, 27a-27c ... Beat length switch, 29 ... Registration switch, 30 ... Delete switch, 31 ... Insert switch, 32a to 32h ... Registration memory switch 33 ... Registration select switch, 34 ... Registration memory switch, 35 ... Rhythm start / stop switch, 40 ... Registration data area, 41 ... Music score data area.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-58-130385 (JP, A) JP-A-58-129478 (JP, A) JP-A-58-42093 (JP, A) JP-A-58- 100187 (JP, A) JP 4-5194 (JP, B2) JP 4-4598 (JP, B2) JP 64-7397 (JP, B2)

Claims (1)

[Claims] 1. Storage means having a large number of addresses for sequentially storing performance data as a song progresses, address designating means for designating addresses of this storage means, and designated by the address designating means for each operation. Performance data 1 before or after the specified address
Address manual update instruction operator for instructing to change the address by one, address automatic update instruction operator for instructing start and stop of the automatic update of the address specified by the address designating means, and the address designating means specified by the address designating means. In response to a start address instruction operator for instructing to change the specified address from the current designated address to the start address of the storage means, and a start instruction for automatic address update by the address automatic update instruction operator. The address designated by the address designating means is automatically updated sequentially from the present designated address without changing the head address of the storage means so that the music progresses according to the playing tempo, and the address automatic updating instruction is issued. Stop automatic address update in response to an operator's instruction to stop automatic address update When there is an operation of the address manual update instruction manipulator while the automatic address updating is stopped, the address specified by the address specifying means is changed to the currently specified address. Second address control means for changing one performance data before or after, and an address designated by the address designating means from the present designated address in response to the operation of the leading address designating operator. Third address control means for changing the head address of the means, and each time the address designated by the address designating means is changed, a musical tone signal for generating a musical tone signal based on performance data corresponding to the changed address Generating means, performance data input means for inputting performance data to be written in the storage means, and When performance data is input by the performance data input means, the performance data is written into the address designated by the address designating means in the storage means.