JPH0684899A - Resin sealed semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a wiring from sliding by providing a wiring of a lower layer adjacent to an outside of a wiring arranged nearest an outer periphery of a semiconductor chip of wirings of an uppermost layer. CONSTITUTION:A polysilicon film 103 is provided to a field oxide film 102 formed selectively on a surface of a P-type silicon substrate 101, and a layer insulation film 104 is provided covering the polysilicon film 103. The layer insulation film 104 is flattened by reflow treatment. An aluminum film 105-1 is formed inside stepped parts A, B of the layer insulation film 104 by the polysilicon film 103, a cover film 106 consisting of silicon nitride covers it and sealing resin 107 seals it. Contraction stress is thereby dispersed and applied to stepped parts A, B as shown by an arrow. Thereby, it is possible to surely prevent a wiring from sliding.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed semiconductor device.

[0002]

2. Description of the Related Art A resin-encapsulated semiconductor device in which a semiconductor chip is encapsulated with a resin is vulnerable to thermal stress because there is a difference in thermal expansion coefficient between the encapsulating resin and the semiconductor chip. Due to the thermal stress, the phenomenon that the cover insulating film covering the surface of the semiconductor chip is cracked or the uppermost wiring is slid occurs. Such a phenomenon of sliding or the like becomes more prominent as it gets closer to the corner of the semiconductor chip.

Various measures have been attempted to prevent such problems such as sliding. As one of them, as disclosed in Japanese Patent Laid-Open Publication No. Hei 2-297953, a method of providing a dummy conductive film outside the uppermost wiring can be mentioned. This dummy conductive film is formed at the same time as the uppermost wiring. The shrinkage stress of the sealing resin, which causes sliding, is mainly received by the dummy conductive film to protect the wiring. This method is practical in that it is independent of the change of the material for reducing the difference in thermal expansion coefficient and does not require any special process. However, the dummy conductive film itself may slide.

[0004]

By the way, in the technical field of semiconductor integrated circuits, a consistent trend of large scale and miniaturization is recognized. For example, in semiconductor memory, the number of bits is increasing at a rate of quadruple in several years, and the scale is increasing. On the other hand, the area of the semiconductor chip has been reduced to about twice due to the miniaturization of the constituent elements. As described above, when the semiconductor chip becomes large, the phenomenon such as the above-mentioned sliding easily occurs. Furthermore, the use in an environment where the thermal stress is severe, such as in-vehicle use or in the desert, is increasing, and further reliability is required.

Therefore, an object of the present invention is to provide a resin-encapsulated semiconductor device equipped with means that can be realized without adding any special process and that can more surely prevent wiring sliding.

[0006]

A resin-sealed semiconductor device of the present invention has an n-th layer conductive film selectively deposited on an insulating film covering a rectangular silicon substrate. The n-th layer conductive film is arranged in a region including the vicinity of one corner of the semiconductor chip. At least one interlayer insulating film is provided to cover the n-th conductive film. The uppermost interlayer insulating film of the interlayer insulating films is selectively deposited, and at least inside the vicinity of the corner of the semiconductor chip where the nth conductive film is provided, in parallel with the nth conductive film. It has a wiring composed of the (n + m) th layer conductive film arranged. A cover film is provided to cover the wiring.

[0007]

EXAMPLE A first example of the present invention will be described with reference to FIGS. 1 (a) and 1 (b).

In FIG. 1A, the sealing resin of the package is not shown for convenience, and the end position of the cover film is 2
Only the dotted line shows them.

A polysilicon film 103 (first-layer conductive film) is formed on a field oxide film 102 selectively formed on the surface of a rectangular P-type silicon substrate 101. The polysilicon film 103 is arranged in a ring shape on the outer peripheral portion of the semiconductor chip. This polysilicon film 103 is formed in the same step as the gate electrode of a MOS transistor as a circuit element. Interlayer insulating film 104 covering the polysilicon film
Is provided. The interlayer insulating film 104 is made of BPSG and is flattened by a reflow process. An aluminum film 105-1 (second-layer conductive film) is formed inside the step portion of the interlayer insulating film 104 made of the polysilicon film 103. The aluminum film 105-1 is connected to the bonding pad 108-1 which is also made of an aluminum film. The aluminum film 105-1 is a signal line or a power line. The bonding pad 108-2 is arranged next to the bonding pad 108-1, and the aluminum film 10 is formed.
It is connected to 5-2. Reference numeral 106 is a cover film made of a silicon nitride film, and 107 is a sealing resin.

The cover film 106 has step portions A and B as shown in the figure. The height of the step portion A is the polysilicon film 10
The thickness of 3 is good. The height of the step portion B is approximately equal to the value obtained by subtracting the thickness of the polysilicon film 103 from the thickness of the aluminum film 105-1. In the integrated circuit, the thickness of the lower conductive film is usually designed to be smaller than the thickness of the upper conductive film.

The shrinkage stress of the sealing resin 107 is dispersed and added to the step portions A and B as shown by the arrow in FIG. Therefore, the aluminum film 105-1 can be prevented from sliding. In addition, as described above, the interlayer insulating film 1
Since 04 is flattened, it has almost no defects such as voids and is excellent in mechanical strength. Further, since the side wall of the step portion A has a gentle slope, the risk of the cover film 106 cracking at the step portion A is reduced. Therefore, it is possible to prevent the polysilicon film 103 from sliding. The polysilicon film can be used not only as a dummy conductive film for preventing the aluminum film 105-1 from sliding, but also as a signal line. As the dummy conductive film, FIG.
As shown in (a), it is not necessary to arrange in a ring shape on the outer peripheral portion of the semiconductor chip. That is, the ring-shaped polysilicon film 103 may be cut at a distance from each of the four corners of the semiconductor chip by a certain dimension to be divided into four L-shaped portions and four linear portions. The L-shaped portion may be used as a dummy conductive film, and the linear portion may be used as a signal line.

A second embodiment of the present invention will be described with reference to FIGS. 2 (a) and 2 (b). In this embodiment, the present invention is applied to a semiconductor device having a two-layer aluminum wiring structure.

As in the first embodiment, the polysilicon film 103 (first-layer conductive film) is arranged in a ring shape on the outer peripheral portion of the semiconductor chip. Inside the polysilicon film 103, a first interlayer insulating film 104-1 (reflow-processed B
First layer aluminum film 105-3 via PSG film)
(Second-layer conductive film) is arranged, and the second-layer aluminum film 105 is further provided inside the second-layer insulating film 104-2.
-4 (third-layer conductive film) is provided. The second layer aluminum film 105-4 is a signal line or a power line. Second
The interlayer insulating film 104-2 is flattened by a method such as forming an SOG film or etching back.

The shrinkage stress of the sealing resin is due to three step portions A,
Since it is dispersed in B and C, the sliding phenomenon and the like can be prevented more reliably than in the first embodiment. As in the first embodiment, the polysilicon film 103 and the first-layer aluminum film 105-3 are not necessarily limited to the dummy conductive film. In addition to the polysilicon film, the first-layer conductive film may be a refractory metal silicide film, a polycide film in which a refractory metal silicide film is laminated on a polysilicon film, or the like. The conductive film above the first-layer conductive film is not limited to an aluminum film, but an Al-Si alloy film,
It will be apparent to those skilled in the art that any material such as an Al-Si-Cu alloy film that can be used as wiring for a semiconductor device may be used.

As is clear from the above description, the present invention has been devised in the layout of the conductive film, and therefore can be carried out without adding any special steps.

[0016]

As described above, according to the present invention, among the uppermost layer wiring (the (n + m) th layer conductive film) covered with the cover film, the lower layer is provided outside the wiring which is arranged closest to the outer periphery of the semiconductor chip. By providing the wiring (n-th layer conductive film) adjacent to each other, the shrinkage stress of the sealing resin is dispersed in the step portion formed by the uppermost layer wiring and the step portion formed by the n-th layer conductive film, so that the wiring is guarded. The n-th conductive film is covered with an interlayer insulating film, but since the interlayer insulating film is usually subjected to a flattening process, it has a higher mechanical strength than the cover film.

Furthermore, since the step portion formed by the n-th layer conductive film has side walls with a gentle slope, the step portion also has a stress dispersing action. Therefore, it is difficult for the n-th layer conductive film to slide. The n-th layer conductive film can be used not only as a dummy conductive film for preventing the (n + m) -th layer conductive film from sliding, but also as an actual wiring. According to the present invention, it is possible to improve the reliability and the degree of integration of a resin-sealed semiconductor device.

[Brief description of drawings]

FIG. 1 is a plan view showing a first embodiment of the present invention (see FIG.
It is (a)) and sectional drawing (FIG.1 (b)).

FIG. 2 is a plan view (FIG. 2A) and a sectional view (FIG. 2B) showing a second embodiment.

[Explanation of symbols]

101 P-type silicon substrate 102 Field oxide film 103 Polysilicon film 104, 104-1, 104-2 Interlayer insulating film 105-1, 105-2, 105-3, 105-4
Aluminum film 106 Cover film 107 Sealing resin

Claims (3)

[Claims] 1. A rectangular silicon substrate, an insulating film covering the silicon substrate, and an n-th layer conductive layer selectively deposited on the insulating film and arranged in a region including the vicinity of one corner of the silicon substrate. A film (where n ≧ 1), at least one interlayer insulating film covering the silicon substrate provided with the n-th conductive film, and selectively deposited on the uppermost interlayer insulating film of the interlayer insulating films. From at least the (n + m) th layer conductive film (m ≧ 1) arranged in parallel with the nth conductive film at least inside the corner of the silicon substrate on which the nth conductive film is provided. And a cover film covering the wiring, the resin-encapsulated semiconductor device. 2. The resin-sealed type according to claim 1, wherein an interlayer insulating film provided between the n-th layer conductive film and the (n + m) -th layer conductive film is subjected to a flattening treatment. Semiconductor device. 3. The resin-encapsulated semiconductor device according to claim 1, wherein the cover film is a silicon nitride film.