JPH0684375A - Sense amplifier circuit - Google Patents

Abstract

PURPOSE:To expand the operatable power source voltage range of the sense amplifier circuit of a semiconductor memory by providing a selection circuit for changing the capacity of transistors(Trs) for controlling the current flowing in memory bit lines. CONSTITUTION:This sense amplifier circuit has a constant voltage circuit E having N channel transistors (NchTRs) N16, N17, inverters IV1 to IV3, NChTrs N11 to N15 and PchTRs P11 to P12. The N13, N14 of the NChTrs for current control varying in the capacity are disposed in parallel and which of NChTr N13 or N14 is activated is selected. The selection of the NChTrs N11, N12 is executed by the output signal VA of the constant voltage circuit E. The 'H' level and 'L' level of this output signal VA are determined by depressing one of the NChTrs N16 and N17 by ion implantation and enhancing one thereof.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sense amplifier circuit, and more particularly to a current sense type sense amplifier circuit used in a semiconductor memory.

[0002]

2. Description of the Related Art A conventional current sense type sense amplifier circuit has a circuit configuration as shown in FIG. In FIG. 4, an inverter I having a memory cell bit line 40 as an input
A feedback circuit is constituted by V1 and the current control N-channel transistor N9 whose gate input is the output signal of the inverter IV1, and the potential of the bit line is kept constant. The current flowing through the memory cell bit line 40 flows through the N-channel transistor P1, and the P-channel transistor P2, which is a pair of current mirrors, has a current according to the capacity ratio with the transistor P1. The potential at the node is determined to be VL by the current flowing through the transistor P2. The output of the sense amplifier circuit J is determined by comparing this potential VL with the output potential Vref of the reference amplifier circuit K. As described above, in the case of the sense amplifier circuit J which operates by detecting the current flowing through the memory cell bit line 40,
The magnitude of the current affects the detection speed.

The sense amplifier circuit J is an inverter I.
V1 and IV2 and P channel transistors P1 and P2
A memory cell bit line 40, a sense amplifier output terminal 42, and N channel transistors N5 and N9.
There is an input line for the comparison voltage Vref. The reference amplifier circuit K includes an inverter IV4, P-channel transistors P11 and P22, and an N-channel transistor N1.
0, N99, and a reference memory cell bit line 41 and an output line for the comparison voltage Vref.

[0004]

In the conventional sense amplifier circuit, the current control transistor N9 of the memory cell bit line 40 may have a large current supply capability for high speed operation, but it is more than necessary. If the capacity is increased too much, the feedback operation performed by the inverter IV1 cannot be performed stably, which causes malfunction.

Therefore, it is difficult to guarantee a power supply voltage capable of operating in a wide range because a transistor having an optimum capacity according to the current flowing through the memory cell bit line 40 is used.

An object of the present invention is to provide a sense amplifier circuit which solves the above-mentioned difficult problems and can guarantee a power supply voltage which can operate in a wide range.

[0007]

The configuration of the sense amplifier circuit of the present invention is characterized in that it has a switching circuit capable of changing the ability of the transistor for controlling the supply of the current supplied from the sense amplifier to the memory cell bit line. To do.

[0008]

The present invention will be described below with reference to the drawings. 1 is a circuit diagram showing a sense amplifier circuit according to a first embodiment of the present invention.

In FIG. 1, the present embodiment has a constant voltage circuit E having N-channel transistors N16 and N17, inverters IV1, IV2 and IV3, N-channel transistors N11, N12, N13, N14 and N15, and P.
It has channel transistors P11 and P12, has a sense amplifier output terminal 42, a comparison voltage Vref input (output of the reference circuit) terminal, and a memory cell bit line 11, and is configured between a VCC power supply and ground. .

In FIG. 1, in the present embodiment, current control N-channel transistors (hereinafter referred to as NchTr) N13 and N14 having different capacities are arranged in parallel, and the NchTr N
11, N12 selects which of the NchTr N13 and N14 is activated. NchTr
Switching between N11 and N12 is performed by the output signal VA of the constant voltage circuit E. This output signal VA is the NchTr
By depleting one of N16 and N17 by ion implantation and enhancing one of them,
Determine'H 'and'L' levels.

NchTr N13 and N14 for current control
Current supply capacity (hereinafter referred to as gm) of the transistor N
If 13 <transistor N14, the current flowing through the memory cell bit line 11 is large when operating with a high power supply voltage. Therefore, a gm-small transistor N13 is used as the NchTr N13, N14 for current control. At this time, since the level of the output signal VA may be set to the'L 'level, the NchTr N17 is depleted.

On the contrary, when it is desired to operate on the constant power supply voltage side,
Since the current flowing through the memory cell bit line 11 is small, g
The m-sized transistor N14 is used for current control.
At this time, since the level of the output signal VA may be set to the “H” level, the NchTr N16 is depleted. Thus, the capability of the sense amplifier can be changed according to the power supply voltage used.

Among the semiconductor devices, there are products in which the user can specify the active level of the control terminal when ordering from the semiconductor device manufacturer. Taking a mask ROM as a typical example thereof, the ion coding method is the mainstream at present as the ROM coding method of the mask ROM, and the above-mentioned information on the active level of the control terminal is R.
This is done in the OM coding process. Similarly,
Also in the case of the present embodiment, it is possible to provide the product having the characteristics adapted to the power supply voltage used by the user when receiving the order.

FIG. 2 is a circuit diagram showing a sense amplifier circuit according to the second embodiment of the present invention.

In FIG. 2, the power supply voltage detecting circuit C of this embodiment is different from that of the first embodiment, and the other circuit parts are the same as those of FIG. Here, the power supply voltage detection circuit C is
P-channel transistors P13 and P14, N-channel transistors N18 and N19, and transistors Q1 and Q
2, ..., Qn series body.

The current control NchTrN13, N14 is switched according to the level of the output signal VB of the power supply voltage detection circuit C. The power supply voltage detection circuit C operates when the input control signal CE (inversion value) is at a low level, and the power supply VCC is diode-connected and series-connected NchTr Q1, ..., Q.
When it is lower than the reference voltage VD determined by n, the low level detection signal VB is output, and when it is high, the high level detection signal VB is output. This reference voltage VD can be set to a desired value by changing the number of NchTrs Q1 to Qn and the threshold voltage.

Here, the NchTr N13 for current control is used.
Is set to a large gm and NchTr N14 is set to a small gm, and VB becomes a low level in the low power supply voltage region.
13 is selected and VB is at a high level in the high power supply voltage region, so NchTr N14 is selected.

FIG. 3 is a circuit diagram showing a sense amplifier circuit according to the third embodiment of the present invention. In the present embodiment, the inverters IV1 and IV2, aluminum wirings F, G, H and I, and N-channel transistors N13 and N are shown in FIG.
14, N15 and P-channel transistors P11, P1
2 and has a memory cell bit line 31, a sense amplifier output terminal 42, and an input terminal for the comparison voltage Vref. F, G, H, and I are aluminum wirings, and which of the current control transistors N13 and N14 is used when forming these aluminum wiring layers is determined.

[0019]

As described above, according to the present invention, the range of the power supply voltage to be used can be changed by having the switching circuit capable of changing the ability of the transistor for controlling the supply of the current flowing from the sense amplifier to the memory cell bit line. There is an effect.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a sense amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a conventional sense amplifier circuit and reference amplifier circuit.

[Explanation of symbols]

P1, P2, P11, P12, P13, P14, P22
P-channel transistors N11, N12, N13, N14, N15, N16, N
17, N18, N19, Q1, ... Qn N-channel transistors IV1 to IV4 Inverter VA Constant voltage circuit output VB Current / voltage detection circuit output E Constant voltage circuit C Power supply voltage detection circuit J Sense amplifier circuit K Reference amplifier circuit

Claims (4)

[Claims] 1. A sense amplifier circuit for detecting a current flowing through a memory cell bit line to determine data in a memory cell, having a switching circuit for changing a capability of a transistor for controlling a current flowing through the memory cell bit line. A sense amplifier circuit characterized in that 2. The sense amplifier circuit according to claim 1, wherein the switching circuit is controlled by an output of a constant voltage circuit having a series body of a depletion type transistor and an enhancement type transistor. 3. The sense amplifier circuit according to claim 1, wherein the means for controlling the switching circuit includes a diode-connected series body of a plurality of transistors. 4. The sense amplifier circuit according to claim 1, wherein switching of the switching circuit is determined by a layout of a plurality of aluminum wirings.