JPH0682910B2 - Circuit board manufacturing method - Google Patents
Circuit board manufacturing methodInfo
- Publication number
- JPH0682910B2 JPH0682910B2 JP63108206A JP10820688A JPH0682910B2 JP H0682910 B2 JPH0682910 B2 JP H0682910B2 JP 63108206 A JP63108206 A JP 63108206A JP 10820688 A JP10820688 A JP 10820688A JP H0682910 B2 JPH0682910 B2 JP H0682910B2
- Authority
- JP
- Japan
- Prior art keywords
- connector contact
- circuit
- contact terminals
- insulating substrate
- shaped groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims description 35
- 238000007747 plating Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 7
- 238000005520 cutting process Methods 0.000 description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 239000011889 copper foil Substances 0.000 description 7
- 239000004020 conductor Substances 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- 239000003973 paint Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] この発明は、電子機器に用いられる回路基板の製造方法
に関するものである。TECHNICAL FIELD The present invention relates to a method for manufacturing a circuit board used in an electronic device.
[従来の技術] 従来から、回路基板の端子部は、コネクタに入りやすく
するため、その先端部の角を研磨機にかけてテーパをつ
けていた。この場合には、複数の回路基板を一枚の絶縁
基板を分割して製造するいわゆる多数個取りの際に、端
子部を一枚の絶縁基板の外側に向けて端縁部に形成しな
ければならず、最大2列の回路基板を一枚の絶縁基板か
ら分割する程度であり、量産性が悪いという欠点があっ
た。[Prior Art] Conventionally, a terminal portion of a circuit board is tapered by polishing a corner of a tip portion thereof in order to make it easy to enter the connector. In this case, when a plurality of circuit boards are manufactured by dividing one insulating substrate into so-called multiple pieces, the terminal portion must be formed at the edge portion toward the outside of the insulating substrate. However, there is a drawback in that mass production is poor because the maximum of two rows of circuit boards is divided from one insulating board.
これに対して特開昭55-127096号公報に示された回路基
板の製造方法では、メッキが施される複数のコネクタ接
点端子をそれぞれ備えた1組の回路パターンを、それぞ
れの回路パターンのコネクタ接点端子を対向させ且つ対
向するコネクタ接点端子どうしをメッキ用の通電パター
ンによりそれぞれ接続した態様で一枚の絶縁基板上に2
組形成する。そしてコネクタ接点端子にメッキを施した
後に、まず切断機で1組の回路パターンを備えた回路基
板を切り離す。次にこの1組の回路パターンを備えた回
路基板を1つの回路パターンを備えた単数の回路基板に
分割する際に、一組の回路パターンの相対向するコネク
タ接点端子間即ちメッキ用の通電パターンを形成した部
分に絶縁基板の表裏両面からV字状溝を形成し、そのV
字状溝に沿って基板を分割して個々のコネクタ接点端子
付回路基板を得ている。このようにする基板の切り離し
と同時に、端子部端縁にテーパ付けを行うことができ
る。On the other hand, in the method of manufacturing a circuit board disclosed in Japanese Patent Laid-Open No. 55-127096, a set of circuit patterns each having a plurality of connector contact terminals to be plated is provided with a connector of each circuit pattern. 2 on one insulating substrate in a state in which the contact terminals are opposed to each other and the opposing connector contact terminals are respectively connected by the energizing pattern for plating.
Form a set. After the connector contact terminals are plated, the cutting machine first separates the circuit board having a set of circuit patterns. Next, when the circuit board having this set of circuit patterns is divided into a single circuit board having one circuit pattern, a pair of circuit patterns are provided between opposing contact point terminals of the connector, that is, an energizing pattern for plating. V-shaped groove is formed on both sides of the insulating substrate in the area where
The circuit board with the connector contact terminals is obtained by dividing the circuit board along the groove. Simultaneously with the separation of the substrate in this way, the edge of the terminal portion can be tapered.
[発明が解決しようとする課題] しかしながらV字状溝を形成する前に、切断機によって
一組の回路パターンを備えた回路基板に切り離すと、一
組の回路パターンを備えた各回路基板毎にV字状溝を形
成する作業をしなければならず、量産性が悪くなるとい
う問題がある。またV字状溝を形成する前に切断機によ
って一組の回路パターンを備えた回路基板に切り離して
しまうと、電子部品の実装の自動化にも支障をきたす問
題がある。[Problems to be Solved by the Invention] However, when a circuit board having a set of circuit patterns is cut by a cutting machine before forming the V-shaped groove, each circuit board having a set of circuit patterns is separated. Since the work of forming the V-shaped groove has to be performed, there is a problem that mass productivity deteriorates. Further, if the cutting machine separates the circuit board having a set of circuit patterns before forming the V-shaped groove, there is a problem that automation of mounting of electronic components is also hindered.
また従来の方法では、メッキ用の通電パターンをコネク
タ接点端子と全体的につながるほど太く形成していたた
め、V字状溝を形成する際におけるメッキ用通電パター
ンの切削時に接点端子に大きなストレスが加わり易く、
コネクタ接点端子の剥離や破損が発生する恐れがある。
更に、通電パターンの面積が多くなると、V字状溝を形
成する際に発生する通電パターンを構成する銅泊等の導
電物質の粉が端子部に付着し、端子間のショートが発生
する問題がある。Further, in the conventional method, the energizing pattern for plating is formed so thick as to be entirely connected to the connector contact terminal. Therefore, a large stress is applied to the contact terminal when cutting the energizing pattern for plating when forming the V-shaped groove. Easy,
The connector contact terminals may be peeled off or damaged.
Further, when the area of the energization pattern is increased, powder of a conductive material such as copper foil, which forms the energization pattern when the V-shaped groove is formed, adheres to the terminals, causing a short circuit between the terminals. is there.
本発明は、上述の従来の技術の課題に鑑みて成されたも
ので、製造工程における歩留りが良く量産性が高い回路
基板の製造方法を提供することを目的とする。The present invention has been made in view of the above problems of the conventional technique, and an object of the present invention is to provide a method for manufacturing a circuit board, which has a high yield in the manufacturing process and high mass productivity.
[課題を解決するための手段] 本発明の方法では、メッキが施される複数のコネクタ接
点端子をそれぞれ備えた1組の回路パターンを、それぞ
れの回路パターンのコネクタ接点端子を対向させ且つ対
向するコネクタ接点端子どうしをメッキ用の通電パター
ンによりそれぞれ接続した態様で一枚の絶縁基板上に複
数組み形成する。そして各組の回路パターンの境界に強
度を下げた分割部をミシン目により形成する。分割部の
形成及びコネクタ接点端子へのメッキの後に、各組の回
路パターンの相対向するコネクタ接点端子間に絶縁基板
の表裏両面から溝の幅が溝の深さより広く、溝の幅が相
対向する両コネクタ接点端子の間隔よりわずかに狭いV
字状溝を形成する。その後に絶縁基板を前記V字状溝及
び分割部に沿って分割して個々のコネクタ接点端子付回
路基板を得る。またメッキ用の通電パターンをコネクタ
接点端子の幅よりも細い線で形成する。[Means for Solving the Problem] In the method of the present invention, a set of circuit patterns each having a plurality of connector contact terminals to be plated are made to face and are opposed to the connector contact terminals of each circuit pattern. A plurality of sets are formed on a single insulating substrate in such a manner that the connector contact terminals are connected to each other by a current-carrying pattern for plating. Then, at the boundary between the circuit patterns of each set, a divided portion having a reduced strength is formed by perforations. After forming the divided parts and plating the connector contact terminals, the width of the groove is wider than the depth of the groove from the front and back surfaces of the insulating substrate between the opposing connector contact terminals of the circuit pattern of each set, and the width of the groove is opposite to each other. Slightly narrower than the distance between the contact terminals of both connectors
Form a groove. After that, the insulating substrate is divided along the V-shaped groove and the dividing portion to obtain individual circuit boards with connector contact terminals. Further, the energizing pattern for plating is formed by a line thinner than the width of the connector contact terminal.
[作用] この発明の回路基板の製造方法では、切断機を用いて回
路基板を分割せずに、絶縁基板に分割部をミシン目によ
り形成して、最終工程で各回路基板を分割する。V字状
溝は、ミシン目と比べて機械的強度が低く、一組の回路
パターンをコネクタ接点端子の部分で分割するためV字
状溝を形成する場合に、分割部もV字状溝で形成する
と、分割前の絶縁基板全体の機械的強度が低下し、絶縁
基板の搬送時や絶縁基板全体に対して電子部品を実装す
る作業を行っているときに、V字状溝に割れが入ってし
まい、その後の作業が続行できなくなる問題が発生す
る。本発明においては、分割部をミシン目で形成してい
るため、このような問題は発生しない。また本発明で、
絶縁基板に対してV字状溝を形成した後に、V字状溝と
分割部に沿って回路基板の分割を行うため、量産性に優
れている。[Operation] In the method of manufacturing a circuit board of the present invention, the circuit board is not divided by using a cutting machine, the division portion is formed by perforations on the insulating substrate, and each circuit board is divided in the final step. The V-shaped groove has a lower mechanical strength than the perforations, and when the V-shaped groove is formed to divide a set of circuit patterns at the connector contact terminal portion, the divided portion is also a V-shaped groove. When formed, the mechanical strength of the entire insulating substrate before division is reduced, and cracks occur in the V-shaped groove during transportation of the insulating substrate or during the work of mounting electronic components on the entire insulating substrate. This causes a problem that the subsequent work cannot be continued. In the present invention, since the divided portion is formed by perforations, such a problem does not occur. Also in the present invention,
Since the circuit board is divided along the V-shaped groove and the dividing portion after the V-shaped groove is formed in the insulating substrate, mass productivity is excellent.
またメッキ用の通電パターンの線をコネクタ接点端子の
幅よりも細い線で形成すると、V字状溝を形成する際に
メッキ用の通電パターンを切削しても、端子に大きなス
トレスが加わることがない上、通電パターンを構成する
銅箔等の導電物質の粉が端子部に殆ど付着することがな
く、端子間でショートが発生する可能性が少なくなる。Further, if the line of the energizing pattern for plating is formed thinner than the width of the connector contact terminal, even if the energizing pattern for plating is cut when forming the V-shaped groove, a large stress may be applied to the terminal. In addition, the powder of the conductive material such as the copper foil forming the energizing pattern hardly adheres to the terminals, and the possibility of short circuit between the terminals is reduced.
さらに絶縁基板に互いに対向して形成された各回路パタ
ーンの端子部の境界で溝の幅が溝の深さより広く、溝の
幅が相対向する両コネクタ接点端子の間隔よりわずかに
狭いV字状溝を形成し、絶縁基板の分割を容易にすると
ともに端子部端縁のテーパ付けを行うようにしたので、
更にテーパ付け作業におけるコネクタ接点端子の剥がれ
等を防ぎ回路基板の品質を向上させることができる。Further, at the boundary of the terminal portions of the circuit patterns formed on the insulating substrate so as to face each other, the width of the groove is wider than the depth of the groove, and the width of the groove is V-shaped slightly narrower than the distance between the opposing connector contact terminals. Since a groove is formed to facilitate the division of the insulating substrate and to taper the terminal edge,
Further, it is possible to prevent the connector contact terminal from peeling off in the tapering work and improve the quality of the circuit board.
[実施例] 以下この発明の実施例について図面に基づいて説明す
る。Embodiments Embodiments of the present invention will be described below with reference to the drawings.
第1図(A)ないし(E)は、この発明の第1実施例を
示すもので、第1図(A)はフェノール樹脂、エポキシ
樹脂、ガラス、セラミックス等をべースにした絶縁基板
1に、銅箔又は導電塗料による複数組の回路パターン2
を形成したものである。一組の回路パターン2は、一枚
の大きな絶縁基板1に、最終的に分割される一枚の回路
基板4の範囲内に形成されている。また端子部3は、互
いに対向する回路パターン2の複数のコネクタ接点端子
3aを対向して配置し、更に端子3aの幅よりも細い線から
なるメッキ用の通電パターン3bで対向する端子3aどうし
を連結して連続的に形成されている。端子3aには金メッ
キが施される。1 (A) to (E) show a first embodiment of the present invention. FIG. 1 (A) shows an insulating substrate 1 based on phenol resin, epoxy resin, glass, ceramics or the like. A plurality of sets of circuit patterns 2 made of copper foil or conductive paint
Is formed. One set of circuit patterns 2 is formed on one large insulating substrate 1 within the range of one circuit substrate 4 which is finally divided. Further, the terminal portion 3 is composed of a plurality of connector contact terminals of the circuit pattern 2 facing each other.
3a are arranged so as to face each other, and further, the terminals 3a facing each other are connected by a conductive pattern 3b for plating made of a wire thinner than the width of the terminal 3a so as to be continuously formed. The terminal 3a is plated with gold.
更に、各回路基板4どうしの境界のうち、端子部3が位
置している部分以外には、強度を下げた分割部として、
パンチングによりミシン目5を形成し、後に各回路基板
4毎に容易に分割できるようになっている。Further, among the boundaries between the circuit boards 4, except the part where the terminal part 3 is located, as a divided part with reduced strength,
The perforations 5 are formed by punching and can be easily divided later for each circuit board 4.
次に、以上のように形成されている絶縁基板1を、第1
図(B)に示すように、Vカット加工機(図示せず)に
装着し一対のカッター6の間に位置させる。このカッタ
ー6の刃先角θは120°に形成されている。絶縁基板1
は、この一対のカッター6の間で、端子部3同士が接続
している境界線上にカッター6の刃先が位置するように
装着される。Next, the insulating substrate 1 formed as described above
As shown in FIG. 1B, the V-cut processing machine (not shown) is mounted and positioned between the pair of cutters 6. The cutting edge angle θ of the cutter 6 is 120 °. Insulating substrate 1
Is attached such that the blade tip of the cutter 6 is located between the pair of cutters 6 on the boundary line connecting the terminal portions 3 to each other.
そして、第1図(C)に示すように、カッター6を回転
させると刃先が基板1の表裏面に所定の深さのV字状溝
7を形成し、そのV字状溝7の角度θは120°であり、
溝の開口部の幅が溝の最大深さより広く、しかも相対向
する両コネクタ接点端子の間隔よりわずかに狭く設定す
る。Then, as shown in FIG. 1 (C), when the cutter 6 is rotated, the cutting edge forms a V-shaped groove 7 having a predetermined depth on the front and back surfaces of the substrate 1, and the angle θ of the V-shaped groove 7 is formed. Is 120 °,
The width of the opening of the groove is set to be wider than the maximum depth of the groove and slightly narrower than the distance between the opposite connector contact terminals.
回路基板4を分割する場合には、端子部3の境界線でV
字状溝7が形成された絶縁基板1を、そのミシン目5及
びV字状溝7に沿って折り、第1図(D)に示すよう
に、個々の回路基板4を得る。回路基板4は、電子機器
のコネクタ8にその端子部3が差し込まれる。When dividing the circuit board 4, V
The insulating substrate 1 in which the V-shaped groove 7 is formed is folded along the perforations 5 and the V-shaped groove 7 to obtain individual circuit boards 4 as shown in FIG. 1 (D). The terminal portion 3 of the circuit board 4 is inserted into the connector 8 of the electronic device.
このようにして製造された回路基板4は、端子部3の端
面にV字状溝7によるテーパが形成されており、V字状
溝7の深さが幅より浅くこのテーパもゆるやかであるの
で、コネクタ8への差し込みが容易となる。しかも、溝
の幅が相対向する両コネクタ接点端子の間隔よりわずか
に狭くされ、V字状溝7形成の際には極細いパターンの
みが切断されるので、V字状溝7の形成工程における端
子3a自体への悪影響が少なく端子3aの剥がれや破損を防
ぐことができる。更に、テーパを形成する加工と分割の
ための加工とがVカット加工により同時に行うことがで
き、工数及びコストの削減にもなる。The circuit board 4 manufactured in this manner has a taper formed by the V-shaped groove 7 on the end face of the terminal portion 3, and the depth of the V-shaped groove 7 is shallower than the width, and this taper is also gentle. , The connector 8 can be easily inserted. Moreover, the width of the groove is made slightly narrower than the distance between the opposite connector contact terminals, and when forming the V-shaped groove 7, only a very thin pattern is cut, so that in the step of forming the V-shaped groove 7. There is little adverse effect on the terminal 3a itself, and peeling or damage of the terminal 3a can be prevented. Further, the processing for forming the taper and the processing for division can be performed at the same time by the V-cut processing, and the number of steps and cost can be reduced.
また、端子部3を大きな一枚の絶縁基板1の中央部にも
形成することができ、より効果的な多数個取りが可能と
なる。Further, the terminal portion 3 can be formed also in the central portion of one large insulating substrate 1, so that more effective multi-cavity production is possible.
本実施例のように、メッキのための通電パターン3bを細
い線で形成すると、端子3aの形成後のVカット加工時に
端子3aに大きなストレスが加わることがなく、また通電
パターンを削っても、銅箔等の導電物質の粉は僅かしか
発生しないため、端子3a間でショート等が生じない。特
に端子3a間の間隔が狭い回路基板において有効である。When the energization pattern 3b for plating is formed by a thin line as in the present embodiment, a large stress is not applied to the terminal 3a during the V-cut processing after the formation of the terminal 3a, and even if the energization pattern is scraped, Since only a small amount of conductive material powder such as copper foil is generated, a short circuit or the like does not occur between the terminals 3a. This is particularly effective for a circuit board in which the distance between the terminals 3a is narrow.
尚、この発明においてミシン目をあける工程はどの工程
であっても良く、Vカット加工の後にあけても良い。ま
た、回路パターン及び端子は絶縁基板の片面、両面のい
ずれに形成されていても良く、回路パターンは銅箔で形
成し端子は導電塗料により設けても良く、更に銅箔の上
に導電塗料を印刷して端子を形成しても良い。In the present invention, the perforation process may be any process, and may be performed after the V-cut processing. Further, the circuit pattern and the terminal may be formed on one side or both sides of the insulating substrate, the circuit pattern may be formed of copper foil and the terminal may be provided with a conductive paint, and the conductive paint may be further provided on the copper foil. The terminals may be formed by printing.
本実施例のによれば、、一枚の絶縁基板上に2次元的に
回路基板及び回路パターンを形成し、回路基板の端子部
同士を互いに対向させて設け、回路パターンの端子同士
が対向している部分の境界線をVカット加工し、V字状
溝を形成しているので、いわゆる多数個取りの数を多く
することができる。しかも、端子部のテーパ形成加工も
不要となり、工数及びコストの大幅な削減を図ることが
できる。According to this embodiment, the circuit board and the circuit pattern are two-dimensionally formed on one insulating substrate, the terminal portions of the circuit board are provided to face each other, and the terminals of the circuit pattern face each other. Since the boundary line of the part having the V shape is V-cut to form the V-shaped groove, it is possible to increase the number of so-called multiple cavities. Moreover, the taper forming process of the terminal portion is not necessary, and the man-hour and cost can be significantly reduced.
また、V字状溝の幅が深さより広いので、V字の開き角
が大きく、溝底部での応力集中の程度が小さく、製造途
中で絶縁基板が割れてしまうこともない。Further, since the width of the V-shaped groove is wider than the depth, the opening angle of the V-shaped groove is large, the degree of stress concentration at the groove bottom is small, and the insulating substrate is not cracked during manufacturing.
更に、溝の幅を相対向するコネクタ接点端子の間隔より
わずかに狭く設定し、コネクタ接点端子にメッキを施す
際には極細いパターンを形成することによって、V字状
溝形成によるコネクタ接点端子の剥がれや破損を防止す
ることができ、より高品質なコネクタ接点端子付基板の
製造が可能となる。Further, the width of the groove is set to be slightly narrower than the interval between the connector contact terminals facing each other, and an extremely fine pattern is formed when the connector contact terminals are plated, so that the V-shaped groove forms the connector contact terminals. It is possible to prevent peeling and breakage, and it becomes possible to manufacture a higher quality substrate with connector contact terminals.
[発明の効果] 本発明によれば、切断機を用いて回路基板を分割せず
に、絶縁基板に分割部をミシン目により形成して、最終
工程で各回路基板を分割するため、個々にV字状溝を形
成する必要がなく、量産性に優れてる。また分割部をV
字状溝よりも機械的強度の高いミシン目で形成したの
で、V字状溝により端子部にテーパを付ける場合でも、
分割前の絶縁基板の全体の機械的強度が大幅に低下する
ことはなく、絶縁基板の搬送時や絶縁基板全体に対して
電子部品を実装する作業を行っているときに、V字状溝
に割れが入って、その後の作業が続行できなくなる問題
が発生するのを防ぐことができる。[Effect of the Invention] According to the present invention, the circuit board is not divided by using a cutting machine, and the division portion is formed on the insulating substrate by perforations, and each circuit board is divided in the final step. Since it is not necessary to form a V-shaped groove, it is excellent in mass productivity. In addition, the division is V
Since it is formed with perforations that have higher mechanical strength than the V-shaped groove, even when the terminal is tapered by the V-shaped groove,
The mechanical strength of the entire insulating substrate before division is not significantly reduced, and the V-shaped groove is formed when the insulating substrate is transported or when electronic components are mounted on the entire insulating substrate. It is possible to prevent the occurrence of a problem that cracks occur and the subsequent work cannot be continued.
またメッキ用の通電パターンの線をコネクタ接点端子の
幅よりも細い線で形成すると、V字状溝を形成する際に
メッキ用の通電パターンを切削しても、端子に大きなス
トレスが加わることがないため、端子の剥離や破損が発
生するのを防止できる上、通電パターンを構成する銅箔
等の導電物質の粉が端子部に殆ど付着することがなく、
端子間でショートが発生する可能性が少なくなる利点が
ある。Further, if the line of the energizing pattern for plating is formed thinner than the width of the connector contact terminal, even if the energizing pattern for plating is cut when forming the V-shaped groove, a large stress may be applied to the terminal. Since it is possible to prevent the terminal from peeling off or being damaged, powder of a conductive material such as a copper foil forming the energizing pattern hardly adheres to the terminal portion.
There is an advantage that a short circuit between terminals is less likely to occur.
第1図(A)(B)(C)(D)(E)はこの発明の第
1実施例の工程を示す概略図である。 1…絶縁基板、2…回路パターン、3…端子部、3a…端
子、3b…メッキ用の通電パターン、4…回路基板、5…
ミシン目、6…カッター、7…V字状溝。1 (A), (B), (C), (D) and (E) are schematic views showing the steps of the first embodiment of the present invention. 1 ... Insulating substrate, 2 ... Circuit pattern, 3 ... Terminal part, 3a ... Terminal, 3b ... Plating energizing pattern, 4 ... Circuit board, 5 ...
Perforations, 6 ... Cutter, 7 ... V-shaped groove.
Claims (2)
をそれぞれ備えた1組の回路パターンを、それぞれの回
路パターンの前記コネクタ接点端子を対向させ且つ対向
する前記コネクタ接点端子どうしをメッキ用の通電パタ
ーンによりそれぞれ接続した態様で一枚の絶縁基板上に
複数組み形成し、 各組の回路パターンの境界に強度を下げた分割部をミシ
ン目により形成し、 前記コネクタ接点端子へのメッキの後に、前記各組の回
路パターンの相対向する前記コネクタ接点端子間に前記
絶縁基板の表裏両面から溝の幅が溝の深さより広く、溝
の幅が相対向する両コネクタ接点端子の間隔よりわずか
に狭いV字状溝を形成し、 その後に前記絶縁基板を前記V字状溝及び前記分割部に
沿って分割して個々のコネクタ接点端子付回路基板を得
る回路基板の製造方法。1. A set of circuit patterns each having a plurality of connector contact terminals to be plated, wherein the connector contact terminals of each circuit pattern are opposed to each other and the opposed connector contact terminals are for plating. A plurality of sets are formed on a single insulating substrate in a manner that they are connected to each other by energizing patterns, and a divided portion with reduced strength is formed by perforations at the boundary of the circuit pattern of each set, and after the connector contact terminals are plated, , The width of the groove is wider than the depth of the groove from the front and back surfaces of the insulating substrate between the opposing connector contact terminals of the circuit patterns of each set, and the width of the groove is slightly smaller than the distance between the opposing connector contact terminals. A circuit in which a narrow V-shaped groove is formed, and then the insulating substrate is divided along the V-shaped groove and the dividing portion to obtain individual circuit boards with connector contact terminals. Method of manufacturing the plate.
タ接点端子の幅よりも細い線で形成することを特徴とす
る請求項1に記載の回路基板の製造方法。2. The method for manufacturing a circuit board according to claim 1, wherein the energizing pattern for plating is formed by a line thinner than the width of the connector contact terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63108206A JPH0682910B2 (en) | 1988-04-28 | 1988-04-28 | Circuit board manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63108206A JPH0682910B2 (en) | 1988-04-28 | 1988-04-28 | Circuit board manufacturing method |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6076662A Division JP2612842B2 (en) | 1994-03-22 | 1994-03-22 | Circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01278086A JPH01278086A (en) | 1989-11-08 |
JPH0682910B2 true JPH0682910B2 (en) | 1994-10-19 |
Family
ID=14478709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63108206A Expired - Fee Related JPH0682910B2 (en) | 1988-04-28 | 1988-04-28 | Circuit board manufacturing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0682910B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19927046B4 (en) | 1999-06-14 | 2007-01-25 | Electrovac Ag | Ceramic-metal substrate as a multi-substrate |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5254874U (en) * | 1975-10-20 | 1977-04-20 | ||
JPS55127096A (en) * | 1979-03-23 | 1980-10-01 | Nippon Electric Co | Method of fabricating printed circuit board |
JPS60118262U (en) * | 1984-01-18 | 1985-08-09 | 日本電気株式会社 | Printed board |
-
1988
- 1988-04-28 JP JP63108206A patent/JPH0682910B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH01278086A (en) | 1989-11-08 |
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