JPH0675007A - Circuit wiring board for lsi test, test equipment employing the circuit wiring board, and method for mounting tested lsi on multilayer circuit wiring board - Google Patents

Abstract

(57) [Abstract] [Purpose] Simplification of the process and electrical connection in the process from the process of removing the LSI chip from the circuit wiring board for electrical characteristics inspection of the LSI chip to the flip-chip mounting on the multilayer circuit wiring board. Another object of the present invention is to obtain an inspection circuit wiring board capable of improving reliability, and a method of mounting the inspection circuit wiring board on the multilayer circuit wiring board, and an electronic circuit device. [Structure] In a microchip carrier 1 and an electrode terminal 4 of a circuit wiring board for inspection 3, an electrode diameter on a substrate side 3 is made extremely smaller than an electrode diameter on a chip carrier side 1, and
The structure is such that a plurality of connection electrodes are provided. Further, by doing so, it is possible to eliminate the excessive solder removal and solder re-supply processes on the chip carrier side in the processes from the removal of the chip carrier 1 from the substrate 3 to the mounting on the multilayer circuit wiring substrate 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LSI inspection circuit wiring board, a method of inspecting an LSI chip using this board and an inspection apparatus therefor, and a method of mounting an inspected LSI on a multilayer circuit wiring board. The present invention relates to an electronic circuit device including a mounted multilayer circuit wiring board.

[0002]

2. Description of the Related Art With the increase in the speed and integration of LSIs,
In an electronic circuit device equipped with a large number of chips, high-density mounting technology on a multilayer circuit wiring board is very important. As a high-density mounting technique for this purpose, for example, there is a flip-chip mounting method in which fine and multi-point electrode terminals can be taken out from the LSI chip surface. As is well known, in this mounting method, bumps made of metal such as solder are formed on the electrode terminals on the LSI chip surface, and face down bonding is performed to the electrodes on the multilayer circuit wiring board via the bumps.

By the way, as a method of inspecting the electrical characteristics of an LSI chip using such a flip-chip mounting method, conventionally, when the electrode pitch and the electrode diameter are large, a microprobe of a measuring instrument is attached to the electrode of the LSI chip. The probe method of applying and measuring was used. But,
In recent years, due to high integration of LSI, reduction of electrode pitch,
As the electrode diameter has become finer, it has become impossible to directly use the conventional probe method.

Therefore, conventionally, an LSI chip or a microchip carrier is flip-chip mounted on a circuit wiring board for inspection and each terminal connected to a signal / power wiring from the LSI on the back side of the circuit wiring board for inspection. The electrode diameter and the electrode pitch were expanded to evaluate the electrical characteristics of the LSI. That is, this inspection circuit wiring board is a so-called electrode terminal expansion board in which the electrode diameter and the electrode pitch are substantially expanded through the wiring board in order to facilitate electrode connection during the inspection.

After checking the electrical characteristics of the LSI in this way, the procedure for removing the LSI from the inspection circuit wiring board and mounting and mounting it on the multilayer circuit wiring board will be described with reference to FIG.

FIG. 1A shows a state in which the microchip carrier 1 is mounted on the inspection circuit wiring board 3 by solder connection via solder bumps. In the figure, 4 indicates metallization of electrode terminals, and 6 indicates wiring within the substrate.

<Procedure 1> From the connection state shown in FIG. 1A, the connecting solder bumps 2 between the substrates 1 and 3 are thermally melted in a heating furnace or by local heating to separate the substrates. FIG. 6B shows a state of the solder 7 remaining on the electrodes 4 of the substrates 1 and 3 after the separation, and if the electrode diameters of the substrates 1 and 3 are equal to each other as shown in the figure, they are mutually different. Almost the same amount of solder remains on the electrode side of.

<Procedure 2> In order to remove the excess solder on the electrode side of the microchip carrier 1, a metal plate 8 with good solder wettability as shown in FIG. Remove the solder by pressing. FIG. 6D shows a state after the excess solder is removed, and the amount of solder on the electrode 4 can be kept constant.

<Procedure 3> In order to mount the microchip carrier 1 on the multilayer circuit wiring board, the solder balls 7'are placed on the electrodes 4 of the microchip carrier 1. FIG. 7E shows the state.

<Procedure 4> The solder balls 7 ′ placed on the electrodes 4 of the microchip carrier 1 are melted in a heating furnace, and the solder bumps 2 for connection as shown in FIG.
To form.

<Procedure 5> As shown in FIG. 5G, the bump forming electrodes of the microchip carrier 1 and the electrodes 4 on the multilayer circuit wiring board 9 on which the bump forming electrodes are mounted are aligned.

<Procedure 6> Finally, the both substrates 1 and 9 after alignment are melted by soldering in a heating furnace and joined as shown in FIG.

As a method for removing the excess solder, there are other methods, for example, Microelectronics Packaging Handbook (see pages 302 to 304, Nikkei BP).
As described in "Published by the company, March 27, 1991), a method of spraying a heating gas from one nozzle of a high temperature gas tool onto a solder to melt the same and sucking and removing it from another nozzle has been reported.

On the other hand, as a recent technical example of the inspection circuit wiring board, there is also known a connection structure in which the electrode diameter on the inspection circuit wiring board side corresponding to the LSI chip side electrode diameter is smaller. This will be described with reference to the cross-sectional view of FIG. 10. FIG. 10A shows a cross-sectional view in which the microchip carrier 1 is mounted on the inspection circuit wiring board 3, but the electrode terminal 4 on the microchip carrier 1 side is shown. compared,
The diameter of the electrode terminal 4 on the inspection circuit wiring board 3 side is small, and
One electrode is provided for one electrode of the SI chip. In addition, as a thing related to this technology, IBM
J. RES. DEVELOP (VOL.35 No.3
May 1991 p. 328).

[0015]

According to FIG. 9 in the preceding paragraph, the inspected LSI chip 1 is mounted and mounted on the multilayer circuit wiring board 9 from the electrical characteristic inspection process of the LSI chip using the inspection circuit wiring board 3. Although each process up to the above has been described, the conventional technique has the following problems.

(1) In order to realize each step shown in <Procedures 1 to 6>, technological development of each step process, period, cost Equipment cost of each step From LSI inspection, this is applied on the multilayer circuit wiring board. It will take some time before it is installed in.

(2) In order to shorten the steps of <Procedure 1 to 6>, when the inspection circuit wiring board as described in FIG. 10A is used, the electrode diameter on the inspection circuit wiring board is Is smaller than that of the LSI chip, and there is only one for each electrode of the LSI chip, so that the current density becomes large for the power supply terminal or the like through which a large current flows to the LSI chip side, resulting in electromigration. It is feared that wire breakage due to heat generation and melt wire breakage due to self-heating will occur. When a microchip carrier consisting of a thick film substrate is mounted on an inspection circuit wiring board, if the chip size becomes large, the inspection circuit may be affected by the shrinkage rate of the thick film substrate during firing, warpage, and electrode printing accuracy. It becomes very difficult to align and bond the pitch between the fine electrodes and the diameter of the fine electrodes on the wiring board. The state of this positional deviation is shown in FIG. That is, in the microchip carrier 1 made of a thick film substrate, the positional deviation of the electrode terminal with respect to the design dimension occurs due to the substrate shrinkage rate during substrate baking, the occurrence of warpage, and the printing accuracy of the electrode terminal. Therefore, as shown in the figure, when the positional deviation amount ΔL becomes large, there is a possibility that the solder connection between the inspection circuit wiring board 3 side electrode terminal 4 and the microchip carrier 1 side electrode terminal 4 cannot be performed.

Therefore, an object of the present invention is to eliminate the above-mentioned problems of the prior art, aiming at shortening the steps from the electrical characteristic inspection step of the LSI chip to the mounting on the multilayer circuit wiring board, and the above method. It is to provide an electronic circuit device used.

[0019]

In order to achieve the above object, in the present invention, the electrode terminal diameter on the inspection circuit wiring board side is extremely smaller than the electrode terminal diameter on the LSI chip or microchip carrier side. At the same time, the connection electrode was branched into a plurality of pieces and arranged on the substrate. That is, the above-mentioned objects are: (1) In an electrical characteristic inspection circuit wiring board of an LSI mounted on an LSI chip or an LSI mounting microchip carrier, the electrode terminals led out from the inside of the inspection circuit wiring board to the substrate surface are A circuit for LSI inspection in which the electrode diameter of the electrode terminal of the LSI chip or the microchip carrier is reduced, the number of connecting electrodes is branched into a plurality, and each branch electrode is arranged on the substrate at a predetermined interval. Achieved by the wiring board.

It is preferable that the plurality of branch electrodes provided on the substrate have a projection-like structure with a sharp tip, and the electrode assembly divided into a plurality is occupied. The area is set within the projected connection surface area of the electrode terminal of the corresponding LSI chip or microchip carrier, and the branched electrode assembly is configured not to deviate from the projected connection surface area. The height of the projecting branch electrode from the substrate is preferably within 10 and several μm.

(2) As an LSI inspection method,
LSI chip or LS on the above inspection circuit wiring board
The I-mounting microchip carrier is mounted, and a plurality of branch electrodes arranged on the inspection circuit wiring board corresponding to each of the electrode terminals are connected, and before the inspection circuit wiring board is branched. An LSI tester may be used to inspect the electrical characteristics of the LSI chip via the electrode terminals. Further, when connecting the electrode terminal of the LSI chip or the LSI mounting microchip carrier to the branch electrode of the inspection circuit wiring board, the solder previously provided on the surface of the electrode terminal is melted to be connected and fixed. Alternatively, when the tip of the branch electrode is sharpened to form a protrusion, the tip of the branch electrode is brought into contact with or stuck to the electrode terminal without melting the solder provided on the surface of the electrode terminal for connection. You can also choose to do so.

(3) An apparatus for implementing the LSI inspection method described in (2) above includes the inspection circuit wiring board described in (1) above and a plurality of branch electrodes on the inspection circuit wiring board. An LSI inspection device comprising means for connecting an electrode terminal of an LSI chip or an LSI mounting microchip carrier via the means and means for connecting a probe of an LSI tester to an electrode terminal of the inspection circuit wiring board before branching. Can be composed of The probe is arranged on one surface of the probe fixing jig in accordance with the pitch of the electrode terminals, and the probe terminals arranged on the other surface of the jig are connected via wiring electrically connected thereto. Connected to the input / output terminals of the LSI tester.

Further, the above object is a method of mounting an LSI chip or a microchip carrier on a multilayer circuit wiring board, wherein the LSI chip or the microchip carrier is mounted on the LSI inspection circuit wiring board described in (1) above. Then, the step of soldering the two electrode terminals together, the step of inspecting the electrical characteristics of the LSI mounted on the inspection circuit wiring board, and the LSI chip or microchip carrier and the inspection circuit after the inspection of the electrical characteristics. A step of separating the solder connection with the wiring board by heat melting of the solder or mechanical destruction, and separating from the inspection circuit wiring board in a state where most of the solder is attached to the electrodes on the LSI chip or microchip carrier side, The solder remaining on the electrodes on the LSI chip or microchip carrier side is heated and remelted. A step of forming a solder bump, a step of aligning the electrode terminal on the side of the LSI chip or the microchip carrier, and an electrode terminal on the side of a multilayer circuit wiring board prepared in advance, in the aligned state And a method of mounting the LSI chip or the microchip carrier on the multilayer circuit wiring board by mounting and connecting the LSI chip or the microchip carrier using the solder bump formed by the remelting. .

There are various connection methods in the step of mounting and connecting the above-mentioned LSI chip or microchip carrier on a multilayer circuit wiring board, for example, the step of connecting by soldering by heating solder bumps or face-down bonding. Etc. are used.

Furthermore, the above-mentioned object is to use an electronic circuit device in which an LSI chip or a microchip carrier is also mounted on the above-mentioned multilayer circuit wiring board after inspecting the electrical characteristics of the LSI by the above-mentioned inspection circuit wiring board. Is achieved.

[0026]

[Function] The electrode terminal diameter on the inspection circuit wiring board side is set to the LSI
By making the electrode terminal of the chip or the microchip carrier extremely small, and by branching the number of connecting electrodes, it is possible to (1) measure the electrical characteristics of the LSI chip, and then from the inspection circuit wiring board to the LSI chip. Since the diameters of the electrodes on both boards are different when detached, the excess solder on the electrode side of the inspection circuit wiring board is extremely reduced. That is, the amount of solder supplied to the electrode terminals on the LSI chip side remains almost at the initial stage, and the steps of removing excess solder and supplying solder balls as shown in the above-mentioned conventional procedures 2 and 3 can be eliminated. In particular, when the tip of the branch electrode terminal is sharpened in a protruding shape, the connection can be made by simply sticking it into the solder bump without soldering. Therefore, the solder provided in advance on the LSI chip side electrode terminal can be used as it is as the connecting solder at the time of mounting and mounting on the multilayer circuit wiring board after the inspection.

(2) By providing a plurality of electrode terminals, the current density per terminal can be reduced. When a thick film substrate such as a microchip carrier is mounted, the electrode terminal alignment margin with the inspection circuit wiring substrate is widened.

(3) When the tip of the branch electrode terminal on the inspection circuit wiring board is sharpened to form a protruding electrode, the tip of the branch electrode terminal is used as a solder bump on the LSI chip or microchip carrier side electrode terminal. By piercing,
It is possible to eliminate the steps of separating the substrate, removing excess solder, and supplying solder balls as shown in the conventional procedures 1, 2, and 3.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. <Embodiment 1> FIG. 1 is a cross-sectional view in which a microchip carrier (with an LSI chip mounted) is mounted on an inspection circuit wiring board according to an embodiment of the present invention, and FIG. 2 is the solder in FIG. The top view of the circuit wiring board for an inspection provided with the electrode terminal 4 for connection is each shown. In both figures, 1 is a microchip carrier, 2 is a solder bump connecting electrode terminals of both substrates, 3 is a circuit wiring board for inspection,
Reference numeral 4 is an electrode terminal of the microchip carrier 1 and the inspection circuit wiring board 3, 5 is a through hole, and 6 is an in-board wiring. In this example, five connection electrodes are assembled for one electrode of the LSI chip to form one electrode 4 of the inspection circuit wiring board. That is, the electrode terminals 4 of the inspection circuit wiring board 3 are formed from one in-board wiring 6 to the five 4a to 4a.
The shape is such that it is branched to the electrode e and is extremely smaller than the diameter of the electrode terminal on the microchip carrier 1 side mounted on the inspection circuit wiring board 3. In this way, by increasing the number of electrode terminals 4 on the inspection circuit wiring board 3 side, the current density per terminal is dispersed, so that a large current such as a power supply terminal to an LSI chip, which has been a problem in the past, is generated. The problem of disconnection due to electromigration when flowing was solved. Further, in the present embodiment, since the electrode terminals on the inspection circuit wiring board 3 side are branched and provided, it is possible to widen the bonding margin with respect to the positional deviation between the electrodes, as described with reference to FIG. The problem due to the conventional misalignment was also solved.

<Embodiment 2> FIGS. 3 to 5 all show the electrode 4
FIG. 3 is a plan view of the inspection circuit wiring board 3 on which the signal wiring in the inspection circuit wiring board 3 is branched to a plurality of electrode terminals from the surface of the inspection circuit wiring board 3. 6A and 6B show different configuration examples arranged in each. That is, FIG. 3 is similar to the structure shown in FIG. 2 of the first embodiment, but the central 4e electrode is omitted, and one in-board wiring 6 is arranged in a substantially quadrangular square on the substrate. 4a-4b
The electrode 4 is branched into four. FIG. 4 shows a central part of a triangle and 4a to 4d arranged at respective corners.
The electrode 4 is branched into a book. In FIG. 5, the electrode 4d in the central portion of FIG. 4 is omitted and the electrode 4 is branched into three electrodes 4a to 4c. In any of these structures, the same effect as that of the inspection circuit wiring board 3 of Example 1 was obtained.

The electrode 4 of the inspection circuit wiring board 3 according to the present invention is characterized in that it is divided into a plurality of wirings from one in-board wiring 6 as described above. The occupied area of the electrode 4, which is an assembly of electrodes, is preferably within the electrode area of the connection partner side (LSI chip side) so that it does not protrude. Further, when the electrodes are branched, they may be branched into two straight lines, but it is desirable to arrange them in a polygonal shape such as a triangle or a quadrangle, and to branch into the inside thereof as necessary.

Further, the shape of the electrode 4 may be a projecting structure having a sharp tip as shown in FIG. As a result, by directly abutting the electrode terminals 4 on the solder bumps 2 on the LSI chip or the microchip carrier side for connection, the heating and melting step with the substrate can be eliminated,
Significant process reduction can be achieved.

<Embodiment 3> FIG. 7 is a schematic cross-sectional view when the inspection circuit wiring board 3 shown in Embodiments 1 and 2 is applied to an LSI inspection apparatus. As shown in the drawing, the microchip carrier 1, LS is mounted on the inspection circuit wiring board 3.
The I-chip 11 is mounted, the back surface side electrode terminal 4 of the inspection circuit wiring board 3 and the LSI tester 10 for measuring the electrical characteristics of the LSI chip 11, the probe 12 supported by the probe fixing jig 13, the wiring The device is configured by connecting at 14. The LSI tester 10 itself has a well-known configuration. As described above, the probe 12 is attached to the rear surface side electrode terminal 4 of the inspection circuit wiring board 3 on which the LSI chip 11 is mounted.
Connect with, LSI tester 10, LSI chip 1
1 can be inspected for electrical characteristics.

<Embodiment 4> FIGS. 8A to 8C show steps from the removal of the microchip carrier 1 from the substrate 3 to the mounting on the multilayer circuit wiring substrate 9 when the inspection circuit wiring substrate 3 according to the present invention is used. It is an important section sectional view showing a flow. Hereinafter, a series of steps for removing the microchip carrier 1 having been subjected to the electrical characteristic inspection from the inspection circuit wiring board 3 and mounting and mounting it on the multilayer circuit wiring board 9 will be described with reference to the drawings.

<Procedure 1> From the connection state of FIG. 1A (same as FIG. 1 of Embodiment 1), the solder bumps 2 for connection between the two substrates 1 and 3 are heat-melted in a heating furnace or by local heating. Then, the two substrates 1 and 3 are separated.

FIG. 6B shows the state of the solder 2 (7) remaining on the electrodes 4 of both boards after the separation, and by reducing the electrode terminal diameter on the inspection circuit wiring board 3 side, Most of the bonding solder 2 remains on the electrode terminal 4 on the microchip carrier 1 side.

<Procedure 2> The solder 2 remaining on the electrode terminals 4 on the microchip carrier side is melted in a heating furnace to form solder bumps 2 for connection as shown in FIG.

<Procedure 3> As shown in FIG. 3D, the bump forming electrodes of the microchip carrier 1 are aligned with the electrodes on the multilayer circuit wiring board 9 on which the bump forming electrodes are mounted.

<Procedure 4> Both substrates 1 and 9 after alignment
Are melted in a heating furnace and joined as shown in FIG. As a result, it was possible to electrically connect the two substrates and realize highly reliable mounting.

Further, as shown in FIG. 6, the electrode terminals 4 on the inspection circuit wiring board 3 are formed in a protruding shape,
By directly contacting the electrode terminals 4 to the solder bumps 2 on the LSI chip 11 or the microchip carrier 1 side for connection, the heating and melting step with the substrate can be eliminated,
Significant process reduction can be achieved. Also, as shown in FIG.
The probe 12 connects to the back-side electrode terminal 4 of the inspection circuit wiring board 3 on which the LSI chip 11 is mounted,
The LSI tester 10 can inspect the electrical characteristics of the LSI chip 11.

The mounting process and the effects of the mounted multilayer circuit wiring board 9 will be described below.
That is, when the microchip carrier 1 whose electrical characteristics have been inspected is removed from the inspection circuit wiring board 3 and mounted on the multilayer circuit wiring board 9, after the removal, the microchip carrier 1 is attached to the electrodes 4 of the microchip carrier 1. Only the residual solder remaining is formed by heat treatment, and the step of removing the excess solder and the step of resupplying the solder are unnecessary.

Also, by making the electrode terminal diameter of the inspection circuit wiring board 3 small and providing a plurality of connecting electrodes, it is possible to disperse the current density flowing per terminal and expand the board electrode bonding alignment margin. It is possible to drastically shorten the process from the electrical characteristic inspection process of the LSI to the mounting process on the multilayer circuit wiring board.

[0043]

According to the present invention, the intended purpose can be achieved. That is, when mounting the LSI chip on the inspection circuit wiring board, highly reliable electrical connection is possible, and when mounting the tested LSI chip or microchip carrier on the multilayer circuit wiring board,
In the series of processes from the electrical characteristics inspection process of the LSI chip to the mounting of the multilayer circuit wiring board, the process can be significantly shortened and the cost of the product can be greatly reduced.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of essential parts showing a joined state of a microchip carrier and a circuit wiring board for inspection according to an embodiment of the present invention.

FIG. 2 is a plan view of an electrode of the inspection circuit wiring board.

FIG. 3 is an electrode plan view of a circuit wiring board for inspection showing another embodiment of the present invention.

FIG. 4 is a plan view of the electrodes of the inspection circuit wiring board.

FIG. 5 is a plan view of an electrode of the inspection circuit wiring board.

FIG. 6 is a sectional view of an inspection circuit wiring board showing another embodiment of the present invention.

FIG. 7 is a schematic cross-sectional view of an LSI inspection device that also uses an inspection circuit wiring board.

FIG. 8 is a sectional view of relevant parts showing a process flow from removal from the inspection circuit wiring board to mounting of the multilayer circuit wiring board.

FIG. 9 is a cross-sectional view of essential parts showing a process flow from removal from a conventional inspection circuit wiring board to mounting of a multilayer circuit wiring board.

FIG. 10 is a cross-sectional view of a main part showing a joined state of a conventional microchip carrier and a test circuit wiring board.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Microchip carrier, 2 ... Solder bump, 3 ... Inspection circuit wiring board, 4 ... Electrode terminal metallization, 4a-4e ... Branch electrode,
5 ... Through hole, 6 ... In-board wiring,
7 ... Solder, 8 ... Metal plate,
9 ... Multilayer circuit wiring board, 10 ... LSI tester, 11 ... LSI chip, 12 ... Probe, 13 ... Probe fixing jig,
14 ... Wiring.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Reference number within the agency FI Technical indication location H01L 23/522 (72) Inventor Tetsuya Hayashida 2326 Imai, Ome-shi, Tokyo Hitachi Ltd. Device In the Development Center (72) Inventor Shinichi Wai 1 Horiyamashita, Hadano City, Kanagawa Prefecture Hitachi, Ltd. Kanagawa Plant

Claims (11)

[Claims] 1. In a circuit wiring board for inspecting electrical characteristics of an LSI mounted on an LSI chip or an LSI mounting microchip carrier, electrode terminals led out from the inside of the inspection circuit wiring board to the substrate surface are the LSI chip or micro. A circuit wiring board for LSI inspection, in which the electrode diameter of the electrode terminal of the chip carrier is reduced, the number of connection electrodes is branched into a plurality, and each branch electrode is arranged on the substrate at a predetermined interval. 2. The circuit wiring board for LSI inspection according to claim 1, wherein the plurality of branch electrodes arranged on the substrate have a projecting structure with a sharp tip. 3. The occupied area of the electrode assembly branched into a plurality is within the projected connection surface area of the electrode terminal of the corresponding LSI chip or microchip carrier, and the branched electrode assembly is the projected connection surface. The circuit wiring board for LSI inspection according to claim 1, wherein the circuit wiring board is configured so as not to deviate from the region. 4. An LSI chip or an LSI mounting microchip carrier is mounted on the inspection circuit wiring board according to claim 1, and is disposed on the inspection circuit wiring board corresponding to each of its electrode terminals. And a plurality of divided branch electrodes connected to each other, and an electrical characteristic of the LSI chip is inspected by an LSI tester via electrode terminals before branching of the inspection circuit wiring board. 5. An LS is provided on a branch electrode of the inspection circuit wiring board.
5. The LSI inspection method according to claim 4, wherein when connecting the electrode terminals of the I-chip or the LSI-mounting microchip carrier, the solder previously provided on the surface of the electrode terminals is melted to be connected and fixed. 6. L on the inspection circuit wiring board according to claim 2.
A microchip carrier for mounting an SI chip or an LSI is mounted, and when connecting a plurality of branch electrodes arranged on the inspection circuit wiring board corresponding to each of the electrode terminals, it is provided in advance on the surface of the electrode terminal. 5. The LSI inspection method according to claim 4, wherein the pointed projections of the branch electrodes are connected to or contact the electrode terminals without melting the solder to connect the electrode terminals. 7. An inspection circuit wiring board according to claim 1, and an electrode terminal of an LSI chip or an LSI mounting microchip carrier are connected via a plurality of branch electrodes on the inspection circuit wiring board. An LSI inspection apparatus comprising: means and means for connecting a probe of an LSI tester to an electrode terminal before branching of the inspection circuit wiring board. 8. The probe is arranged on one surface of a probe fixing jig in accordance with the pitch of the electrode terminals, and the probe terminals arranged on the other surface of the jig are electrically connected thereto. 8. The LSI inspection apparatus according to claim 7, which is connected to an input / output terminal of an LSI tester via a wiring. 9. A method for mounting an LSI chip or a microchip carrier on a multilayer circuit wiring board, wherein the LSI chip or the microchip carrier is mounted on the LSI inspection circuit wiring board according to any one of claims 1 to 3. , The step of soldering the two electrode terminals together, the step of inspecting the electrical characteristics of the LSI mounted on the inspection circuit wiring board, and the LSI chip or microchip carrier and the inspection circuit wiring after the inspection of the electrical characteristics. A step of separating the solder connection with the substrate by heat melting of the solder or mechanical destruction, and separating a majority of the solder from the circuit wiring board for inspection in a state of being attached to the electrodes on the LSI chip or the microchip carrier side; By heating and remelting the solder remaining on the electrodes on the LSI chip or microchip carrier side A step of forming a solder bump, a step of aligning the electrode terminal on the side of the LSI chip or the microchip carrier, and an electrode terminal on the side of a multilayer circuit wiring board prepared in advance, And a method of mounting and connecting the LSI chip or the microchip carrier on a multilayer circuit wiring board by using a solder bump formed by melting. 10. A step of mounting and connecting an LSI chip or a microchip carrier on a multilayer circuit wiring board by using the solder bumps formed by the above-mentioned re-melting in the above-mentioned aligned state, heating and melting the solder bumps, or The mounting method on a multilayer circuit wiring board according to claim 9, which is a step of connecting by face-down bonding. 11. An LSI on a multilayer circuit wiring board according to the method of mounting on a multilayer circuit wiring board according to claim 9 or 10.
An electronic circuit device equipped with a chip or microchip carrier.