[go: up one dir, main page]

JPH0661413A - Substrate for hybrid ic and manufacture of hybrid ic using it - Google Patents

Substrate for hybrid ic and manufacture of hybrid ic using it

Info

Publication number
JPH0661413A
JPH0661413A JP23638592A JP23638592A JPH0661413A JP H0661413 A JPH0661413 A JP H0661413A JP 23638592 A JP23638592 A JP 23638592A JP 23638592 A JP23638592 A JP 23638592A JP H0661413 A JPH0661413 A JP H0661413A
Authority
JP
Japan
Prior art keywords
hybrid
substrate
circuit board
flexible printed
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23638592A
Other languages
Japanese (ja)
Other versions
JP3263863B2 (en
Inventor
Mutsusada Itou
睦禎 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP23638592A priority Critical patent/JP3263863B2/en
Publication of JPH0661413A publication Critical patent/JPH0661413A/en
Application granted granted Critical
Publication of JP3263863B2 publication Critical patent/JP3263863B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To provide a substrate for hybrid ICs which can cope with a reduction in pitch and increase in the number of pins without manual aid and without consuming a large amount of man-hours and a hybrid IC manufacturing method using the substrate. CONSTITUTION:The substrate is composed of circuit boards 2 on which semiconductor elements and individual components 6 and 7 are mounted along conductor patterns and flexible printed boards 3 provided in the peripheries of the substrates 2 in a state where the boards 3 are electrically connected to conductor patterns on the bards 2. The outer leads of this substrate are formed by punching the wiring boards 3 provided in the peripheries of the substrate 2 with a punch and die and, at the same time, bending the remaining parts in prescribed shapes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、基本的に異なった種類
の部品が搭載されて一つの電子回路機能を構成するハイ
ブリッドIC用基板とこれを用いたハイブリッドICの
製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid IC substrate in which basically different kinds of components are mounted to form one electronic circuit function, and a hybrid IC manufacturing method using the same.

【0002】[0002]

【従来の技術】従来のハイブリッドIC用基板は、所定
の導体パターンが形成された回路基板上に半導体素子や
個別部品が搭載され、さらにこれら機能の異なる部品同
士は上述の導体パターンを介して電気的に接続されてい
た。このような回路基板は一枚の主基板上に複数設けら
れており、部品搭載が完了した後に一枚ずつ分割される
ようになっていた。また、各々の回路基板の周縁には所
定のピッチで複数のランド部が形成されており、基板分
割後はこれらのランド部に例えばF型リードがそれぞれ
嵌め込まれてハンダ付けされ、これにより回路基板の両
側に外部リードが設けられるようになっていた。
2. Description of the Related Art In a conventional hybrid IC substrate, semiconductor elements and individual parts are mounted on a circuit board on which a predetermined conductor pattern is formed, and parts having different functions are electrically connected via the above-mentioned conductor pattern. Were connected to each other. A plurality of such circuit boards are provided on one main board, and they are divided one by one after component mounting is completed. Further, a plurality of lands are formed on the peripheral edge of each circuit board at a predetermined pitch, and after the board is divided, for example, F-type leads are fitted and soldered to the lands, respectively. There were external leads on both sides.

【0003】[0003]

【発明が解決しようとする課題】しかしながら上記従来
のハイブリッドIC用基板では、回路基板のランド部と
外部リードとがハンダ付けによって接続される構造であ
るため、作業に人手がかかるうえに、ランド数が増える
とそれだけハンダ付けにも多大な工数を必要とするとい
った問題があった。
However, in the above-mentioned conventional hybrid IC substrate, since the land portion of the circuit board and the external lead are connected by soldering, the work is labor-intensive and the number of lands is large. However, there is a problem that as the number increases, a lot of man-hours are required for soldering.

【0004】また従来は、ハンダ付けによるブリッジの
発生や回路基板と外部リードとの位置出しの難しさか
ら、端子(ランド部、外部リード)間隔をあまり小さく
設定できないといった別の問題も抱えていた。さらに、
外部リードとなるF型リードは回路基板を両側から挟み
込むようになっているため、回路基板の四方向全てに外
部リードを設けることができなかった。このような理由
から、従来のハイブリッドIC用基板では、回路のデジ
タル化に伴うファインピッチ・多ピン化への対応が非常
に困難とされていた。
Further, conventionally, there is another problem that the terminal (land portion, external lead) interval cannot be set too small due to the occurrence of a bridge due to soldering and the difficulty in positioning the circuit board and the external lead. . further,
Since the F-type lead serving as an external lead sandwiches the circuit board from both sides, the external lead cannot be provided in all four directions of the circuit board. For these reasons, it has been very difficult for the conventional hybrid IC substrate to cope with the fine pitch and the increased number of pins that accompany the digitalization of the circuit.

【0005】本発明は、上記問題を解決するためになさ
れたもので、人手と多大な工数をかけることなくファイ
ンピッチ・多ピン化への対応が可能なハイブリッドIC
用基板とこれを用いたハイブリッドICの製造方法を提
供することを目的とする。
The present invention has been made in order to solve the above problems, and is a hybrid IC capable of dealing with a fine pitch and a large number of pins without manpower and enormous man-hours.
It is an object of the present invention to provide a substrate for manufacturing and a method for manufacturing a hybrid IC using the substrate.

【0006】[0006]

【課題を解決するための手段】本発明は、上記目的を達
成するためになされたもので、半導体素子と個別部品と
が導体パターン上に搭載される回路基板と、この回路基
板の導体パターンに電気的に接続された状態で該回路基
板の周辺に設けられたフレキシブルプリント配線板とに
よって構成されたハイブリッドIC用基板である。ま
た、上述の回路基板とフレキシブルプリント配線板とが
主基板上に複数並設されたものである。さらに、上記ハ
イブリッドIC用基板を用いたハイブリッドICの製造
方法であって、回路基板の周辺に設けられたフレキシブ
ルプリント配線板を上下金型により切断するとともに所
定の形状に折り曲げて外部リードとするものである。
SUMMARY OF THE INVENTION The present invention has been made to achieve the above object, and a circuit board on which a semiconductor element and individual parts are mounted on a conductor pattern, and a conductor pattern of the circuit board are provided. It is a hybrid IC substrate configured by a flexible printed wiring board provided around the circuit board in an electrically connected state. A plurality of the above-mentioned circuit boards and flexible printed wiring boards are arranged side by side on the main board. Furthermore, a method of manufacturing a hybrid IC using the above hybrid IC substrate, in which a flexible printed wiring board provided around a circuit board is cut by upper and lower molds and bent into a predetermined shape to form an external lead. Is.

【0007】[0007]

【作用】本発明のハイブリッドIC用基板においては、
外部リードとして形成される部分がフレキシブルプリン
ト配線板によって構成され、しかもこのフレキシブルプ
リント配線板が回路基板の導体パターンに電気的に接続
されているため、フレキシブルプリント配線板のパター
ンニングの容易性から従来よりも端子間隔を小さく設定
できるようになる。また、本発明のハイブリッドIC用
基板では、回路基板の周辺にそれぞれフレキシブルプリ
ント配線板を配置することにより、回路基板の四方向全
てに外部リードを設けることが可能となる。さらに、本
発明のハイブリッドICの製造方法においては、フレキ
シブルプリント配線板を上下金型により切断するととも
に所定の形状に折り曲げ、熱圧着することにより、それ
以後のリフローハンダ付け作業などを要することなく回
路基板の周囲に外部リードを設けることが可能となる。
In the hybrid IC substrate of the present invention,
The part formed as an external lead is composed of a flexible printed wiring board, and since this flexible printed wiring board is electrically connected to the conductor pattern of the circuit board, it is easy to pattern the flexible printed wiring board. The terminal spacing can be set smaller than that. Further, in the hybrid IC substrate of the present invention, by arranging the flexible printed wiring boards around the circuit board, it is possible to provide external leads in all four directions of the circuit board. Further, in the hybrid IC manufacturing method of the present invention, the flexible printed wiring board is cut by the upper and lower molds, bent into a predetermined shape, and thermocompression-bonded, thereby eliminating the need for subsequent reflow soldering work. External leads can be provided around the substrate.

【0008】[0008]

【実施例】以下、本発明の実施例を図面に基づいて詳細
に説明する。図1は、本発明に係わるハイブリッドIC
用基板の一実施例を示す平面図であり、図2は、図1の
要部断面図である。図示のように本実施例のハイブリッ
ドIC用基板1は、大きくは回路基板2とフレキシブル
プリント配線板3とによって構成されており、これらの
回路基板2とフレキシブルプリント配線板3とは主基板
4上に複数(図例では4個)並設されている。
Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 shows a hybrid IC according to the present invention.
FIG. 2 is a plan view showing an example of a substrate for use in the present invention, and FIG. 2 is a cross-sectional view of the main part of FIG. As shown in the figure, the hybrid IC substrate 1 of this embodiment is roughly composed of a circuit board 2 and a flexible printed wiring board 3, and these circuit board 2 and flexible printed wiring board 3 are on a main board 4. A plurality of (4 in the illustrated example) are arranged in parallel.

【0009】回路基板2の上下面にはそれぞれ導体パタ
ーン(不図示)が形成されており、この導体パターン上
に半導体素子5(図3、図4参照)や個別部品6、7が
搭載されるようになっている。また、これらの半導体素
子5や個別部品6、7は上述の導体パターンを介して電
気的に接続され、これにより回路基板2上に所定の電子
回路機能が構成される。
Conductor patterns (not shown) are formed on the upper and lower surfaces of the circuit board 2, respectively, and the semiconductor element 5 (see FIGS. 3 and 4) and the individual components 6 and 7 are mounted on the conductor patterns. It is like this. The semiconductor element 5 and the individual components 6 and 7 are electrically connected to each other through the above-described conductor pattern, and thus a predetermined electronic circuit function is formed on the circuit board 2.

【0010】フレキシブルプリント配線板3は、例えば
ポリイミドやポリエステルなどの絶縁性を有する薄型フ
ィルムを基材としたもので、その片面には所定の配線パ
ターンが形成されている。このフレキシブルプリント配
線板3は、平面的に見ると図1に示すように回路基板2
の周辺4箇所に設けられており、後述する手段によって
回路基板2の導体パターンに電気的に接続されている。
The flexible printed wiring board 3 is made of, for example, a thin film having an insulating property such as polyimide or polyester, and has a predetermined wiring pattern formed on one surface thereof. This flexible printed wiring board 3 has a circuit board 2 as shown in FIG.
Are provided at four locations on the periphery of and are electrically connected to the conductor pattern of the circuit board 2 by means described later.

【0011】ここでハイブリッドIC用基板1の内部構
造について図2を参照しながら説明する。本実施例で
は、フレキシブルプリント配線板3の上下面を例えばガ
ラスエポキシ基板2aでサンドイッチ状に挟み込んだ構
造となっている。また、回路基板2の導体パターンとフ
レキシブルプリント配線板3の配線パターン3aとは以
下のようにして電気的に接続されている。すなわち、回
路基板2の周縁にはその導体パターンに接続したスルー
ホール8が設けられており、このスルーホール8に施さ
れたスルーホールめっき8aとフレキシブルプリント配
線板3に施されたスルーホールめっき3bとの間で電気
的接続が得られるようになっている。なお、フレキシブ
ルプリント配線板3の配線パターン3aは回路基板2側
に幾分入り込んだ位置で途切れるように形成され、これ
によりパターン間の絶縁が保持されている。
The internal structure of the hybrid IC substrate 1 will now be described with reference to FIG. In this embodiment, the upper and lower surfaces of the flexible printed wiring board 3 are sandwiched by, for example, a glass epoxy substrate 2a and sandwiched. The conductor pattern of the circuit board 2 and the wiring pattern 3a of the flexible printed wiring board 3 are electrically connected as follows. That is, the through hole 8 connected to the conductor pattern is provided on the periphery of the circuit board 2, and the through hole plating 8a applied to the through hole 8 and the through hole plating 3b applied to the flexible printed wiring board 3 are provided. An electrical connection is made between and. The wiring pattern 3a of the flexible printed wiring board 3 is formed so as to be interrupted at a position slightly intruding into the circuit board 2 side, thereby maintaining insulation between the patterns.

【0012】次に、上記構成のハイブリッドIC用基板
1を用いたハイブリッドICの製造方法について説明す
る。まず、各回路基板2の導体パターン上に半導体素子
5及び個別部品6、7を搭載する。このとき、半導体素
子5はワイヤボンディング後にポッティング樹脂9によ
って封止される。なお、フレキシブルプリント配線板3
の配線パターン3aには、ポッティング樹脂9のキュア
時にパターンが酸化されないように予め金めっき等を施
しておくとよい。
Next, a method of manufacturing a hybrid IC using the hybrid IC substrate 1 having the above structure will be described. First, the semiconductor element 5 and the individual components 6 and 7 are mounted on the conductor pattern of each circuit board 2. At this time, the semiconductor element 5 is sealed by the potting resin 9 after wire bonding. Flexible printed wiring board 3
It is preferable that the wiring pattern 3a is previously plated with gold or the like so that the pattern is not oxidized when the potting resin 9 is cured.

【0013】続いて、全ての回路基板2への部品搭載が
完了したら、ハイブリッドIC用基板1を専用加工機の
マガジンにセットする。この専用加工機にはリード加工
用の上金型10と下金型11とが具備されており、マガ
ジンにセットされたハイブリッドIC用基板1は図示せ
ぬ搬送機構によって上金型10と下金型11の間に搬送
される。
Subsequently, when the components are mounted on all the circuit boards 2, the hybrid IC board 1 is set in the magazine of the dedicated processing machine. This dedicated processing machine is equipped with an upper die 10 and a lower die 11 for lead processing, and the hybrid IC substrate 1 set in the magazine is transported to the upper die 10 and the lower die by a transport mechanism (not shown). It is conveyed between the molds 11.

【0014】ハイブリッドIC用基板1が所定位置まで
搬送されると、上金型10と下金型11とが上下に可動
する。これにより回路基板2とフレキシブルプリント配
線板3とが主基板4から切り離されるとともに、フレキ
シブルプリント配線板3が所定の形状に折り曲げられ
る。本実施例では、回路基板2の周辺に設けられたフレ
キシブルプリント配線板3がクランク状に折り曲げられ
て図4に示すような外部リード(3)を形成する。以降
は、ハイブリッドIC用基板1を所定ピッチで送りなが
ら、順次、回路基板2とフレキシブルプリント配線板3
とを切断、曲げ加工していく。これにより図4に示すよ
うなハイブリッドIC12が次々に製造される。
When the hybrid IC substrate 1 is conveyed to a predetermined position, the upper mold 10 and the lower mold 11 move up and down. As a result, the circuit board 2 and the flexible printed wiring board 3 are separated from the main board 4, and the flexible printed wiring board 3 is bent into a predetermined shape. In this embodiment, the flexible printed wiring board 3 provided around the circuit board 2 is bent in a crank shape to form the external leads (3) as shown in FIG. After that, the circuit board 2 and the flexible printed wiring board 3 are sequentially transferred while feeding the hybrid IC board 1 at a predetermined pitch.
Cut and bend the and. Thereby, the hybrid ICs 12 as shown in FIG. 4 are manufactured one after another.

【0015】本実施例のハイブリッドIC用基板1にお
いては、回路基板2の導体パターンに電気的に接続され
たフレキシブルプリント配線板3によってハイブリッド
IC12の外部リードが形成されるようになっているた
め、ブリッジ発生の虞れがないのは勿論のこと、フレキ
シブルプリント配線板3のパターンニングの容易性から
従来よりも端子間隔を格段に小さく設定することが可能
となる。
In the hybrid IC substrate 1 of this embodiment, the flexible printed wiring board 3 electrically connected to the conductor pattern of the circuit board 2 forms the external leads of the hybrid IC 12. Of course, there is no risk of bridging, and because of the ease of patterning the flexible printed wiring board 3, it is possible to set the terminal spacing to a much smaller value than in the prior art.

【0016】ちなみに、本発明者の実験結果によれば、
従来では端子間隔を1.2mm程度までしか小さく設定
できなかったが、本実施例のハイブリッドIC用基板1
では端子間隔を0.5mm程度まで小さく設定できるこ
とが確認されている。
Incidentally, according to the experimental results of the present inventor,
In the past, the terminal spacing could be set to a small value of only 1.2 mm, but the hybrid IC substrate 1 of the present embodiment
It has been confirmed that the terminal spacing can be set as small as about 0.5 mm.

【0017】また、F型リード等を用いた従来の場合に
は回路基板の両側(二方向)だけしか外部リードを設け
ることができなかったが、本実施例のハイブリッドIC
用基板1では、回路基板2の四方向全てに外部リード
(3)を設けることが可能となる。
Further, in the conventional case using the F-type lead or the like, the external leads can be provided only on both sides (two directions) of the circuit board, but the hybrid IC of the present embodiment.
The circuit board 1 can be provided with external leads (3) in all four directions of the circuit board 2.

【0018】加えて、ハイブリッドIC用基板1を用い
たハイブリッドICの製造方法においては、基板分割と
同時に、その回路基板2の周囲に外部リードが形成され
るため、基板分割後に外部リードを嵌め込んでハンダ付
けするといった従来方法に比べて人手がかからないうえ
に大幅な工数削減が可能となり、しかも端子数の増加に
伴って作業工数が増えることもない。さらに、主基板4
上に設けられた複数の回路基板2及びフレキシブルプリ
ント配線板3を専用加工機の上金型10と下金型11と
で一度に打ち抜くようにすれば、より一層の工数削減が
期待できる。
In addition, in the method of manufacturing a hybrid IC using the hybrid IC substrate 1, since the external leads are formed around the circuit board 2 at the same time when the substrate is divided, the external leads are fitted after the substrate is divided. Compared to the conventional method such as soldering, it requires less manpower and can significantly reduce man-hours, and the man-hours do not increase as the number of terminals increases. Furthermore, the main substrate 4
If the plurality of circuit boards 2 and the flexible printed wiring board 3 provided above are punched at once by the upper mold 10 and the lower mold 11 of the dedicated processing machine, further reduction of man-hours can be expected.

【0019】また、上下金型10、11によって打ち抜
かれたハイブリッドIC12をそのままの状態でさらに
搬送し、例えば図5に示すように、予め予備ハンダされ
たマザーボード13の導体パターン14上に専用の加熱
圧着ツール15を用いて自動実装させることも可能であ
る。なお、マザーボード13へのハイブリッドIC12
の接合は上述した熱圧着方式に限らず、例えばレーザ方
式によるものであってもよい。
Further, the hybrid IC 12 punched by the upper and lower molds 10 and 11 is further conveyed as it is, and for example, as shown in FIG. 5, dedicated heating is performed on the conductor pattern 14 of the mother board 13 preliminarily pre-soldered. It is also possible to perform automatic mounting using the crimping tool 15. In addition, the hybrid IC 12 to the motherboard 13
The joining is not limited to the thermocompression bonding method described above, and may be, for example, a laser method.

【0020】[0020]

【発明の効果】以上、説明したように本発明によれば、
従来よりも格段に端子間隔を小さく設定でき、そのうえ
回路基板の四方向全てに外部リードを設けることができ
るようになることから、回路のデジタル化に伴うファイ
ンピッチ・多ピン化への対応が十分に可能となる。
As described above, according to the present invention,
The terminal spacing can be set significantly smaller than before, and external leads can be provided in all four directions of the circuit board, so it is sufficient to cope with fine pitch and multiple pins accompanying digitalization of the circuit. It becomes possible.

【0021】また、ハイブリッドICの製造工程におい
ては、基板分割後に外部リードを嵌め込んでハンダ付け
するといった人手を要する一連の作業が一切不要となる
ので、従来に比べて大幅な工数削減が可能となる。さら
に、ファインピッチ・多ピン化に対応した場合でも、回
路基板とフレキシブルプリント配線板とが所定の手段で
電気的に接続され、しかもそのフレキシブルプリント配
線板は切断、曲げ加工により外部リードとなるため、こ
れによって工数の増加を招くこともない。
Further, in the manufacturing process of the hybrid IC, since a series of manual operations such as fitting the external leads and soldering after dividing the substrate is not required at all, it is possible to significantly reduce the number of steps as compared with the conventional method. Become. Further, even in the case of supporting fine pitch / multi-pin, the circuit board and the flexible printed wiring board are electrically connected by a predetermined means, and the flexible printed wiring board becomes an external lead by cutting and bending. This does not cause an increase in man-hours.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係わるハイブリッドIC用基板の一実
施例を示す平面図である。
FIG. 1 is a plan view showing an embodiment of a hybrid IC substrate according to the present invention.

【図2】図1の要部断面図である。FIG. 2 is a cross-sectional view of a main part of FIG.

【図3】本発明に係わる製造方法の説明図である。FIG. 3 is an explanatory diagram of a manufacturing method according to the present invention.

【図4】本発明に係わるハイブリッドICの側面概略図
である。
FIG. 4 is a schematic side view of a hybrid IC according to the present invention.

【図5】ハイブリッドICの実装例を説明する側面概略
図である。
FIG. 5 is a schematic side view illustrating a mounting example of a hybrid IC.

【符号の説明】[Explanation of symbols]

1 ハイブリッドIC用基板 2 回路基板 3 フレキシブルプリント配線板 4 主基板 5 半導体素子 6、7 個別部品 10 上金型 11 下金型 1 Hybrid IC Substrate 2 Circuit Board 3 Flexible Printed Wiring Board 4 Main Board 5 Semiconductor Elements 6, 7 Individual Parts 10 Top Mold 11 Bottom Mold

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子と個別部品とが導体パターン
上に搭載される回路基板と、 前記回路基板の導体パターンに電気的に接続された状態
でその回路基板の周辺に設けられたフレキシブルプリン
ト配線板とによって構成されたことを特徴とするハイブ
リッドIC用基板。
1. A circuit board on which a semiconductor element and individual components are mounted on a conductor pattern, and a flexible printed wiring provided around the circuit board in a state of being electrically connected to the conductor pattern of the circuit board. A substrate for a hybrid IC, which is composed of a plate.
【請求項2】 前記回路基板と前記フレキシブルプリン
ト配線板とが主基板上に複数並設されていることを特徴
とするハイブリッドIC用基板。
2. A substrate for a hybrid IC, wherein a plurality of the circuit boards and the flexible printed wiring board are arranged side by side on a main board.
【請求項3】 請求項1又は請求項2記載のハイブリッ
ドIC用基板を用いたハイブリッドICの製造方法であ
って、 前記回路基板の周辺に設けられた前記フレキシブルプリ
ント配線板を上下金型により切断するとともに所定の形
状に折り曲げて外部リードとすることを特徴とするハイ
ブリッドICの製造方法。
3. A method of manufacturing a hybrid IC using the hybrid IC substrate according to claim 1 or 2, wherein the flexible printed wiring board provided around the circuit board is cut by upper and lower molds. And a method of manufacturing a hybrid IC, which comprises bending into a predetermined shape to form an external lead.
JP23638592A 1992-08-11 1992-08-11 Hybrid IC substrate and method of manufacturing hybrid IC using the same Expired - Fee Related JP3263863B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23638592A JP3263863B2 (en) 1992-08-11 1992-08-11 Hybrid IC substrate and method of manufacturing hybrid IC using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23638592A JP3263863B2 (en) 1992-08-11 1992-08-11 Hybrid IC substrate and method of manufacturing hybrid IC using the same

Publications (2)

Publication Number Publication Date
JPH0661413A true JPH0661413A (en) 1994-03-04
JP3263863B2 JP3263863B2 (en) 2002-03-11

Family

ID=16999999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23638592A Expired - Fee Related JP3263863B2 (en) 1992-08-11 1992-08-11 Hybrid IC substrate and method of manufacturing hybrid IC using the same

Country Status (1)

Country Link
JP (1) JP3263863B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6054763A (en) * 1997-10-31 2000-04-25 Oki Electric Industry Co., Ltd. Semiconductor device
KR100688515B1 (en) * 2005-01-06 2007-03-02 삼성전자주식회사 Memory modules and systems

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6054763A (en) * 1997-10-31 2000-04-25 Oki Electric Industry Co., Ltd. Semiconductor device
KR100688515B1 (en) * 2005-01-06 2007-03-02 삼성전자주식회사 Memory modules and systems

Also Published As

Publication number Publication date
JP3263863B2 (en) 2002-03-11

Similar Documents

Publication Publication Date Title
US6760227B2 (en) Multilayer ceramic electronic component and manufacturing method thereof
CN102217060A (en) Flexible and stackable semiconductor die packages, systems using the same, and methods of making the same
JP3569025B2 (en) Semiconductor device and electronic device using the same
KR910008628B1 (en) IC unit and its bonding method
EP2086296B1 (en) Printed circuit board and method of manufacturing the same
JP3829940B2 (en) Semiconductor device manufacturing method and manufacturing apparatus
JP2631665B2 (en) Manufacturing method of stacked semiconductor device
JP3263863B2 (en) Hybrid IC substrate and method of manufacturing hybrid IC using the same
JP2798108B2 (en) Hybrid integrated circuit device
JP2005150374A (en) Semiconductor device manufacturing method and manufacturing apparatus
EP0422828B1 (en) Improved film carrier
JP2627576B2 (en) Method of manufacturing terminal lead for hybrid integrated circuit device
JPH07112107B2 (en) Printed wiring board and manufacturing method thereof
US4410574A (en) Printed circuit boards and methods for making same
JP2876789B2 (en) Semiconductor module
JP3724442B2 (en) Watch manufacturing method
JPH0677623A (en) Electronic circuit device and manufacture thereof
JP3175336B2 (en) Hybrid IC lead forming method
JP3398556B2 (en) Method for manufacturing semiconductor device
JPH01120856A (en) Lead frame
JP2773707B2 (en) Manufacturing method of hybrid integrated circuit device
JPS5923432Y2 (en) semiconductor equipment
JP2707744B2 (en) Method for mounting semiconductor device using film carrier
JPH0210790A (en) Flexible printed wiring board and parts mounting method
JPH0548239A (en) Forming method of circuit substrate

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees