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JPH0661391A - Liquid-cooled type semiconductor device and manufacture thereof - Google Patents

Liquid-cooled type semiconductor device and manufacture thereof

Info

Publication number
JPH0661391A
JPH0661391A JP4211304A JP21130492A JPH0661391A JP H0661391 A JPH0661391 A JP H0661391A JP 4211304 A JP4211304 A JP 4211304A JP 21130492 A JP21130492 A JP 21130492A JP H0661391 A JPH0661391 A JP H0661391A
Authority
JP
Japan
Prior art keywords
liquid
semiconductor device
cooling passage
semiconductor chip
base substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4211304A
Other languages
Japanese (ja)
Inventor
Masaaki Hoshi
雅章 星
Tetsuji Obara
哲治 小原
Hideaki Nonami
秀顕 野並
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi ULSI Engineering Corp
Hitachi Ltd
Original Assignee
Hitachi ULSI Engineering Corp
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi ULSI Engineering Corp, Hitachi Ltd filed Critical Hitachi ULSI Engineering Corp
Priority to JP4211304A priority Critical patent/JPH0661391A/en
Publication of JPH0661391A publication Critical patent/JPH0661391A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To enable heat released from a semiconductor chip to be dissipated through a shorter dissipating path so as to enhance a liquid-cooled type semiconductor device in cooling efficiency by a method wherein a liquid coolant path through which liquid coolant flows is provided inside a package where a semiconductor is sealed. CONSTITUTION:A liquid coolant path 4 is provided at a part of a member possessed of a side where a semiconductor chip 5 of a package 1 is provided, and liquid coolant is made to flow through the liquid coolant path 4.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高消費電力型半導体装
置に関し、特に、パッケージ(封止体)の半導体チップが
設けられている面を有する部材の少なくとも一部に液冷
却用通路を設け、この液冷却用通路中に冷却液を流す液
冷却型半導体装置及びその製造方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high power consumption type semiconductor device, and more particularly to a liquid cooling passage provided in at least a part of a member of a package (sealing body) having a surface on which a semiconductor chip is provided. The present invention relates to a liquid cooling type semiconductor device in which a cooling liquid is caused to flow in the liquid cooling passage and a manufacturing method thereof.

【0002】[0002]

【従来の技術】特開昭59ー32162号公報,特開昭
59ー98541号公報等で開示されている半導体モジ
ュールは、冷却機構が主基板に付設されている。
2. Description of the Related Art In the semiconductor modules disclosed in JP-A-59-32162 and JP-A-59-98541, a cooling mechanism is attached to a main board.

【0003】[0003]

【発明が解決しようとする課題】本発明者は、前述の半
導体モジュールの冷却機構について検討した結果、次の
問題点を見出した。
The present inventor has found the following problem as a result of examining the cooling mechanism of the semiconductor module described above.

【0004】すなわち、半導体モジュールの冷却機構に
おいて、半導体チップで発生した熱は、パッケージのベ
ース(基板)部に伝わり、空冷により外部へ放熱する経路
を通る。しかし、パッケージのベース部は、ある程度以
上の厚さが必要であることから、半導体チップとベース
の外側までの距離が大きいこと、及び空冷の効率が低い
ため冷却速度は遅くなる。
That is, in the cooling mechanism of the semiconductor module, the heat generated in the semiconductor chip is transmitted to the base (substrate) portion of the package, and passes through the route of radiating outside by air cooling. However, since the base portion of the package needs to have a certain thickness or more, the distance between the semiconductor chip and the outside of the base is large, and the cooling efficiency is low, so that the cooling rate becomes slow.

【0005】本発明の目的は、パッケージ(封止体)のベ
ース部内に液冷却用通路を設けて半導体チップで発生す
る熱の放熱経路を短縮し、冷却効率を向上することがで
きる液冷却型半導体装置及びその製造方法を提供するこ
とにある。
An object of the present invention is to provide a liquid cooling passage in a base portion of a package (sealing body) to shorten a heat radiation path of heat generated in a semiconductor chip and improve cooling efficiency. It is to provide a semiconductor device and a manufacturing method thereof.

【0006】本発明の前記ならびにその他の目的と新規
な特徴は、本明細書の記述及び添付図面によって明らか
になるであろう。
The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

【0007】[0007]

【課題を解決するための手段】本願において開示される
発明のうち、代表的なものの概要を簡単に説明すれば、
下記のとおりである。
Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

【0008】(1)パッケージ(封止体)の半導体チップ
が設けられている面を有する部材の少なくとも一部に液
冷却用通路を設け、この液冷却用通路中に冷却液を流す
液冷却型半導体装置である。
(1) A liquid cooling type in which a liquid cooling passage is provided in at least a part of a member having a surface on which a semiconductor chip of a package (sealing body) is provided, and a cooling liquid is caused to flow in the liquid cooling passage. It is a semiconductor device.

【0009】(2)グリーンシートの状態で液冷却用通
路状の空洞を有する第1絶縁シートを形成し、その両面
若しくは前記液冷却通路状の空洞を有する面側にグリー
ンシートの状態で第2絶縁シートを重ね合わせて積層
し、これらにプレス加工を施して積層体を形成し、その
積層体を焼成してベース基板を形成し、前記ベース基板
のチップ塔載面上に半導体チップを接着し、この半導体
チップの外部端子とリードとを電気的に接続し、前記ベ
ース基板に封止用キャップを接着すると共に、このベー
ス基板及び封止用キャップで形成されるキャビティ内に
前記半導体チップを気密封止する液冷却型半導体装置の
製造方法である。
(2) A first insulating sheet having a liquid cooling passage-shaped cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both surfaces thereof or on the side having the liquid cooling passage-shaped cavity in the state of a green sheet. Insulating sheets are stacked and laminated, and press working is performed on these to form a laminated body, the laminated body is fired to form a base substrate, and a semiconductor chip is bonded onto the chip tower mounting surface of the base substrate. Electrically connecting the external terminals of the semiconductor chip to the leads, adhering a sealing cap to the base substrate, and sealing the semiconductor chip in a cavity formed by the base substrate and the sealing cap. It is a method of manufacturing a liquid-cooled semiconductor device that is tightly sealed.

【0010】(3)半導体チップとリードとを電気的に
接続し、これらを樹脂パッケージ(樹脂封止体)で封止
する半導体装置の製造方法において、前記樹脂パッケー
ジを成形する際、上下の成形鋳型のうちいずれか一方の
成形鋳型に液冷却用通路を有する中空部材を支持させて
成形する液冷却型半導体装置の製造方法である。
(3) In a method of manufacturing a semiconductor device in which a semiconductor chip and leads are electrically connected and these are sealed with a resin package (resin encapsulant), when molding the resin package, upper and lower moldings are performed. This is a method for manufacturing a liquid-cooled semiconductor device, in which one of the molds is supported by a hollow member having a liquid cooling passage to carry out molding.

【0011】(4)グリーンシートの状態で液冷却用通
路状の空洞を有する第1絶縁シートを形成し、その両面
若しくは液冷却用通路状の空洞を有する面側にグリーン
シートの状態で第2絶縁シートを重ね合わせて積層し、
これらにプレス加工を施して積層体を形成し、その積層
体を焼成してベース基板を形成する半導体装置用ベース
基板の製造方法である。
(4) A first insulating sheet having a liquid cooling passage-like cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both sides of the first insulating sheet or on the side having the liquid cooling passage-like cavity. Insulation sheets are stacked and laminated,
This is a method for manufacturing a base substrate for a semiconductor device, in which a laminated body is formed by pressing these, and the laminated body is baked to form a base substrate.

【0012】[0012]

【作用】前述した手段によれば、半導体チップを封止す
るパッケージ(封止体)内に液冷却用通路を設け、前記半
導体チップで発生する熱の放熱経路を短縮し、かつ液冷
却するので、冷却効率を向上することができる。
According to the above-mentioned means, since the liquid cooling passage is provided in the package (sealing body) for sealing the semiconductor chip, the heat radiation path for heat generated in the semiconductor chip is shortened and the liquid is cooled. The cooling efficiency can be improved.

【0013】また、グリーンシートの状態で液冷却用通
路状の空洞を有する第1絶縁シートを形成し、その両面
若しくは前記液冷却用通路状の空洞を有する面側にグリ
ーンシートの状態で第2絶縁シートを重ね合わせて積層
し、これらにプレス加工を施して積層体を形成し、その
積層体を焼成してベース基板を形成し、前記ベース基板
のチップ塔載面上に半導体チップを接着し、この半導体
チップの外部端子とリードとを電気的に接続し、前記ベ
ース基板に封止用キャップを接着すると共に、このベー
ス基板及び封止用キャップで形成されるキャビティ内に
前記半導体チップを気密封止するので、本発明の液冷却
型半導体装置を容易にして製造することができる。
Further, a first insulating sheet having a liquid cooling passage-like cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both surfaces thereof or on the side having the liquid cooling passage-like cavity in the state of the green sheet. Insulating sheets are stacked and laminated, and press working is performed on these to form a laminated body, the laminated body is fired to form a base substrate, and a semiconductor chip is bonded onto the chip tower mounting surface of the base substrate. Electrically connecting the external terminals of the semiconductor chip to the leads, adhering a sealing cap to the base substrate, and sealing the semiconductor chip in a cavity formed by the base substrate and the sealing cap. Because of the close sealing, the liquid-cooled semiconductor device of the present invention can be easily manufactured.

【0014】また、半導体チップとリードとを電気的に
接続し、これらを樹脂パッケージで封止する半導体装置
の製造方法において、前記樹脂パッケージを成形する際
に、上下の成形鋳型のうちいずれか一方の成形鋳型に液
冷却用通路を有する中空部材を支持させて成形するの
で、本発明の液冷却型半導体装置を製造することができ
る。
Further, in the method of manufacturing a semiconductor device in which a semiconductor chip and leads are electrically connected and these are sealed with a resin package, when molding the resin package, one of upper and lower molding molds is used. Since the hollow mold having the liquid cooling passage is supported by the molding mold of (1) and molding is performed, the liquid cooling type semiconductor device of the present invention can be manufactured.

【0015】[0015]

【実施例】以下、図面を参照して、本発明の実施例を詳
細に説明する。
Embodiments of the present invention will now be described in detail with reference to the drawings.

【0016】なお、実施例を説明するための全図におい
て、同一機能を有するものは同一符号を付け、その繰り
返しの説明は省略する。
In all the drawings for explaining the embodiments, parts having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

【0017】(実施例1)図1は、本発明の実施例1で
ある液冷却型半導体装置の上方から見た上部平面図、図
2は、図1に示すA−A切断線で切った断面図である。
(Embodiment 1) FIG. 1 is a top plan view of a liquid-cooled semiconductor device according to a first embodiment of the present invention as seen from above, and FIG. 2 is taken along the line AA shown in FIG. FIG.

【0018】図1及び図2に示すように、本実施例1の
液冷却型半導体装置は、セラミック型パッケージ(封止
体)1で半導体チップ5を封止している。このセラミッ
ク型パッケージ1は、主に、セラミック(例えばAl
23)で形成されたベース基板2及び封止用キャップ3
で構成される。
As shown in FIGS. 1 and 2, in the liquid-cooled semiconductor device of the first embodiment, a semiconductor chip 5 is sealed with a ceramic type package (sealing body) 1. The ceramic type package 1 is mainly made of ceramic (for example, Al
2 O 3 ), a base substrate 2 and a sealing cap 3 formed of
Composed of.

【0019】前記液冷却型半導体装置は、ベース基板2
のチップ塔載面上に接着層(図示せず)を介して半導体
チップ5を接着し固定し、この半導体チップ5を封止用
キャップ3で封止する。つまり、半導体チップ5は、ベ
ース基板2及び封止用キャップ3で形成されるキャビテ
ィ内に気密封止される。
The liquid-cooled semiconductor device has a base substrate 2
The semiconductor chip 5 is adhered and fixed on the chip mounting surface of (1) through an adhesive layer (not shown), and the semiconductor chip 5 is sealed by the sealing cap 3. That is, the semiconductor chip 5 is hermetically sealed in the cavity formed by the base substrate 2 and the sealing cap 3.

【0020】前記半導体チップ5の主面側(図1中、下
面)には、記憶回路システム、論理回路システム、或は
それらの混合回路システム等の回路システムが塔載され
る。半導体チップ5の主面上には複数個の外部端子(図
示せず)が配置される。
A circuit system such as a memory circuit system, a logic circuit system, or a mixed circuit system thereof is mounted on the main surface side (lower surface in FIG. 1) of the semiconductor chip 5. A plurality of external terminals (not shown) are arranged on the main surface of the semiconductor chip 5.

【0021】前記半導体チップ5の外周囲の外側には、
リード6のインナー部が複数本配列される。リード6の
インナー部は、半導体チップ5の外周囲の外側におい
て、ベース基板2のチップ塔載面上に例えば低融点ガラ
スで接着され固定される。このリード6のインナー部
は、セラミック型パッケージ1の外部に引き出されたリ
ード6のアウター部と一体に形成される。リード6のア
ウター部は、例えばガルウィング形状に成形される。リ
ード6のインナー部は、ボンディングワイヤ7を介して
半導体チップ5の外部端子に電気的に接続される。
Outside the outer periphery of the semiconductor chip 5,
A plurality of inner parts of the leads 6 are arranged. The inner portion of the lead 6 is bonded and fixed to the chip tower mounting surface of the base substrate 2 by, for example, low melting point glass outside the outer periphery of the semiconductor chip 5. The inner portion of the lead 6 is formed integrally with the outer portion of the lead 6 that is drawn out of the ceramic type package 1. The outer portion of the lead 6 is formed in, for example, a gull wing shape. The inner portion of the lead 6 is electrically connected to the external terminal of the semiconductor chip 5 via the bonding wire 7.

【0022】前記ベース基板2のチップ塔載面上には、
半導体チップ5の外周囲の外側において、リード6のイ
ンナー部の一部を介在して封止用キャップ3の接着領域
が例えば低融点ガラス(図示せず)で接着され固定され
る。封止用キャップ3は、断面形状がコの字形状で形成
され、その接着領域は、半導体チップ5の主面と対向す
る封止用キャップ3の内面よりもベース基板2のチップ
塔載面側に突出した構成になっている。つまり、半導体
チップ5、リード6のインナー部、ボンディングワイヤ
7の夫々は、ベース基板2及び封止用キャップ3で形成
されるキャビティ内に気密封止される。
On the chip mounting surface of the base substrate 2,
Outside the outer periphery of the semiconductor chip 5, the bonding region of the sealing cap 3 is bonded and fixed with, for example, low melting glass (not shown) with a part of the inner portion of the lead 6 interposed. The sealing cap 3 has a U-shaped cross-section, and the bonding region thereof is closer to the chip tower mounting surface side of the base substrate 2 than the inner surface of the sealing cap 3 facing the main surface of the semiconductor chip 5. It has a protruding structure. That is, the semiconductor chip 5, the inner portion of the lead 6, and the bonding wire 7 are hermetically sealed in the cavity formed by the base substrate 2 and the sealing cap 3.

【0023】前記ベース基板2には冷却液が流れる液冷
却用通路4が設けられている。このベース基板2は、半
導体チップ5に塔載された回路システムの動作で発生し
た熱を液冷却用通路4中に流れる冷却液に伝導し、セラ
ミック型パッケージ1の外部に放出する。つまり、本実
施例の液冷却型半導体装置は、ベース基板2に設けられ
た液冷却用通路4中に冷却液を流すことにより、半導体
チップ5で発生する熱の放熱経路を短縮し、かつ液冷却
するので、冷却効率を向上することができる。なお、前
記液冷却用通路4は、伝達面積を増大する目的として、
例えば千鳥形状で配置される。
The base substrate 2 is provided with a liquid cooling passage 4 through which a cooling liquid flows. The base substrate 2 conducts the heat generated by the operation of the circuit system mounted on the semiconductor chip 5 to the cooling liquid flowing in the liquid cooling passage 4 and releases it to the outside of the ceramic type package 1. That is, in the liquid-cooled semiconductor device of this embodiment, the cooling liquid is flowed through the liquid-cooling passage 4 provided in the base substrate 2 to shorten the heat radiation path of heat generated in the semiconductor chip 5, and Since it is cooled, the cooling efficiency can be improved. The liquid cooling passage 4 has the following purpose of increasing the transmission area.
For example, they are arranged in a staggered shape.

【0024】前記ベース基板2は、図3に示すように、
平面がクシ歯形状に形成されたグリーンシートの状態の
部材2A1 、部材2A2 の夫々を組み合わせて液冷却用
通路状の空洞4aを有する絶縁シート2Aを形成し、そ
の両面の夫々にグリーンシートの状態の絶縁シート2B
の夫々を重ね合わせて積層し、これらにプレス加工を施
して積層体を形成し、その積層体を焼成して構成され
る。なお、前記ベース基板2は、図4に示すように、液
冷却用通路状の空洞4bを有するグリーンシートの状態
の絶縁シート2Cと、この絶縁シート2Cの液冷却用通
路状の空洞4bと対称的な形状に形成された液冷却用通
路状の空洞4cを有するグリーンシートの状態の絶縁シ
ート2Dとを重ね合わせて積層した構成にしてもよい。
また、液冷却用通路状の空洞4bを有する絶縁シート2
Cと、この絶縁シート2Cの空洞4bが設けられた面側
に図3に示す絶縁シート2Bを重ね合わせて積層した構
成にしてもよい。
The base substrate 2 is, as shown in FIG.
The members 2A 1 and 2A 2 in the state of a green sheet having a flat comb-like plane are combined to form an insulating sheet 2A having a cavity 4a for a liquid cooling passage, and green sheets are formed on both sides of the insulating sheet 2A. Insulation sheet 2B
Are stacked and laminated, press-processed to form a laminated body, and the laminated body is fired. As shown in FIG. 4, the base substrate 2 is symmetrical with the insulating sheet 2C in the state of a green sheet having a liquid cooling passage-shaped cavity 4b and the liquid cooling passage-shaped cavity 4b of the insulating sheet 2C. The insulating sheet 2D in the state of a green sheet having a liquid cooling passage-like cavity 4c formed in a general shape may be laminated and laminated.
In addition, the insulating sheet 2 having the liquid cooling passage-like cavity 4b
C and the insulating sheet 2B shown in FIG. 3 may be laminated on the surface side of the insulating sheet 2C where the cavity 4b is provided.

【0025】また、プラスチックベース基板の場合は、
図5に示すように、プラスチック成形する際に、プラス
チック41中に液冷却用通路4を有する中空状の金属パ
イプ42を埋め込んで成形することにより、液冷却用通
路4を有するベース基板2が容易に得られる。中空状の
金属パイプ42は、例えば42アロイ合金で形成され
る。
In the case of a plastic base substrate,
As shown in FIG. 5, at the time of plastic molding, the base substrate 2 having the liquid cooling passage 4 can be easily formed by embedding the hollow metal pipe 42 having the liquid cooling passage 4 in the plastic 41 and molding the same. Can be obtained. The hollow metal pipe 42 is formed of, for example, 42 alloy alloy.

【0026】このように本実施例の液冷却型半導体装置
は、パッケージ1のベース基板2に液冷却用通路4を設
けた構成になっているが、封止用キャップ3のチップ塔
載面上に充填材を介して半導体チップ5を固定する半導
体装置においては、パッケージ1の封止用キャップ3内
に液冷却用通路4を設けた構成にする。
As described above, the liquid-cooled semiconductor device of this embodiment has a structure in which the liquid-cooling passage 4 is provided in the base substrate 2 of the package 1, but on the chip tower mounting surface of the sealing cap 3. In the semiconductor device in which the semiconductor chip 5 is fixed via the filling material, the liquid cooling passage 4 is provided in the sealing cap 3 of the package 1.

【0027】(実施例2)図6は本発明の実施例2であ
る液冷却型半導体装置の概略構成を示す断面図、図7は
図5に示す液冷却半導体装置の製造方法を説明するため
の断面図である。
(Embodiment 2) FIG. 6 is a sectional view showing a schematic structure of a liquid-cooled semiconductor device according to a second embodiment of the present invention, and FIG. 7 is for explaining a method of manufacturing the liquid-cooled semiconductor device shown in FIG. FIG.

【0028】図6及び図7に示すように、本実施例2の
液冷却型半導体装置は、タブ12のチップ塔載面上に接
着層を介して半導体チップ5を接着し固定し、この半導
体チップ5の外部端子(図示せず)とリード6のインナー
部とをボンディングワイヤ7で電気的に接続し、これら
を樹脂11で成形される樹脂パッケージ1で封止する半
導体装置であって、前記樹脂パッケージ1を成形する
際、上下の成形鋳型13、14のうちいずれか一方の成
形鋳型例えば成形鋳型14に液冷却用通路4を有する中
空状の金属パイプ42を支持させて成形したものであ
る。
As shown in FIGS. 6 and 7, in the liquid-cooled semiconductor device of the second embodiment, the semiconductor chip 5 is adhered and fixed on the chip tower mounting surface of the tab 12 via an adhesive layer. A semiconductor device in which an external terminal (not shown) of a chip 5 and an inner portion of a lead 6 are electrically connected with a bonding wire 7 and these are sealed with a resin package 1 molded with a resin 11. When the resin package 1 is molded, one of the upper and lower molding molds 13 and 14, for example, the molding mold 14 is molded by supporting a hollow metal pipe 42 having a liquid cooling passage 4. .

【0029】前記成形鋳型14に中空状の金属パイプ4
2を支持させるには、成形鋳型14の一部に凹部14a
を設けることにより実現できる。
Hollow metal pipe 4 in the molding mold 14
In order to support 2, the recess 14a is formed in a part of the molding mold 14.
Can be realized by providing.

【0030】以上のように構成することにより、半導体
チップ5を封止する樹脂パッケージ1内に冷却液が流れ
る液冷却用通路4を設け、前記半導体チップ1で発生す
る熱の放熱経路を短縮し、かつ液冷却するので、冷却効
率を向上することができる。
With the above structure, the liquid cooling passage 4 through which the cooling liquid flows is provided in the resin package 1 for sealing the semiconductor chip 5, and the heat radiation path for heat generated in the semiconductor chip 1 is shortened. Since the liquid is cooled, the cooling efficiency can be improved.

【0031】また、タブ12のチップ塔載面上に半導体
チップ5を接着し、この半導体チップ5の外部端子とリ
ード6とを電気的に接続し、これらを樹脂パッケージ1
で封止する半導体装置の製造方法において、前記樹脂パ
ッケージ1を成形する際、上下成形鋳型13、14のう
ちいずれか一方の成形鋳型に液冷却用通路4を有する中
空状の金属パイプ42を支持させて成形するので、本発
明の液冷却型半導体装置を製造することができる。
Further, the semiconductor chip 5 is adhered on the chip mounting surface of the tab 12, the external terminals of the semiconductor chip 5 and the leads 6 are electrically connected, and these are packaged in the resin package 1.
In the method of manufacturing a semiconductor device which is sealed with, when molding the resin package 1, a hollow metal pipe 42 having a liquid cooling passage 4 is supported in one of the upper and lower molding molds 13 and 14. The liquid-cooled semiconductor device of the present invention can be manufactured because the molding is carried out.

【0032】以上、本発明者によってなされた発明を、
前記実施例に基づき具体的に説明したが、本発明は、前
記実施例に限定されるものではなく、その要旨を逸脱し
ない範囲において種々変更可能であることは勿論であ
る。
The inventions made by the present inventors are as follows.
Although the present invention has been specifically described based on the above-mentioned embodiments, the present invention is not limited to the above-mentioned embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

【0033】[0033]

【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記のとおりである。
The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

【0034】半導体チップを封止するパッケージ内に冷
却液が流れる液冷却用通路を設け、前記半導体チップで
発生する熱の放熱経路を短縮し、かつ液冷却するので、
冷却効率を向上することができる。
Since a liquid cooling passage through which a cooling liquid flows is provided in the package for sealing the semiconductor chip, the heat radiation path for heat generated in the semiconductor chip is shortened and the liquid is cooled.
The cooling efficiency can be improved.

【0035】また、グリーンシートの状態で液冷却用通
路状の空洞を有する第1絶縁シートを形成し、その両面
若しくは前記液冷却通路状の空洞を有する面側にグリー
ンシートの状態で第2絶縁シートを重ね合わせて積層
し、これらにプレス加工を施して積層体を形成し、その
積層体を焼成してベース基板を形成し、前記ベース基板
のチップ塔載面上に半導体チップを接着し、この半導体
チップの外部端子とリードとを電気的に接続し、前記ベ
ース基板に封止用キャップを接着すると共に、このベー
ス基板及び封止用キャップで形成されるキャビティ内に
前記半導体チップを気密封止するので、本発明の液冷却
型半導体装置を容易に製造できる。
Further, a first insulating sheet having a liquid cooling passage-like cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both surfaces thereof or a surface side having the liquid cooling passage-like cavity in the state of a green sheet. Sheets are stacked and laminated, a laminate is formed by pressing these, a base substrate is formed by firing the laminate, and a semiconductor chip is bonded onto the chip tower mounting surface of the base substrate, The external terminals of this semiconductor chip are electrically connected to the leads, a sealing cap is adhered to the base substrate, and the semiconductor chip is hermetically sealed in a cavity formed by the base substrate and the sealing cap. Therefore, the liquid-cooled semiconductor device of the present invention can be easily manufactured.

【0036】また、半導体チップとリードとを電気的に
接続し、これらを樹脂パッケージで封止する半導体装置
の製造方法において、前記樹脂パッケージを成形する
際、上下の成形鋳型のうちいずれか一方の形成鋳型に液
冷却用通路を有する中空部材を支持させて成形するの
で、本発明の液冷却型半導体装置を製造できる。
Further, in a method of manufacturing a semiconductor device in which a semiconductor chip and leads are electrically connected and these are sealed with a resin package, when molding the resin package, one of upper and lower molding molds is molded. Since the forming mold is supported by the hollow member having the liquid cooling passage, the liquid cooling semiconductor device of the present invention can be manufactured.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例1である液冷却型半導体装置
の上方から見た上部平面図、
FIG. 1 is a top plan view of a liquid-cooled semiconductor device, which is Embodiment 1 of the present invention, viewed from above;

【図2】 図1に示すA−A線で切った断面図、FIG. 2 is a sectional view taken along line AA shown in FIG.

【図3】 前記液冷却型半導体装置のベース基板の製造
方法を説明するための斜視図、
FIG. 3 is a perspective view for explaining a method of manufacturing a base substrate of the liquid-cooled semiconductor device,

【図4】 前記液冷却型半導体装置の他のベース基板の
製造方法を説明するための斜視図、
FIG. 4 is a perspective view for explaining another method of manufacturing the base substrate of the liquid-cooled semiconductor device,

【図5】 前記液冷却型半導体装置の他のベース基板の
製造方法を説明するための断面図、
FIG. 5 is a cross-sectional view for explaining another method of manufacturing the base substrate of the liquid-cooled semiconductor device,

【図6】 本発明の実施例2である液冷却型半導体装置
の概略構成を示す断面図、
FIG. 6 is a sectional view showing a schematic configuration of a liquid-cooled semiconductor device which is Embodiment 2 of the present invention,

【図7】 前記液冷却型半導体装置の製造方法を説明す
るための断面図。
FIG. 7 is a sectional view for explaining a method for manufacturing the liquid-cooled semiconductor device.

【符号の説明】[Explanation of symbols]

1…パッケージ(封止体)、2…ベース基板、2A,2C
…第1絶縁シート、2B,2D…第2絶縁シート、3…
封止用キャップ、4…液冷却用通路、4a…液冷却用通
路状の空洞、5…半導体チップ、6…リード、7…ボン
ディングワイヤ、11…樹脂、12…タブ、13…上型
成形鋳型、14…下型成形鋳型。
1 ... Package (sealing body), 2 ... Base substrate, 2A, 2C
... 1st insulating sheet, 2B, 2D ... 2nd insulating sheet, 3 ...
Sealing cap, 4 ... Liquid cooling passage, 4a ... Liquid cooling passage-like cavity, 5 ... Semiconductor chip, 6 ... Lead, 7 ... Bonding wire, 11 ... Resin, 12 ... Tab, 13 ... Upper mold , 14 ... Lower mold.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 小原 哲治 東京都小平市上水本町5丁目20番1号 日 立超エル・エス・アイ・エンジニアリング 株式会社内 (72)発明者 野並 秀顕 東京都青梅市今井2326番地 株式会社日立 製作所デバイス開発センタ内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tetsuji Ohara 5-20-1, Josuihonmachi, Kodaira-shi, Tokyo Inside Hiritsu Cho-LS Engineering Co., Ltd. (72) Inventor Hideaki Nonami Ome, Tokyo 2326 Imai, Ichi, Hitachi, Ltd. Device Development Center

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 パッケージの半導体チップが設けられて
いる面を有する部材の少なくとも一部に液冷却用通路を
設け、この液冷却用通路中に冷却液を流すことを特徴と
する液冷却型半導体装置。
1. A liquid-cooled semiconductor, characterized in that a liquid cooling passage is provided in at least a part of a member having a surface on which a semiconductor chip of a package is provided, and a cooling liquid is flown into the liquid cooling passage. apparatus.
【請求項2】 グリーンシートの状態で液冷却用通路状
の空洞を有する第1絶縁シートを形成し、その両面若し
くは前記液冷却用通路状の空洞を有する面側にグリーン
シートの状態で第2絶縁シートを重ね合せて積層し、こ
れらにプレス加工を施して積層体を形成し、その積層体
を焼成してベース基板を形成し、前記ベース基板のチッ
プ塔載面上に半導体チップを接着し、この半導体チップ
の外部端子とリードとを電気的に接続し、前記ベース基
板に封止用キャップを接着すると共に、このベース基板
及び封止用キャップで形成されるキャビティ内に前記半
導体チップを気密封止することを特徴とする請求項1に
記載の液冷却型半導体装置の製造方法。
2. A first insulating sheet having a liquid cooling passage-shaped cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both surfaces thereof or on the side having the liquid cooling passage-shaped cavity in the state of the green sheet. Insulating sheets are stacked and laminated, press forming is performed on these to form a laminated body, the laminated body is fired to form a base substrate, and a semiconductor chip is bonded to the chip mounting surface of the base substrate. Electrically connecting the external terminals of the semiconductor chip to the leads, adhering a sealing cap to the base substrate, and sealing the semiconductor chip in a cavity formed by the base substrate and the sealing cap. The method for manufacturing a liquid-cooled semiconductor device according to claim 1, wherein the liquid-cooled semiconductor device is tightly sealed.
【請求項3】 半導体チップとリードとを電気的に接続
し、これらを樹脂パッケージで封止する半導体装置の製
造方法において、前記樹脂パッケージを成形する際、上
下の成形鋳型のうちいずれか一方の成形鋳型に液冷却用
通路を有する中空部材を支持させて成形することを特徴
とする請求項1に記載の液冷却型半導体装置の製造方
法。
3. A semiconductor device manufacturing method for electrically connecting a semiconductor chip and a lead, and encapsulating these with a resin package. When molding the resin package, one of upper and lower molding molds is used. The method for manufacturing a liquid-cooled semiconductor device according to claim 1, wherein the molding is carried out by supporting a hollow member having a liquid cooling passage.
【請求項4】 グリーンシートの状態で液冷却用通路状
の空洞を有する第1絶縁シートを形成し、その両面若し
くは前記液冷却用通路状の空洞を有する面側にグリーン
シートの状態で第2絶縁シートを重ね合わせて積層し、
これらにプレス加工を施して積層体を形成し、その積層
体を焼成してベース基板を形成することを特徴とする半
導体装置用ベース基板の製造方法。
4. A first insulating sheet having a liquid cooling passage-like cavity is formed in the state of a green sheet, and a second insulating sheet is formed on both surfaces thereof or on the side having the liquid cooling passage-like cavity in the state of the green sheet. Insulation sheets are stacked and laminated,
A method of manufacturing a base substrate for a semiconductor device, which comprises press-working these to form a laminated body and firing the laminated body to form a base substrate.
JP4211304A 1992-08-07 1992-08-07 Liquid-cooled type semiconductor device and manufacture thereof Withdrawn JPH0661391A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4211304A JPH0661391A (en) 1992-08-07 1992-08-07 Liquid-cooled type semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4211304A JPH0661391A (en) 1992-08-07 1992-08-07 Liquid-cooled type semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0661391A true JPH0661391A (en) 1994-03-04

Family

ID=16603730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4211304A Withdrawn JPH0661391A (en) 1992-08-07 1992-08-07 Liquid-cooled type semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0661391A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0768711A2 (en) * 1995-10-13 1997-04-16 AT&T Corp. Microelectronic package with device cooling
JP2006141096A (en) * 2004-11-10 2006-06-01 Toyota Motor Corp Semiconductor device
JP2008101908A (en) * 1994-07-29 2008-05-01 Battelle Memorial Inst Microcomponent sheet architecture
US7372148B2 (en) 2004-12-20 2008-05-13 Samsung Electronics Co., Ltd. Semiconductor chip having coolant path, semiconductor package and package cooling system using the same
US8125781B2 (en) 2004-11-11 2012-02-28 Denso Corporation Semiconductor device
CN114038819A (en) * 2021-11-29 2022-02-11 长电科技(滁州)有限公司 A chip partial electromagnetic shielding package and its manufacturing method

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008101908A (en) * 1994-07-29 2008-05-01 Battelle Memorial Inst Microcomponent sheet architecture
JP4580422B2 (en) * 1994-07-29 2010-11-10 バッテル・メモリアル・インスティチュート Micro component sheet structure
EP0768711A2 (en) * 1995-10-13 1997-04-16 AT&T Corp. Microelectronic package with device cooling
EP0768711A3 (en) * 1995-10-13 1998-07-08 AT&T Corp. Microelectronic package with device cooling
JP2006141096A (en) * 2004-11-10 2006-06-01 Toyota Motor Corp Semiconductor device
US8125781B2 (en) 2004-11-11 2012-02-28 Denso Corporation Semiconductor device
US10079226B2 (en) 2004-11-11 2018-09-18 Denso Corporation Semiconductor device
US7372148B2 (en) 2004-12-20 2008-05-13 Samsung Electronics Co., Ltd. Semiconductor chip having coolant path, semiconductor package and package cooling system using the same
CN114038819A (en) * 2021-11-29 2022-02-11 长电科技(滁州)有限公司 A chip partial electromagnetic shielding package and its manufacturing method

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