JPH0661358A - Laminated thin-film circuit using "teflon pfa" or "teflon fep" as dielectric insulator and its formation method - Google Patents

Abstract

PURPOSE: To reduce a dielectric ratio and to achieve stabilization by providing a dielectric insulation layer that is made of Teflon-type material being supported by a substrate, electrically connecting the parts of a conductive circuit layer that is supported in the dielectric insulation layer each other, and electrically connecting the part of the circuit layer to an external device. CONSTITUTION: A conductive circuit layer 16a is formed on a flat surface 14 of a substrate 12. Then, a plurality of post biases 18a are formed on the surface of the conductive circuit layer 16a and are electrically connected. Then, an insulation dielectric layer 20a that is made of dry-powder-shaped Teflon PFA is applied onto the conductive circuit 16a and the post bias 18a, thus completely covering the conductive circuit 16a and the post bias 18a and burying them into a dielectric layer. The process is repeated for a plurality of times, thus forming a multilayer circuit array 10. Then, the circuit array 10 is connected to an external device by a bond pad 22, thus achieving an extremely low dielectric ratio and retaining stability.

Description

Detailed Description of the Invention

[0001]

The present invention relates to "Teflon PFA" or "Teflon FEP" as a dielectric insulator for laminated thin film circuits.
Regarding the use of. "Teflon" is a trade name of EIDupont (Delaware, USA).

[0002]

BACKGROUND OF THE INVENTION Single-layer and multi-layer thin film circuits are widely used in various applications throughout the computer industry. Multilayer thin film circuits include a stack of conductive circuit patterns and dielectric insulating materials to form a high density three-dimensional conductive circuit array. Thin film circuits are first used in semiconductor packaging, and in this field, high density / high speed packaging of electrical devices is of great importance.

One of the important factors involved in high density / high speed packaging is the choice of dielectric insulating material to be laminated between conductive circuit patterns. The performance of such insulating materials is judged by several insulating properties; for example, dielectric ratio, dielectric strength extinction factor and temperature resistance, chemical resistance, moisture resistance.

Currently, the electrical industry is focused on the use of polyimide and other high performance polymeric materials for single-chip and multi-chip packaging (hybrid), modules and multilayer circuit boards.

[0005]

Although such materials have relatively good dielectric properties, they are often difficult to work with. Polyimides and other polymeric materials typically exhibit some process problems such as substrate and / or inner layer adhesion, bubble formation, pinhole formation, water absorption and substrate deflection, all of which in circuit arrays. It can cause serious defects.

For use as a dielectric insulator, polyimide is typically in the form of a viscous liquid and is applied over conductive circuits. It is then cured at elevated temperatures during the viscous liquid polyimide curing process. During the curing process, the polyimide exhibits a chemical reaction known as imidization, as well as chemical reaction by-products (H ₂ O) and solvent gassing.

Gas evolution typically produces film bubbles such as bubbles or pinholes. During the curing process, the polyimide also exhibits a skinning effect that exacerbates the bubble problem caused by outgassing. The generated bubbles and pinholes will cause serious defects in the circuit array.

Polyimides also exhibit internal layer adhesion problems resulting from moisture collected between the polyimide layers. In a polyimide multilayer system, the individual polyimide layers remain distinct from one another. In such a polyimide multilayer system, it is difficult to maintain intimate contact between the individual polyimide layers during the process, as moisture vapor tends to collect in any bubble areas between the layers. During the rapid temperature rise during the curing process, moisture converts to steam and spreads, separating the polyimide layers.

In order to avoid such problems, a careful drying cycle is carried out to remove the moisture before curing, but the problems still occur.

Polyimide has an even higher water absorption ratio (percent (3%)), which causes other problems.
Water absorption adversely affects the dielectric properties of polyimide. The polyimide dielectric ratio increases significantly with increasing moisture content. (Increasing the dielectric ratio means decreasing the dielectric strength)

In addition to polyimides, other polymeric materials also have higher than ideal dielectric ratios for high density / high speed circuit arrays. High dielectric constant materials tend to reduce signal integrity in high speed / dense circuits.

Polyimides also have a tendency to corrode copper due to the presence of polyamic acid. Since the thinnest thin film circuits are formed from copper plating, such corrosion problems will introduce other deficiencies.

Accordingly, it is an object of the present invention to overcome the above problems commonly present in conventional dielectric insulating materials by reducing and stabilizing the dielectric ratio.

[0014]

The present invention provides a "Teflon P".
Uses "FA" or "Teflon FEP" resin as an extremely low dielectric constant insulator for laminated thin film circuits, TAB tapes (TAB tapes), multi-chip modules and hybrids in single and multi-chip semiconductor packaging. is there.

"Teflon PFA" and "Teflon FE"
Both P "are within the scope of the invention, but" Teflon PFA "is particularly preferably used.
"Teflon PFA" and "Teflon FEP" retain the excellent dielectric properties of typical "Teflon" compounds such as "Teflon PTFE", but unlike conventional "Teflon" compounds, they are not It has special chemical properties that allow it to be molded and joined. "Teflon PFA"
And the melting process properties of "Teflon FEP" allow such materials to be easily processed in applications for thin film circuits. "Teflon PFA", "Teflon F"
EP "and" Teflon PTFE "and" Teflon "compounds are manufactured by EI DuPont Chemicals.

The present invention includes a single layer or multilayer foam laminated thin film conductive circuit array comprising a rigid substrate having a substantially flat surface. One or more conductive circuit layers are patterned to form a plurality of signal transfer lines supported by the substrate. Electrically connecting one or more conductive post biases with one or more conductive circuit layers to connect one or more insulating dielectric layers of "Teflon PFA" or "Teflon FEP" to the circuit. Array conductive circuit (circuit pattern and post bias)
Alternately stacked between.

A plurality of post biases extend through the one or more dielectric layers and connect the one or more conductive circuit layers in the high density three-dimensional circuit array. A plurality of external conductive bond pads patterned on the outer dielectric layer connect the circuit array to external electrical devices.

The present invention broadly includes a substrate, a dielectric insulating layer of a "Teflon" type material supported on the substrate, a conductive circuit layer supported within the dielectric insulating layer, and through the insulating layer. Laminated electrical circuit array and electrical connection means extending extending to electrically connect portions of the circuit layers to each other and to electrically connect portions of the circuit layers to external devices It exists in the forming method.

The substrate on which the conductive circuit array is laminated may be formed of ceramic, glass-ceramic, metal or other suitable material.

The conductive circuit layers, bond pads and post-bias are formed using conventional positive photoresist and electroplating techniques. Such conventional photoresist and electroplating techniques allow conductive circuits (ie circuit patterns, post-bias and bond pads) to be formed during the process, either directly on the substrate or on the surface of the dielectric layer. To

"Teflon PFA" or "Teflon FE"
A dielectric layer of P "resin is dry powder coated onto the individual layers of the conductive circuit and then under reduced pressure (less than 200 microns) approximately.
Bake at 315 ° C to melt flow the "Teflon" resin into a uniform thin film layer and embed the circuitry therein.

The melt flowed "Teflon" layer is then wiped to expose the embedded post bias and planarize to obtain a smooth surface to form the next layer of circuitry thereon. In the case of a multilayer circuit array, the other layers of the conductive circuit are formed on the planarized "Teflon" layer.

The stacked circuit array is complete and conductive bond pads are formed on the outer planarized "Teflon" layer to connect the circuit array to external electrical devices.

The present invention uses "Teflon PFA" or "Teflon FEP" as a dielectric insulator in a laminated thin film circuit. Further, the present invention is a "Teflon PF
Including the use of both "A" and "Teflon FEP", particularly preferred is the one utilizing "Teflon PFA".

"Teflon PTFE", which is chemically derived from "Teflon PFA", has long been evaluated for its unrivaled electrical insulation characteristics, but "Teflon PTFE" can be manufactured due to its non-stick characteristics. Due to its difficulty, it was never used in thin film circuit devices.

Such a problem is manifested in a multilayer circuit by the inability to bond one layer of "PTFE" to another layer of "PTFE" as required. "Teflon P
TFE "is a thermoplastic, but behaves like a thermoset, which makes it unsuitable for melt bonding or processing. Parts made from" PTFE "are typically compression molded. (Sintering) or extrusion, and therefore its use in thin film microcircuits is
It was almost impossible.

"Teflon PFA", "Teflon FEP"
And "Teflon PTFE" and "Teflon" compounds are manufactured by EI DuPont Chemicals. The preferred example, "Teflon PFA", is the most novel "P
It is a derivative of TFE. "PFA" is usually "PTF".
It is often confused with "E", which is very misleading. "Teflon PFA" is a general [CF (ORf)
It is a copolymer of perfluorinated vinyl ether and tetrafluoroethylene represented by —CF ₂ (CF ₂ —CF ₂ ) _n ] _m (where ORf represents a perfluoroalkoxy group).

The widely known molecular structure of "PTFE" exhibits the excellent mechanical, thermal, chemical and electrical properties of "Teflon PFA" and has a very low dielectric ratio (k = 2.07).
Perfluoroalkoxy pendant groups improve melt viscosity, allow faster conventional thermoplastic molding and extrusion processes, and further increase mechanical strength at elevated temperatures. Such properties allow "PFA" to bond to itself and other substrates by melt process methods.

The dielectric constant of "Teflon PFA" also remains stable over a wide range of temperature and humidity conditions. Thus, "Teflon PFA" is its precursor "PTF
While retaining the desirable dielectric properties of E ", it can be easily processed due to its melt bonding properties. The melt bonding properties of" PFA "are more important than the polyimides and other dielectric materials currently used in electrical packaging. To provide unique process advantages.

When two or more layers of "PFA" are melt bonded together, they form a single homogeneous film without any distinction between the layers. This is different from the polyimide system, in which the distinction between layers is maintained.

As explained in the prior art, polyimide exhibits not only chemical reaction (imidization) but also gas evolution of reaction by-products and solvent. Gas generation associated with substrate voids creates process problems for polyimides, especially at the elevated temperatures required for polymer cure. Such problems are greatly increased as the polymer cures and forms a skin.
Bubbles are generated, resulting in a fatal defect in the circuit array.

Since "Teflon PFA" is thermoplastic, no solvent is required and no chemical reaction by-products are formed, as in the case of the polyimide system. Since "PFA" melts rather than hardens, no skin effect occurs and allows gassing of the substrate at high process temperatures.

"PFA" solidifies at such high temperatures and the substrate is resealed before contamination occurs. Bubble formation is not typically seen in the fusion bonding process.

If the area is contaminated or has insufficient "Teflon PFA" resin available to provide reflow, pinholes can form in the "Teflon PFA" circuit array system. However, such pinholes can be repaired by proper cleaning and reapplication of a small amount of "PFA" resin. The ability to easily reverse such drawbacks offers significant process advantages over the prior art.

"Teflon PFA" also exhibits other advantages over polyimide systems. Since "PFA" is a system that has already been polyimidized and does not require a solvent, it does not exhibit the volume change exhibited by the polyimide and is not affected by the subsequent induced tensile stress caused by crosslinking and volume change of the polyimide. "PFA" is also a softer, lower modulus resin than polyimide resins, which has the advantage of reducing shear stress.

Since polyimide exhibits chemical changes (imidization), the properties of the resin are based on factors such as aging, solvent ratio, viscosity, cure temperature, ramps, maceration, atmosphere and various other faters. It changes considerably. "PFA"
Does not show such a change, as the resin simply melt flows. "Teflon PFA" is manufactured in very controlled quantities and exhibits high reproducibility.

"Teflon PFA" is also superior in hygroscopicity to polyimide. "Teflon PFA"
Has a hygroscopicity of 0.03% compared to 3% of polyimide (a factor of more than 100 times). Since "PFA" absorbs virtually no water in the melt bond, it does not require a hermetic seal to curd against moisture.

Final device encapsulation can be accomplished by melt sealing a film of "PFA" onto the substrate. Furthermore, sealing against gas migration and RF interference can be achieved by sputter deposition of metal films on "PFA" encapsulated packages. Furthermore, the advantage of "Teflon PFA" over polyimide is that "PFN
"A" is not corrosive copper. In addition, "Teflon P"
FA "has extraordinary low temperature (cryogenic properties) properties that allow it to be used in liquid nitrogen cooling applications.

It should also be noted that the stacked "PFA" circuit array system may operate primarily because it derives a substantial portion of mechanical strength from the rigid substrate. Such a rigid board system may be used, for example, in a conventional printed wiring board (PWB) having no board,
Overcome the problems associated with using the "PFA" in a stand alone system. "Teflon FE
"P" has many of the same properties, so "Teflon PF"
A fluoropolymer that is interchangeable with respect to A ",
It has a lower use temperature (about 200 ° C compared to about 250 ° C for "PFA"), melting point and strength than "PFA". "Teflon F
"FEP" in EP "means fluorinated ethylene propylene.

[0040]

EXAMPLES Examples of the present invention will be described below. FIG. 1 shows an enlarged sectional view of a laminated thin film conductive circuit array using "Teflon PFE" as a dielectric insulator.

The laminated thin film circuit array 10 comprises a rigid substrate having a substantially flat surface 14 and a plurality of conductive circuit layers 1 patterned to form a plurality of signal transmission lines.
6a, b, c, d and e, a plurality of conductive circuit layers 16a,
a plurality of conductive post biases 18a, b, c, d and e electrically connected to b, c, d and e, and alternately stacked between conductive circuit layers 16a, b, c, d and e Multiple melt flowed "Teflon PFE" dielectric layers 2
0a, b, c, d and e. A plurality of conductive post biases 18a, b, c, d and e extend through the plurality of dielectric layers 20a, b, c, d and e and a plurality of conductive circuit layers 16a, b, c, d and The three-dimensional circuit array 10 is densely formed by electrically connecting to e.

A plurality of external conductive bond pads 22 are
Form on the outer layer 20e of "Teflon PFE",
The circuit array 10 is connected to an external electric device.

Substrate 1 which may be formed from ceramic, glass-ceramic, metal or other suitable rigid material
2 is formed of a substantially flat surface 14 on which conductive circuit layers 16a, b, c, d and e and dielectric layers 20a, b,
Alternately stack c, d and e.

"Teflon PFE", "Teflon FE"
P "is a soft thermoplastic material and the" Teflon "circuit array system derives substantial stiffness from the underlying substrate.
Substrate 12 can have any desired thickness suitable for the intended use, as long as the material thickness is sufficient to maintain rigidity.

All conductive circuits of the circuit array (circuit layer 16
a, b, c, d and e, post bias 18a, b,
The c, d and e, and bond pads 22) are formed of copper using conventional positive photoresist and electroplating techniques. Traditional photoresist and electroplating techniques consist essentially of a six step process. That is, a chromium / copper seed layer is deposited on the substrate by a sputter deposition process. The chrome portion of the seed layer is deposited first and has a thickness of about 200
It is ~ 400Å. The chromium portion of the seed layer is important in the context of the present invention because it bonds well to the surface of the underlying Teflon. The copper portion of the seed layer is then deposited and its thickness is about 2000-4000Å.

Then, a positive photoresist material is applied to form a pattern on the surface of the seed layer using a mask and a work overlay. The photoresist layers are applied in different thicknesses to achieve the desired thickness of the particular type of circuit desired. (Approximately 2 to 10 μm for circuit patterns and bond pads, approximately 20 to 10 μm for post bias.
40 μm thick). Positive photoresist is
It is used to realize high-density circuits.

The photoresist layer is then exposed and developed to remove residual developer. Then the circuit (circuit pattern and post-bias) using conventional electroplating process
To form. Both the circuit pattern and the post-bias are formed in the same process, but the post-bias is formed by using a photoresist layer thicker than the photoresist layer used for forming the circuit pattern and is exposed to the outside of the substrate surface and the circuit. Try to extend it.

The final step is to remove the photoresist layer and etch the chrome / copper seed layer, leaving only the electroplated circuitry and the standing post bias on the underlying substrate.

The step of forming a laminated thin film circuit array is a step-by-step laminating step, in which continuous conductive circuit layers and dielectric layers are alternately laminated.

The conductive circuit layer 16a is formed on the flat surface 14 of the rigid substrate 12 by using the photoresist technique and the electroplating technique described above. Further, a plurality of post biases 18a are formed on the surface of the conductive circuit layer 16a by using the photoresist technique and the electroplating technique described above. The post bias 18a is electrically connected to the conductive layer 16a.

Next, dry powder-like "Teflon P"
An insulating dielectric layer 20a of FA "is applied over the conductive circuit (circuit layer 16a and post bias 18a) to substantially or completely embed the conductive circuit within the dielectric layer.

Next, the circuit array is fired at about 315 ° C. (melting point of Teflon) in a substantially vacuum atmosphere (200 μm or less) to melt-flow “Teflon PFA” onto the lower substrate to permanently form a circuit. Solid Teflon P
It is embedded in FA. Preferably, dry powder-like "Teflon PFA" is used, but "Teflon P" is used.
Both "FA" and "Teflon FEP" can be suspended in a solvent, and may be applied in the form of a viscous liquid, or may be used as a film.

When used in the form of dry powder, it is preferable to the one in the form of viscous liquid because a solvent is unnecessary. The use of a solvent is not preferred when forming a multilayer circuit board, as the solvent may evaporate during the heating step, potentially creating defects in the surface of the material.

The "Teflon PFA" layer 20a is applied to about 10
Wipe to a thickness of 30 μm to expose the embedded post bias 18. The flattened and wiped surface ensures a flat surface in forming the next conductive circuit layer.

Next, this step is repeated a plurality of times to form a multilayer circuit array as shown in FIG. As shown in FIG. 1, each of the conductive circuit patterns 16a, b, c, and e formed continuously is electrically connected to each other by a plurality of post biases 18a, b, c, d, and e. Thus, the three-dimensional circuit array 10 is formed.

When the multilayer circuit array 10 for melt-flowing "Teflon PFA" is continuously fired, "Teflon PFA" melt-flows to form a plurality of conductive circuit layers a, b, c, d, and e. A single thin film of the same shape with the embedded film is formed. When the multilayer circuit array 10 is completed, there is virtually no layer distinction between the "Teflon PFA".

After the lamination process is completed, a plurality of external bond pads 22 are formed on the planarized "Teflon PFA" layer 20e using the photoresist technique and the electroplating technique described above. The bond pad 22 is electrically connected to the exposed post bias 18 and connects the circuit array 10 to an external device.

It is common practice to coat the outer circuitry with gold to prevent corrosion of the exposed circuitry. This coating step may be used in the preferred embodiment described above.

As a further application of the present invention, the laminated thin film circuit as described above can be formed on the back side of a single substrate. Such a double-sided circuit array has a single substrate on which both surfaces are flat and on which a circuit array can be formed, and the substrate is efficiently sandwiched between two opposing circuit arrays. ing. Further, such a double sided circuit array comprises means for connecting opposing circuit arrays through the substrate.

Although "Teflon PFA" has been described above as a preferred embodiment of the present invention, "Teflon FEP" can also be used as a preferred embodiment. Although the preferred embodiment has been described above, various changes and modifications can be made within the scope of the present invention.

[Brief description of drawings]

FIG. 1 is an enlarged cross-sectional view of a laminated thin film circuit array of a preferred embodiment of the present invention using "Teflon PFA" as a dielectric insulator.

[Explanation of symbols]

 10 Laminated thin film circuit array 12 Rigid substrate 14 Flat surface 16a, 16b, 16c, 16d, 16e Conductive circuit layer 18a, 18b, 18c, 18d, 18e Conductive post bias 20a, 20b, 20c, 20d, 20e Teflon PFA 22 Conductive bond pad

Claims (12)

[Claims] 1. A substrate, a dielectric insulating layer of a "Teflon" type material supported by the substrate, a conductive circuit layer supported within the dielectric insulating layer, and extending through the insulating layer. And electrically connecting the portions of the circuit layer to each other, and electrically connecting the portion of the circuit layer to an external device. 2. The electric circuit array according to claim 1, wherein the dielectric insulating layer is selected from “Teflon FEP” and “Teflon PFA”. 3. The electric circuit array according to claim 1, wherein the circuit array is a double-sided circuit array, and means for connecting opposite circuit arrays through a common substrate is provided. Stacked electrical circuit array. 4. A rigid substrate having at least one flat surface, at least one conductive circuit layer, at least one insulative dielectric layer of fused Teflon PFA, and at least one of said substrates. Means for alternately stacking said at least one conductive circuit layer and dielectric layer on one flat surface, connecting at least one layer of said conductive circuit to each other, and means for connecting said circuit array to an external device. A laminated thin film electrical circuit layer array comprising. 5. The laminated thin film electric circuit array according to claim 4, wherein the circuit array is a double-sided circuit array,
A laminated thin film electric circuit layer array comprising means for connecting circuit arrays facing each other through a common substrate. 6. A rigid substrate having a substantially flat surface, at least one conductive circuit layer patterned to form a plurality of signal transmission lines, and patterned on the at least one conductive circuit layer, At least one electrically connected to the conductive circuit layer
A plurality of conductive post biases, and at least one insulating dielectric layer fusion-bonded to the at least one conductive circuit layer and the at least one conductive post bias, wherein the at least one conductive post bias is “ Extending through the at least one dielectric layer of Teflon PFA ",
Said at least one conductive and insulating layer is alternately laminated on a flat surface of said substrate, said at least one
Two dielectric layers are wiped and planarized to expose the at least one post bias, the at least one post bias electrically connecting the at least one circuit layer in a three-dimensional circuit array. An insulative dielectric layer and a plurality of external conductive bond pads patterned outside the planarized dielectric layer to connect the circuit array to the external device. And a bond pad electrically connected to the post bias and a thin film conductive circuit array. 7. The laminated circuit array according to claim 6, wherein the circuit array is a double-sided circuit array, and means for connecting opposing circuit arrays through a common substrate. Circuit array. 8. Forming a circuit array, characterized in that a substrate is provided, conductive circuits and layers of "Teflon PFA" are alternately formed on the substrate, and means for connecting the circuit array to an external device are provided. Method. 9. The method for forming a circuit array according to claim 8, wherein in forming the layer made of “Teflon PFA”, the layer of the conductive circuit is covered with “Teflon PFA” powder, and the powder is sufficiently covered. A method for forming an electric circuit array, which comprises heating to melt the powder and wiping the melted powder to expose the circuit. 10. The method for forming an electric circuit array according to claim 9, wherein the powder is placed at a temperature in the range of 300 ° C. to 330 ° C. 11. A step of providing a rigid substrate having a substantially flat plane, a step of depositing a first seed layer of chromium on the substrate, and a second seed layer of copper on the chromium seed layer. A step of depositing a positive photoresist material on the seed layer, patterning a circuit array on the photoresist layer, exposing the photoresist layer and developing, and plasma removing the photoresist layer. A step of electroplating the patterned circuit array on the photoresist layer, a step of peeling off the photoresist layer, and a second layer made of a positive photoresist material on the electroplated circuit. Patterning and forming a post-bias array pattern in the second photoresist layer. Exposing and developing the second photoresist layer; plasma removing the second photoresist layer; electroplating the post-bias array patterned on the second photoresist layer; and the second photoresist. Stripping layers, etching the chromium and copper seed layers, applying a dielectric layer of "Teflon PFA" on the electroplated circuits and post bias, the circuit array In a vacuum atmosphere at about 315 ° C. to melt-bond the “Teflon PFA” on the circuit, the post-bias and the substrate, and wipe the melt-bonding layer made of the “Teflon PFA”. The step of exposing the post-bias array and the electroplating of the fusion bonding layer made of "Teflon PFA". Method for forming a multilayer thin film conductive circuit array comprising the step. 12. The method of forming a laminated thin film conductive circuit array according to claim 11, wherein the step is repeated a plurality of times to form a multilayer thin film circuit array, and the dielectric layer is “Teflon FEP”. A method for forming a laminated thin film conductive circuit array.