JPH0653399A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH0653399A JPH0653399A JP20326892A JP20326892A JPH0653399A JP H0653399 A JPH0653399 A JP H0653399A JP 20326892 A JP20326892 A JP 20326892A JP 20326892 A JP20326892 A JP 20326892A JP H0653399 A JPH0653399 A JP H0653399A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- lead
- external
- terminal portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 239000011347 resin Substances 0.000 claims abstract description 28
- 229920005989 resin Polymers 0.000 claims abstract description 28
- 238000005538 encapsulation Methods 0.000 claims abstract description 7
- 238000005452 bending Methods 0.000 claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 10
- 238000007789 sealing Methods 0.000 abstract description 8
- 239000008393 encapsulating agent Substances 0.000 description 9
- 238000000465 moulding Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000007689 inspection Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000001721 transfer moulding Methods 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】
【目的】 表面実装用樹脂封止型半導体装置のパッケー
ジの構造に関し、製造工程を簡略化すると共に、完成後
のリードの変形を防止することを目的とする。
【構成】 半導体チップ１に電気的に接続された複数の
内部リード３はその長手方向の中間部が下方に屈曲して
なる端子部3aを有し、その端子部3aは樹脂封止体５の底
面から露出している。この端子部3aが外部端子として機
能し、樹脂封止体５の側方に突出する外部リードを持た
ない。
(57) [Summary] [Object] With regard to the structure of a package of a surface-mounting resin-encapsulated semiconductor device, it is an object to simplify the manufacturing process and prevent deformation of leads after completion. [Structure] A plurality of internal leads 3 electrically connected to a semiconductor chip 1 have a terminal portion 3a formed by bending an intermediate portion in the longitudinal direction downward, and the terminal portion 3a of the resin sealing body 5 is provided. It is exposed from the bottom. The terminal portion 3a functions as an external terminal and does not have an external lead protruding laterally of the resin encapsulation body 5.
Description
【０００１】[0001]
【産業上の利用分野】本発明は樹脂封止型半導体装置、
特に表面実装用パッケージの構造に関する。近年、半導
体装置は高密度実装の要求に対応して、そのパッケージ
はリードの微細化・小ピッチ化と共に表面実装型化が進
められている。BACKGROUND OF THE INVENTION The present invention relates to a resin-sealed semiconductor device,
In particular, it relates to the structure of a surface mount package. In recent years, in response to the demand for high-density mounting of semiconductor devices, their packages have been miniaturized and have a small pitch, and have been surface-mounted.
【０００２】[0002]
【従来の技術】従来例を図４を参照しながら説明する。
樹脂封止型半導体装置の表面実装用パッケージとして
は、樹脂封止体の側面二方向に外部リードがあるもので
はＳＯＰ( Small Outline Package ) とＳＯＪ( Small
Outline J-leaded Package )が、又、樹脂封止体の側面
四方向に外部リードがあるものではＱＦＰ( Quad Flat
Package ) とＰＬＣＣ( Plastic Leaded Chip Carrier
) が広く使用されている。ＳＯＰ及びＱＦＰは図４(A)
に示すように外部リード22が樹脂封止体21の側面から
突出し、クランク状に曲げられている。ＳＯＪ及びＰＬ
ＣＣは図４(B) に示すように外部リード23が樹脂封止体
21の側面から突出し、Ｊ字状に内側に曲げられている。
実装面積の点ではＳＯＪ及びＰＬＣＣがＳＯＰ及びＱＦ
Ｐより有利である。2. Description of the Related Art A conventional example will be described with reference to FIG.
As a surface mount package for a resin-encapsulated semiconductor device, SOP (Small Outline Package) and SOJ (Small) are available for packages having external leads on two sides of the resin encapsulant.
Outline J-leaded Package) or QFP (Quad Flat Flat) with external leads on the four sides of the resin encapsulant.
Package) and PLCC (Plastic Leaded Chip Carrier)
) Is widely used. SOP and QFP are shown in Figure 4 (A)
As shown in, the external lead 22 projects from the side surface of the resin sealing body 21 and is bent in a crank shape. SOJ and PL
In CC, as shown in FIG. 4 (B), the external lead 23 is a resin-sealed body.
It projects from the side surface of 21 and is bent inward in a J shape.
In terms of mounting area, SOJ and PLCC are SOP and QF.
Advantageous over P.
【０００３】これらのパッケージの半導体装置は、通
常、次のようにして製造される。多数のリードとこれら
を連結するタイバー、半導体チップを搭載するステージ
（アイランド、ダイパッド等とも呼ぶ）、等からなるリ
ードフレームを使用し、先ずこのリードフレームのステ
ージ上に半導体チップをろう材又は接着剤で固着し、次
にこの半導体チップのボンディングパッドとリードとの
間をワイヤボンディングし、その後、トランスファーモ
ールド法により樹脂封止を行って樹脂封止体を形成し、
外部リードの半田メッキ、樹脂封止体への捺印、更に樹
脂除去、タイバー切断、リード切断、リード曲げ、検査
等の工程を経て、完成する。The semiconductor devices of these packages are usually manufactured as follows. A lead frame composed of a large number of leads, a tie bar connecting them, a stage on which a semiconductor chip is mounted (also called an island, a die pad, etc.) is used. Then, wire bonding is performed between the bonding pad and the lead of this semiconductor chip, and thereafter, resin sealing is performed by the transfer molding method to form a resin sealing body,
The process is completed through steps such as solder plating of external leads, marking of resin encapsulant, resin removal, tie bar cutting, lead cutting, lead bending, and inspection.
【０００４】[0004]
【発明が解決しようとする課題】ところが、このような
パッケージの樹脂封止型半導体装置は、その製造工程、
特にモールド成形後の外部リードの加工工程が複雑であ
ると共に複雑な設備を必要とする（特にＳＯＪ及びＰＬ
ＣＣにおけるＪ曲げは段階的に成形しなければならない
から複雑となる）、完成後のハンドリングでリードが変
形し易い（特にＳＯＰ及びＱＦＰ）、等の問題があっ
た。However, the resin-encapsulated semiconductor device having such a package has a manufacturing process
In particular, the external lead processing process after molding is complicated and requires complicated equipment (especially SOJ and PL
There are problems that the J-bending in CC is complicated because it must be formed stepwise, and the leads are easily deformed by handling after completion (especially SOP and QFP).
【０００５】本発明はこのような問題を解決して、製造
工程を簡略化すると共に、完成後のリードの変形を防止
することが可能な樹脂封止型半導体装置を提供すること
を目的とする。An object of the present invention is to solve the above problems and to provide a resin-sealed semiconductor device capable of simplifying the manufacturing process and preventing deformation of the leads after completion. .
【０００６】[0006]
【課題を解決するための手段】この目的は、本発明によ
れば、半導体チップに電気的に接続された複数の内部リ
ードはその長手方向の中間部が下方に屈曲してなる端子
部を有し、該端子部は樹脂封止体の底面から露出してお
り、該樹脂封止体の側面から突出する外部リードを有し
ないことを特徴とする樹脂封止型半導体装置とすること
で、達成される。According to the present invention, a plurality of internal leads electrically connected to a semiconductor chip have a terminal portion in which a middle portion in the longitudinal direction is bent downward. However, the terminal portion is exposed from the bottom surface of the resin encapsulant and does not have an external lead protruding from the side surface of the resin encapsulant. To be done.
【０００７】[0007]
【作用】本発明の半導体装置は外部リードがないから、
モールド成形後に樹脂除去、タイバー切断、リード曲げ
を行う必要はなく、従って製造工程は簡略化されると共
に製造設備も少なくて済む。尚、リードフレームの加工
工程において内部リード部分の曲げ加工を必要とする
が、この曲げはステージ部分を下げる加工と同時に行な
えるから、工程追加とはならない。Since the semiconductor device of the present invention has no external lead,
It is not necessary to remove the resin, cut the tie bar, and bend the lead after molding, so that the manufacturing process is simplified and the manufacturing equipment is reduced. It should be noted that the lead frame processing step requires bending of the internal lead portion, but this bending can be performed at the same time as the step of lowering the stage portion, so no additional step is required.
【０００８】又、本発明の半導体装置の外部端子は内部
リードの中間部だけを樹脂封止体から露出させたもので
あり、片持ちではない（内部リードの両端部が樹脂封止
体の中に埋め込まれている）から、完成後のハンドリン
グで変形することはない。The external terminals of the semiconductor device of the present invention are formed by exposing only the intermediate portion of the inner lead from the resin encapsulant, and are not cantilever (both ends of the inner lead are inside the resin encapsulant). Embedded in), it will not be deformed in handling after completion.
【０００９】更に、本発明の半導体装置は樹脂封止体の
側面に外部リードがないから、その分だけ実装面積が減
り、実装密度を高めることが出来る。Further, since the semiconductor device of the present invention has no external lead on the side surface of the resin encapsulant, the mounting area can be reduced accordingly and the mounting density can be increased.
【００１０】[0010]
【実施例】本発明に係る樹脂封止型半導体装置の実施例
を図１乃至図３を参照しながら説明する。EXAMPLE An example of a resin-sealed semiconductor device according to the present invention will be described with reference to FIGS.
【００１１】図１は本発明の実施例の説明図であり、
(A) は断面図、(B) は下面図である。同図において、１
は半導体チップ、２はステージ、３は内部リード、４は
ボンディングワイヤ、５は樹脂封止体である。FIG. 1 is an explanatory view of an embodiment of the present invention.
(A) is a sectional view and (B) is a bottom view. In the figure, 1
Is a semiconductor chip, 2 is a stage, 3 is an internal lead, 4 is a bonding wire, and 5 is a resin sealing body.
【００１２】内部リード３は、その内側先端が半導体チ
ップ１の近傍にあり、外側先端は樹脂封止体５の側面に
略一致している。この両端部の高さは等しいが、中間部
は下方に屈曲して一部が樹脂封止体５の底面から僅かに
（その板厚程度）突出して露出している。この部分が端
子部3aであり、これが従来の樹脂封止型半導体装置にお
ける外部リード22, 23（図４参照）に相当する外部端子
となっている。従って、この半導体装置には樹脂封止体
５の側面から突出する外部リードはない。The inner lead 3 has an inner tip near the semiconductor chip 1, and an outer tip substantially coincides with the side surface of the resin encapsulation body 5. Although both ends have the same height, the middle part is bent downward and a part thereof is slightly projected (about its plate thickness) from the bottom surface of the resin sealing body 5 to be exposed. This portion is the terminal portion 3a, which is an external terminal corresponding to the external leads 22 and 23 (see FIG. 4) in the conventional resin-sealed semiconductor device. Therefore, this semiconductor device has no external lead protruding from the side surface of the resin sealing body 5.
【００１３】図２は本発明の半導体装置の製造工程説明
図である。先ず、リードフレーム11を準備する（図２
(a) 参照）。このリードフレーム11は、半導体チップ１
を載置するためのステージ２と、これを包囲するように
配設された多数の内部リード３と、この多数の内部リー
ド３をその外側先端で連結するタイバー12等からなり、
外部リードはない。ステージ２は内部リード３の両端部
より低い位置にあり、内部リード３は中間部が下方に屈
曲している。FIG. 2 is an explanatory view of the manufacturing process of the semiconductor device of the present invention. First, the lead frame 11 is prepared (see FIG. 2).
(See (a)). This lead frame 11 is a semiconductor chip 1.
And a tie bar 12 connecting the plurality of internal leads 3 with their outer ends, and the like.
There are no external leads. The stage 2 is located lower than both ends of the inner lead 3, and the middle portion of the inner lead 3 is bent downward.
【００１４】このリードフレーム11のステージ２に半導
体チップ１をろう材又は接着剤で固着し、更にこの半導
体チップ１のボンディングパッドと内部リード３との間
をボンディングワイヤ４で接続し、その後、これを上型
13と下型14からなるモールド金型15にセットする。尚、
この下型14のキャビティ部分の周縁部には深さがリード
フレーム11の板厚程度の凹部14a が設けられており（図
３参照）、内部リード3aの屈曲部（即ち端子部3a）をこ
の凹部14a に入れる（図２(b) 参照）。The semiconductor chip 1 is fixed to the stage 2 of the lead frame 11 with a brazing material or an adhesive, and the bonding pad of the semiconductor chip 1 and the internal lead 3 are connected with a bonding wire 4, which is then used. The upper mold
It is set in a mold 15 composed of 13 and a lower mold 14. still,
A recess 14a having a depth of about the plate thickness of the lead frame 11 is provided in the peripheral portion of the cavity of the lower mold 14 (see FIG. 3), and the bent portion of the inner lead 3a (that is, the terminal portion 3a) is Insert it in the recess 14a (see FIG. 2 (b)).
【００１５】このモールド金型15を用いてトランスファ
ーモールド法により樹脂成形して樹脂封止体５を形成
し、モールド金型15から取り出す（図２(c) 参照）。そ
の後、内部リード３の端子部3aの半田メッキ、樹脂封止
体５への捺印、リードフレーム11の切断（タイバー12
等、樹脂封止体５から突出している部分の除去）、検査
等の工程を経て、樹脂封止型半導体装置が完成する（図
１(A) 参照）。Using this molding die 15, resin molding is performed by a transfer molding method to form a resin encapsulation body 5, which is taken out from the molding die 15 (see FIG. 2 (c)). After that, solder plating of the terminal portion 3a of the internal lead 3, marking on the resin sealing body 5, cutting of the lead frame 11 (tie bar 12
Etc., the resin-sealed semiconductor device is completed through the steps such as the removal of the portion protruding from the resin-sealed body 5) and the inspection (see FIG. 1A).
【００１６】本発明は以上の実施例に限定されることな
く、更に種々変形して実施することが出来る。The present invention is not limited to the above embodiments, but can be implemented with various modifications.
【００１７】[0017]
【発明の効果】以上説明したように、本発明によれば、
外部端子を外部リードに代えて内部リードの中間部を樹
脂封止体から露出させたものとすることにより、製造工
程を簡略化すると共に、完成後のリードの変形を防止す
ることが可能な樹脂封止型半導体装置を提供することが
出来、半導体装置の製造コスト低減、表面実装の信頼性
向上等に寄与する。As described above, according to the present invention,
A resin that can simplify the manufacturing process and prevent deformation of the lead after completion by replacing the external terminal with the external lead and exposing the intermediate portion of the internal lead from the resin encapsulant. A sealed semiconductor device can be provided, which contributes to reduction in manufacturing cost of the semiconductor device, improvement in reliability of surface mounting, and the like.
【図１】 本発明の実施例の説明図である。FIG. 1 is an explanatory diagram of an example of the present invention.
【図２】 本発明の半導体装置の製造工程説明図であ
る。FIG. 2 is an explanatory view of the manufacturing process of the semiconductor device of the present invention.
【図３】 本発明の半導体装置製造用のモールド金型を
示す図である。FIG. 3 is a diagram showing a molding die for manufacturing a semiconductor device of the present invention.
【図４】 従来例の説明図である。FIG. 4 is an explanatory diagram of a conventional example.
１ 半導体チップ ２ ステージ ３ 内部リード 3a 端子部 ４ ボンディングワイヤ ５ 樹脂封止体 11 リードフレーム 12 タイバー 13 上型 14 下型 14a 凹部 15 モールド金型 21 樹脂封止体 22, 23 外部リード 1 semiconductor chip 2 stage 3 internal lead 3a terminal part 4 bonding wire 5 resin encapsulation body 11 lead frame 12 tie bar 13 upper die 14 lower die 14a recess 15 mold die 21 resin encapsulation body 22, 23 external lead
Claims (1)
複数の内部リード(3) はその長手方向の中間部が下方に
屈曲してなる端子部(3a)を有し、 該端子部(3a)は樹脂封止体(5) の底面から露出してお
り、 該樹脂封止体(5) の側面から突出する外部リードを有し
ないことを特徴とする樹脂封止型半導体装置。1. A plurality of internal leads (3) electrically connected to a semiconductor chip (1) has a terminal portion (3a) formed by bending a longitudinal middle portion thereof downward, (3a) is exposed from the bottom surface of the resin encapsulation body (5), and has no external lead protruding from the side surface of the resin encapsulation body (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20326892A JPH0653399A (en) | 1992-07-30 | 1992-07-30 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20326892A JPH0653399A (en) | 1992-07-30 | 1992-07-30 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0653399A true JPH0653399A (en) | 1994-02-25 |
Family
ID=16471233
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20326892A Pending JPH0653399A (en) | 1992-07-30 | 1992-07-30 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0653399A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987006790A1 (en) * | 1986-04-25 | 1987-11-05 | Yokogawa Medical Systems, Ltd. | Ultrasonic transducer |
| US5592019A (en) * | 1994-04-19 | 1997-01-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and module |
| US6753599B2 (en) | 2001-02-12 | 2004-06-22 | Samsung Electronics Co., Ltd. | Semiconductor package and mounting structure on substrate thereof and stack structure thereof |
| JP2005277434A (en) * | 2005-05-09 | 2005-10-06 | Renesas Technology Corp | Semiconductor device |
-
1992
- 1992-07-30 JP JP20326892A patent/JPH0653399A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1987006790A1 (en) * | 1986-04-25 | 1987-11-05 | Yokogawa Medical Systems, Ltd. | Ultrasonic transducer |
| US5592019A (en) * | 1994-04-19 | 1997-01-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and module |
| US6753599B2 (en) | 2001-02-12 | 2004-06-22 | Samsung Electronics Co., Ltd. | Semiconductor package and mounting structure on substrate thereof and stack structure thereof |
| JP2005277434A (en) * | 2005-05-09 | 2005-10-06 | Renesas Technology Corp | Semiconductor device |
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