JPH0653246A - Manufacture of field effect transistor - Google Patents

Abstract

PURPOSE:To provide a method for manufacturing with high reliability at a low cost a FET for high frequency amplifier having a gate electrode with a T-shaped section which has a thin leg portion and a thick top portion. CONSTITUTION:A passivation film 9 is formed on the whole surface of an operation film formed on a semiconductor substrate 1, a first resist film 5 is formed on the whole surface of the passivation film 9, an opening for forming a thin leg portion 8a of a gate electrode 8 is provided on a first resist film 5, the passivation film 9 exposed by the opening is etched away with the first resist film 5 as a mask, an electrode material 10 is laminated on the semiconductor substrate 1 exposed therefrom and patterning is performed using a second resist film 11, the first and second resist film 5 and 11 are removed, and the gate electrode 8 having a T-shaped section with a thin leg portion 8a and a thick top portion 8b is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a field effect transistor (hereinafter referred to as FET). More specifically, the present invention relates to a method of manufacturing a FET gate electrode having a T-shaped cross section in which a lower portion on a semiconductor substrate side is thin and an upper portion is thick, which is a gate electrode of an FET used at high frequency. What is T-shaped here?
This also includes mushroom shapes.

[0002]

2. Description of the Related Art In recent years, satellite broadcasting has become widespread, but a converter for satellite broadcasting receivers requires a low noise and high gain amplifier in the microwave band. In order to realize an amplifier with low noise in this high frequency band, particularly in the microwave band, there is a demand for an FET that simultaneously satisfies the reduction of the gate length and the reduction of the gate resistance. Therefore, the gate electrode of this type of FET is formed in such a shape that the lower portion on the semiconductor substrate side is thinned to shorten the gate length and the upper portion is thickened to reduce the gate resistance.
Its cross-sectional shape is T-shaped.

An example of a conventional method for manufacturing a field effect transistor having a gate electrode having a T-shaped cross section will be described with reference to FIG. First, the operating layer formed on the semiconductor substrate 21.
A passivation film 20 made of SiN is formed on 21a by a plasma CVD method or the like. On this passivation film 20, for example, a resist film for electron beam (EB) is applied and patterned by direct writing of the electron beam, and the SiN film is etched to form a groove 22 for forming a gate lower part. After this, further etching is performed to form the recess 27 (see FIG. 2A).

Next, after removing the resist film for EB, a resist film 23 is formed on the entire surface of the passivation film 20 by applying a photoresist, and an opening 24 is formed at the place where the gate electrode 25 is formed by exposure and development. The recess 27 part is exposed. Then, the gate metal 26 is vapor-deposited on the entire surface. As a result, the gate metal 26 is vapor-deposited inside the opening 24 at the portion where the opening 24 is formed in the resist film 23 and at the portion where the opening 24 is not formed (see FIG. b)). After that, the gate metal 26 on the resist film 23 is also removed (lift off) by removing the resist film 23 with, for example, acetone, and the lower part 25a of the gate electrode 25 is thin, the upper part 25b is thick, and the gate electrode has a T-shaped cross section. Are formed on the semiconductor substrate 21.

On the other hand, in order to avoid the two lithography steps of forming the groove 22 and forming the opening 24, the T-shaped gate electrode is formed without forming the passivation film, and then the passivation film is formed. Methods have also been proposed. That is, as shown in FIG. 3 (a), a resist film 23 such as an electron beam resist is formed on the surface of the semiconductor substrate 21 on which the operating layer 21a is formed, and a step is formed by a focused ion beam drawing and an electron beam drawing. The opening 24 is formed, and the gate metal 26 is formed by vapor deposition or the like. Then, the resist film 23 is removed and the passivation film 20 is formed on the entire surface (FIG. 3 (b)).

In any of these methods,
In order to improve the breakdown voltage between the gate and the drain, a so-called wide area recess method in which a wide concave portion is formed in advance on the surface of the operation layer 21a of the semiconductor substrate 21 at the formation position of the gate electrode is also adopted.

[0007]

According to the above-described method of forming a passivation film in advance, the height of the lower portion of the gate electrode is determined by the thickness of the passivation film formed first on the semiconductor substrate, and this passivation film is formed. If the thickness is large, a deep groove 25c is formed in the upper part of the gate electrode, and a step break A is likely to occur between the corner 25d of the step and the groove 25c. Further, when the thickness of the passivation film is reduced, there is a problem that the gap between the thicker portion of the upper portion 25b of the gate electrode and the semiconductor substrate is narrowed, and the capacitance is increased.

On the other hand, in the method of forming the passivation film after the formation of the T-shaped gate electrode, the formation of the passivation film causes less damage to the surface of the operating layer and the T-shaped gate electrode, and isotropic. There is also a problem that a special apparatus such as photo-CVD that enables various film formations is required.

In view of the above problems, the present invention provides a special device for an FET in which a breakdown voltage between a gate and a drain is high and a passivation film is formed on the entire surface of a semiconductor substrate including an operation region below a T-shaped gate electrode. It is an object to provide a method of manufacturing in a simple process that does not require it.

[0010]

A method of manufacturing a field effect transistor according to the present invention comprises: (a) forming a passivation film over the entire surface of a semiconductor substrate having an operating layer formed on the surface; and (b) forming a surface of the passivation film. A first resist film is formed on the entire surface, and then an opening for forming a thin leg portion of the gate electrode is provided at a place where the gate electrode is formed.
(c) the passivation film exposed by the opening is removed by etching using the resist film as a mask,
(d) A gate electrode material is laminated over the entire surface of the semiconductor substrate, (e) a second resist film is formed on the upper surface of the electrode material layer and patterned, and then the electrode is formed using the second resist film as a mask. It is characterized in that the material layer is etched to form a thick top portion of the gate electrode, and (f) the first and second resist films are removed to form a gate electrode having a T-shaped cross section.

[0011]

According to the present invention, the passivation film is first formed, and then the passivation film is etched using the resist film pattern for forming the gate electrode. Therefore, the passivation film is formed after the gate electrode is formed. The gate electrode having a passivation film around it can be formed at low cost by a simple process. Furthermore, since the passivation film is not in contact with the bottom surface of the thick top portion of the gate electrode, the gate capacitance can be reduced.

In addition, after forming the recess in the gate region, the recess surface is immediately covered with the gate metal without exposing it to a resist or a developing solution in the lithography process. Therefore, the interface between the gate electrode and the operating layer and the bottom surface of the recess near the gate electrode are cleaned. Kept in.

[0013]

Next, a method of manufacturing an FET having a gate electrode having a T-shaped cross section, which is an embodiment of the present invention, will be described with reference to the drawings. FIG. 1 shows an embodiment F of the present invention.
It is a section explanatory view showing a manufacturing process of ET.

First, an impurity-containing semiconductor layer serving as an operating layer is formed on the surface of a semiconductor substrate, a source electrode 3 and a drain electrode 4 are formed on both ends of the semiconductor layer, and wide recesses are formed if necessary, and passivation is performed on the entire surface. A film is formed (see FIG. 1 (a)). As a specific example, semi-insulating Ga
An n-type GaAs layer 2 is epitaxially grown on the surface of the As substrate 1, and both ends thereof are etched to form a mesa-type operating layer having a trapezoidal cross section. After that, the source electrode 3 and the drain electrode 4 are formed using the Au-Ge film.

As the operating layer, in addition to the n-type GaAs layer, A
A heterojunction structure of 1 GaAs and GaAs or InGaAs may be used.

If necessary, the n-type GaAs layer 2 is patterned and etched with a photoresist film at the place where the gate electrode is formed to form a wide recess 12 which is a wide recess. It is preferable to form the wide area recess 12 in order to improve the breakdown voltage between the gate and the drain. Then, a passivation film 9 made of SiN or the like is formed thereon by the ECR method.

Next, on the upper surface of the passivation film 9,
A first resist film is formed, and an opening for forming a thin leg portion of the gate electrode is provided at the place where the gate electrode is formed. As a specific example, an electron beam (E
A positive resist for B) is applied to form the first resist film 5, and the opening 6 is formed in the first resist film 5 by irradiating only the place where the gate electrode is formed with an electron beam and developing.
The passivation film 9 is exposed. The first resist film is not an electron beam resist, but an ordinary photoresist may be used to form the opening by light exposure and development. Further, subsequently, the exposed passivation film 9 is removed by etching by the reactive ion etching (RIE) method using the resist film having the opening 6 formed as a mask (see FIG. 1B).

Next, a gate electrode material is laminated on the entire surface,
An electrode material layer 10 is formed in the opening and on the first resist film.
Are formed (see FIG. 1 (c)). As a specific example, the semiconductor layer exposed from below the removed passivation film 9 is
Wet etching is performed to form the gate recess 13. Subsequently, T as an electrode material is formed by vapor deposition or sputtering.
The i, Pt, and Au films are laminated to form the electrode material layer 10. The electrode material layer 10 is formed of three layers of Ti, Pt, and Au because when the Au film is directly formed on the GaAs layer, it easily reacts with the semiconductor layer, and the Ti film has a stable interface with the semiconductor layer. A suitable Pt film is to prevent Au from diffusing into the GaAs layer through the Ti film. When the electrode material is laminated by vapor deposition, the portion where the opening 6 is formed in the first resist film 5 is laminated on the gate recess 13 to form a T film.
The first resist film 5 is formed where the leg portion 8a of the gate electrode having a V-shaped cross section is formed and the opening 6 is not formed.
It is stacked on top (see Fig. 1 (c)).

Next, a second resist film is formed on the gate electrode material layer 10 and patterned, and then the electrode material layer 10 is etched using the patterned second resist film 11 as a mask to form a gate electrode. To form a thick top portion 8b. As a specific example, a photoresist or the like is applied to form a second resist film 11, and the second resist film 11 is patterned to leave the second resist film 11 only on the top portion of the gate electrode (see FIG. 1 (c)). The portion of the electrode material layer 10 without the second resist film is removed by ion milling or the like in which atoms or the like are irradiated. For the second resist film 11, an electron beam resist other than the photoresist can be used.

Next, the first resist film 5 and the second resist film 11 are removed using acetone. As a result,
Gate electrode 8 having a T-shaped cross section formed on the GaAs layer 2
Only remains (see Figure 1 (d)).

After that, by etching the passivation film 9 on the source electrode 3 and the drain electrode 4,
An FET having a gate electrode with a T-shaped cross section is formed.
In addition, in this embodiment, the source electrode 3 and the drain electrode 4 are formed first. However, the source electrode 3 and the drain electrode 4 may be formed in the last step instead of the first step.

In the above-described embodiment, n-type Ga is used as the operation layer.
Although the example using only the As layer has been described, an n ⁺ -type high-concentration region layer may be formed on the n-type layer in order to reduce the resistance between the source-gate electrode and the drain-gate electrode.

Further, the material of the electrode film is Ti, Pt,
It is not limited to the example of the three-layer structure of Au, and may be formed of other metal.

Further, although the example in which the resist film for EB and the photoresist are used as the resist film has been described, the same can be done by using other resists.

[0025]

According to the present invention, a passivation film is formed on the entire surface of a semiconductor substrate, and then an opening for forming a thin leg of a gate electrode is formed in a first resist film.
The passivation film is etched using the resist film with the opening formed as a mask to expose the semiconductor layer and stack the gate electrode material, and then the second resist film is used as a mask to form the thick top part of the gate electrode. Therefore, a gate electrode having a T-shaped cross section can be formed by a simple process. Moreover, since the passivation film is not in contact with the lower surface of the thick top portion of the gate electrode, the gate capacitance can be reduced, and since it is not necessary to form the passivation film after the gate electrode is formed, no special film forming equipment is required. The reliability of the FET is improved without damaging the surface of the operating layer. Furthermore, the breakdown voltage between the drain and the gate can be improved by forming the wide area recess.

[Brief description of drawings]

FIG. 1 is a process cross-sectional view of a method for manufacturing a field effect transistor which is an embodiment of the present invention.

FIG. 2 is a process sectional view of a conventional T-shaped gate forming method.

FIG. 3 is a process cross-sectional view of another example of the conventional T-shaped gate forming method.

FIG. 4 is a diagram illustrating breakage of a conventional T-shaped gate.

[Explanation of symbols]

 1 Semiconductor Substrate 5 First Resist Film 8 Gate Electrode 9 Passivation Film 10 Electrode Material Layer 11 Second Resist Film 12 Wide Area Recess

Claims (2)

[Claims] 1. A passivation film is formed on the entire surface of a semiconductor substrate having an operation layer formed on the surface thereof, and a first resist film is formed on the entire surface of the passivation film, and then a gate electrode is formed. An opening for forming a thin leg portion of the gate electrode is provided at a location where (c) the passivation film exposed by the opening is removed by etching using the resist film as a mask, (d) A gate electrode material is laminated over the entire surface of the semiconductor substrate, (e) a second resist film is formed on the upper surface of the electrode material layer and patterned, and then the electrode material layer is etched using the second resist film as a mask. And (f) removing the first and second resist films to form a gate electrode having a T-shaped cross section. Preparation of the transistor. 2. The method according to claim 1, wherein before forming the passivation film, a wide recess, which is a wide recess, is formed on the surface of the semiconductor substrate where the gate electrode is to be formed.