JPH0646061A - Distributed transmission method - Google Patents

Abstract

(57) [Abstract] [Purpose] To minimize transmission delay and preserve the sequence for distributed transmission. [Structure] Threshold storage unit 14b-1 of transmission-side relay device 14
In advance, a threshold value St that indicates whether the MAC frame 21 should be distributed or transmitted should be set in advance, and the distributed processing unit 14d determines that the number of segments SN constituting the MAC frame 21 is When the threshold value is equal to or more than ST, the MAC frame is divided into blocks obtained by dividing the number of segments by the threshold value, and BPS for maintaining a sequence for each block is added to each block to perform a plurality of transmissions. When the number of segments forming a MAC frame is equal to or less than a threshold value, the MAC frame is not dispersed and is transmitted by one transmission line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a distributed transmission system for distributing a MAC frame composed of a large number of segments to a plurality of transmission lines via a relay device between local area networks (LAN).

[0002]

2. Description of the Related Art LAN (Local Area Network) and WAN
(Wide Area Network) between IWU (Inte
r Working Unit), and LAN-WA by the IWU
A terminal of each LAN (for example, LA
N workstations). In such a communication system, LAN-WA
Since the N-LAN connection is a wide band (for example, 8 Mbps) -narrow band (for example, 1.5 Mbps) -wide band communication, it is an important issue to improve the transmission efficiency of the WAN as an IWU that relays the N-LAN connection. As one method of effectively utilizing limited transmission resources, a MAC frame (a unit of transmission in a block of data communication between LANs, a destination address D
A, a source address SA, data, FCS, etc.) is subdivided and sent to a plurality of transmission lines to disperse the transmission load (distributed transmission method). Generally, there are the following two levels of load balancing: (a) first load balancing using a plurality of transmission lines between adjacent nodes, and (b) second load balancing level using a plurality of network routes.

FIG. 15 is an explanatory view of the first load balancing system, in which 1 and 2 are LANs forming adjacent nodes and 3 is a WAN.
Therefore, two transmission paths A and B are provided between the adjacent nodes. 4 and 5 are LAN and WAN (Wide Area Network)
It is an IWU which is a relay device provided between k). According to the first load balancing method, when there are a plurality of transmission paths between adjacent nodes, one MAC frame is divided and transmitted to improve the transmission efficiency. FIG. 15 shows the simplest network model in the first load balancing method. In load balancing in this network, the transmitting side IWU subdivides one MAC frame and sends it out to two transmission paths, and the receiving side IWU performs Is received and assembled into the original MAC frame. The subdivision is an essential function from the viewpoint of improving the frame transfer capability by hardware, and as described later, the present invention is also premised on the segment transfer by the hardware of the MAC frame.

FIG. 16 is an explanatory diagram of the second load balancing system, in which A to I are relay units (IWU) provided between a LAN and a WAN (not shown), and a to p are transmission lines. According to the second distributed method, when performing communication between two IWUs in a complex network, one MAC frame is divided into several transmission routes and sent out, and the relay IWUs are transmitted as a whole network. This is to improve the transmission efficiency by distributing the traffic well, transmitting it efficiently, and delivering it to the target IWU. Although various studies have been made on this second load balancing system as a packet switching network, the sequence is not guaranteed at the data link layer level and depends on a higher-level protocol. It is in the research stage in transmission network, and recent LAN-WAN
There is a demand for a method of incorporating a concept of connectionless into a WAN from a request for connection and dynamically changing a transmission path to load balance. However, what has been realized at a practical level is load distribution by sequence assignment when a large amount of data is transferred by connecting a fixed transmission line between a host and a specific terminal (printer, fax, etc.). An effective method of non-sequence allocation distribution, which is useful in the case where packets are mixed, has not yet been found.

[0005]

There are the following three problems to be solved in implementing the first load distribution (load distribution between adjacent nodes by a plurality of transmission lines). That is, distributed transmission delay problem (minimization of transmission delay is required) Sequence preservation problem (need to deal with out-of-order occurrence of subdivided frames) Identity problem (same destination / source address) It is necessary to identify the MAC frame when the MAC frames come at the same time). About: The significance of decentralization is diminished unless the transmission delay when load is distributed is smaller than the transmission delay due to a single transmission line. (In the second load balancing method, the significance of traffic distribution that distributes relay frames to other networks. Is more important). Therefore, the load balancing algorithm must achieve the load balancing consistently and at the same time satisfy:
Considering the actual number of transmission paths and the size of the MAC frame to be transmitted, it is necessary to distribute the load so that the transmission time is minimized. However, conventionally, the load is distributed without considering such a situation, and there is a problem that the transmission is distributed in spite of the advantage of the single transmission path transmission, and there is a problem that the transmission time cannot be minimized.

The problem is that the segment transmitted earlier due to the route of the transmission path arrives later than the segment transmitted later. In such a case, the sequence of data needs to be saved because the data order is out of order. Such a problem may occur quite frequently, and conventionally, it is solved by the following sequence allocation. That is, when the MAC frame is subdivided, a sequence number is assigned to each subdivided part (segment frame), and even if the order is reversed on the way, the receiving side identifies this sequence number to identify the original MAC frame. To restore. However, this method has a problem that the IWU on the receiving side needs to look at the sequence number of each segment one by one, the load of the IWU becomes large, and the processing takes time, resulting in a large transfer delay.
Further, if limited to this method, there is a problem that the transmission efficiency is deteriorated by looking at the sequence number, although the sequence is saved when there is only one transmission path. However, there is a problem in which such a point has not been taken into consideration.

In view of the above, the present invention is to provide a distributed transmission system in the first distributed transmission system capable of performing load distribution with variable transmission paths at a practical level. Another object of the present invention is to provide a distributed transmission method capable of minimizing transmission delay and transmitting. Another object of the present invention is to provide a distributed transmission system in which a sequence can be stored simply by assigning a sequence number to each block that is a collection of segments. Still another object of the present invention is to provide a distributed transmission method that can easily solve the problem of identity based on FCS (frame check sequence) for each frame or by preparing a frame identifier for each block. is there.

[0008]

FIG. 1 is a diagram for explaining the principle of the present invention. 11 and 12 are LANs constituting adjacent nodes,
A WAN (network) 13 has n transmission lines TL _{1 to} TL _n provided between adjacent nodes. 14, 1
5 is a relay device (IWU) provided between the LAN and WAN
Is. The transmission side relay device 14 has a threshold storage unit 14
b-1, the distributed processing unit 14d is provided, and the receiving-side relay device 1
5 is provided with a MAC frame assembly processing unit 15g. Reference numeral 21 is a MAC frame.

[0009]

[Function] The threshold storage unit 14b-1 of the transmission-side relay device 14
In advance, a threshold value ST indicating whether the MAC frame 21 should be transmitted in a distributed manner or should be transmitted without being dispersed, and the distributed processing unit 14d sets the MAC frame 21 in a distributed manner.
If the number of segments SN that composes is equal to or greater than the threshold value ST, the number obtained by dividing the number of segments by the threshold value is
When the AC frame is divided into blocks, each block is evenly distributed and transmitted to the plurality of transmission lines TL1 to TLn, and when the number of segments forming the MAC frame 21 is less than or equal to the threshold value, the MAC frame Is transmitted over one transmission line without being dispersed. By doing so, transmission delay can be minimized and distributed transmission can be performed. Further, the distributed processing unit 14d adds the block partition segment BPS to the head of each block, and the total number of segments of the MAC frame and the BPS sequence number indicating the block position from the head to the head BPS added to the head block of the MAC frame 21. , The number of block divisions, the number of segments in each block, and the BPSs of blocks other than the first block including at least the BPS sequence number indicating the block position from the first block. Since the sequence of the segments in the block is maintained, the sequence of the segment of the entire MAC frame can be stored by simply adding a sequence number to each block.

Further, the receiving side relay device 15 is
When the block is received, a reception management table RAT that manages the start address and the number of segments of the block in the memory area storing the block is created for each block based on the information included in the start BPS, and the reception management table RAT is created at the start of each block. Based on the added BPS, the reception management table RAT is referenced to obtain the starting address and the number of segments of the memory area for storing the blocks, and the segments (blocks) corresponding to the number of the segments are sequentially stored in the memory area from the starting address. The original MAC frame is assembled as described above. By doing this, the receiving-side relay device 15 can assemble while saving the sequence of the segment in the original MAC frame only by referring to the sequence number of each block, and the load on the relay device can be reduced and the transfer delay can be reduced. Can be reduced. Also, according to the present invention, F for each frame
The identity of the MAC frame can be easily identified based on CS (frame check sequence) or by preparing a frame identifier for each block.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS When a frame is sent on one transmission line, the sequence of each segment constituting the frame is stored. In the present invention, this characteristic is used to solve the problem of decentralized transmission delay and the problem of identity, and attempts are made to decentralize a frame into a plurality of transmission lines with as little numbering as possible. The approach is as follows: -Concept of block distribution-Evaluation of the relationship between transmission delay and the number of segments and the number of block divisions-The structure of a relay unit (IWU) that realizes block distribution and a specific transmission procedure will be described in this order. That is, first, after explaining what kind of situation the “block distribution method” of the present invention was considered in, the relationship between the transmission delay and the number of segments when the block distribution method was used was qualitatively evaluated. , Optimal design of dividing the MAC frame into blocks according to the result and decentralizing the obtained blocks. After that, the configuration of a relay device and a specific transmission procedure for realizing this method will be described.

(A) Concept of block distribution (see FIG. 1) The sequence of segment frames is guaranteed between the transmission queue of the transmission-side relay device 14 → the transmission path → the reception queue of the reception-side relay device 15. If there are multiple such routes, it may be more efficient to divide the frame consisting of several segments into several blocks that store the sequence and transmit them in parallel. To be For example, a MAC frame 21
(See FIG. 1) is divided into two segment frames (blocks) BL1 and Bl2 each including 50 segments S, and the transmission-side relay device 14 outputs the sequence numbers 1, 2, 3, ... 1 (first transmission line TL
1), sequence numbers 51, 52, 53, ...
.. If 100 is assigned to the second port (second transmission line TL2), the sequence for each port (transmission line) will be saved. These are transferred simultaneously, so 1-100
The delay should be smaller than that in the case where the previous segments are sequence-transferred through one transmission line having the same bandwidth.

Of course, since it is not guaranteed which of the divided blocks will arrive first, it is necessary to perform numbering in block units. Therefore, in the present invention, the block B
A block boundary is identified at the beginning of L1 and BL2, and
Information required to assemble a frame on the called side (block partition segment: hereinafter simply referred to as BPS)
Put. Information such as a block number (BPS sequence number) and a block division number is included in the BPS in the same manner as the parcels of several packages packed when moving. That is, when the relay device 14 on the transmission side divides the segment string (MAC frame) 21 into blocks, the BPS including the block number of each block, the block division number, and the like.
To generate. Then, at the block transmission timing, it is collectively transferred to the transmission queue of each transmission port for each block with BPS. From a firmware point of view, this block batch transfer is important. This is because the delay is smaller than that of sequentially transferring each segment while identifying the port. On the other hand, in the relay device 15 on the receiving side, the buffer area for frame assembly can be secured in advance by the information of the BPS acquired from the reception queue, and the blocks can be collectively transferred from the queuing buffer for each block according to the information. If the latter block arrives first, the block number (B
It is easy to find a valid storage address in the frame assembly buffer by using the PS sequence number), and finally, the MA sequence is exactly the same as the original MAC frame 21 sequence.
C-frames can be restored.

(B) Evaluation of Relationship between Transmission Delay and Number of Segments and Number of Block Divisions Another matter to be considered regarding the blocking method is a delay problem due to blocking work. For example, as an extreme example, considering the case of transferring a MAC frame composed of two segments through two transmission lines, at most one segment is blocked. In the case of transferring such a small frame, the time required for blocking becomes larger than the advantage of the time shortened by parallel transfer, and blocking may not be effective. In other words, the superiority of division depends on the trade-off between the time required for block formation and the time reduction achieved by parallel transfer.

The evaluation formula for the transmission delay required for one frame is
Formula [Transmission delay time] = [Completion time of 1 MAC frame at the relay device on the receiving side]-[Start time of 1 MAC frame division at the relay device on the transmitting side] = [Block division determination time] + [Block setting time] +
It is expressed by [Enqueue time] + [Transmission queue delay time] + [Transmission path delay time] + [Reception queue delay time] + [Dequeue time] + [Frame assembly time]. That is, τ = τ _j + b (τ _HP + τ _HG ) + (s + b) (τ _qi + τ _qo ) + {Σ (τ _1k (t)} / L (k = _1〜 (s + b) ) = A + B + C + D (1)

However, L: number of transmission lines b: number of block divisions s: number of segments τ _j : block division determination time τ _HP : time for setting BPS by dividing, τ _HG : per block Time to assemble BPS by removing BPS τ _qi : Enqueue time per segment τ _qo : Dequeue time per segment τ _1k : Transmission line stay time at that time per segment where A (= τ _j ) is The time required for block division determination, B (= b (τ _HP + τ _HG )) is (the time to block the transmission side to set BPS and associate the BPS with the data block + the BPS is removed from the reception side 1 time to assemble the frame), C (= (s + b) (τ qi + τ qo)) is queued in the (time + reception queue segments of all blocks are queued in the transmission queue Time being grayed), D (= Σ (τ 1k (t) / L) is the time at which .D sections until all segments dequeues receive queue after enqueued in the transmission queue depends on the time It is shown that the fluctuation of the delay occurs depending on the queuing state at that time.Of these, the time required for the above blocking corresponds to the A and B parts, the advantage due to non-dispersion. What is done is the part of D, and C is the part commonly required.

For the sake of simplicity, the transmission line bandwidth for each port is the same. The transmission / reception interrupt control processing is sufficiently faster than the transmission speed (that is, the delay of interrupt control affects continuous transmission). Is not given), the D term of the above delay evaluation formula can be expressed as follows. D = 8 ・ ls ・ (s + b) / L / C ₀・ ・ ・ (2) where C ₀ : Transmission line speed (bit / sec) 1s: Octed length per segment Here, when not blocking The delay (= τ _o ) and the delay when blocking (= τ _b ) are compared. In the case of no blocking, since there are no terms of A and B, b = 0, so τ _o = s (τ _qi + τ _qo ) + 8 · ls · s / C ₀ (3) On the other hand, blocking Τ _b = τ _j + b (τ _HP + τ _HG ) + (s + b) (τ _qi + τ _qo ) +8 ・ ls ・ (s + b) / L / C ₀ = A + B + (s + b) (τ _qi + τ _qo ) + 8 · ls · (s + b) / L / C ₀ (4)

Here, when the extra time required for block dispersion is defined as E = A + B + b (τ _qi + τ _qo ), τ _b = E + s (τ _qi + τ _qo ) + 8 · ls · (s + b) / L / C ₀ ... (4) ′. _{Thus, τ b E <(8 ·} 1s / C 0) when the condition computes τ _b -τ _o <0 for E when it is smaller than tau _o of {s- (s + b) / L} (6) FIG. 2 shows the relationship between s and E with L = b and b as a parameter based on this equation.

The following trends can be read from FIG. That is, the area where block division is effective is when E exists in at least the lower area of the graph of b = 2. Therefore, if the result of measuring the delay time required for distribution when load distribution by block distribution is performed is in this area, it can be determined that block distribution is effective. -Comparing graphs with different numbers of blocks, the margin of E does not increase so much even if the number of blocks increases with the same number of segments. This means that the merit of delay reduction by increasing the number of transmission lines to be dispersed does not necessarily become large. On the other hand, comparing graphs of the same E with different numbers of segments, it can be seen that s with the number of blocks = 2 is not twice as large as s with the number of blocks = 4. Therefore, it can be said that increasing s is more effective in increasing the margin than increasing the block division.

FIG. 3 shows the relationship between the delay time and the number of segments and the number of block divisions expected from the expressions (3) and (4) ′.
Shown in. As can be seen from this, when the number of segments is small, the transmission delay is smaller when the block is not divided, and when the number of segments is large, the advantage of blocking is larger. When the number of segments that determines the superiority of blocking is expressed as a block division threshold value ST, it can be seen that when the number of segments SN is larger than the threshold value ST, the larger the block division number, the smaller the delay.
From these things, the following can be said as a decision to perform block division. When the number of segments SN is smaller than the threshold value ST, the number of block divisions is b = 1. When the number of segments SN is larger than the threshold value ST, the number of ports (the number of transmission lines) = the number of block divisions is used for blocking. To do. The method evaluated here makes bold assumptions, so
It is reasonable to interpret that the results show a qualitative tendency of the delay effect with and without block division. The block division threshold value ST for which the effect of block division is determined to be effective is the number of segments at each straight line intersection in FIG. 3, but may be set slightly larger than this value with a margin in mind.

(C) Configuration diagram of transmission-side relay device FIG. 4 is a configuration diagram of the transmission-side relay device IWU 14, which is an example of the case where there are three transmission lines between adjacent nodes. 1 in the figure
Reference numeral 4a is a segment division unit that divides the MAC frame input from the LAN into segments, and 14b is a block number determination unit that determines whether or not the MAC frame should be divided into blocks, and the number of blocks in the case of division. Threshold storage unit 14b-1 for storing the threshold ST of
And the number of segments SN of the MAC frame input from the segment dividing unit 14a and the size of the threshold value ST are compared. If SN ≦ ST, it is instructed not to divide into blocks (b = 1), and SN> ST In this case, a comparison unit 14b-2 for instructing block division and a block division number calculation unit 14b-3 for calculating the block division number b when SN> ST are provided. Reference numeral 14c is a data buffer for storing MAC frames, 14d is a frame management table FAT based on the number of blocks to be divided b, and a block partition segment BPS attached to the head of each block is generated. A distributed processing unit for deciding whether or not to allocate to a route), a frame management table storage unit 14e for storing a frame management table FAT, 14f
Is a BPS storage unit for storing the BPS of each block, 14g
Is a block transmission order management unit that manages the block transmission order for each port, and includes a queue unit 14g-1, for the first to third ports.
It has 14g-2 and 14g-3. 14h to 14j are first to third transmission control units provided corresponding to the respective ports 14k to 14n, and according to the block transmission order stored in the corresponding queue units 14g-1, 14g-2, 14g-3. The BPS of each block and the segment data of each block are stored in the BPS memory 1
4f, first to third read from the data buffer 14c
The first to third transmission lines TL1 via the ports 14k to 14n
.. to TL3. The data buffer 1
4c, the frame management table storage unit 14e, and the BPS storage unit 14f use one RAM area.

FIG. 5 shows the frame management table FAT and BP.
4A is a diagram for explaining the contents of S, FIG. 9A is a diagram for explaining the contents of the frame management table FAT, FIG. 9B is a diagram for explaining contents of the frame head BPS added to the head block of the frame, FIG.
(c) is an explanatory diagram of contents of BPS added to blocks other than the first block. The frame management table FAT is generated under the control of the distributed processing unit 14d, and has a frame identifier fi
d, a destination address DA, a source address SA, a block division number b, and information of each block, and a port number (transmission path) P for transmitting the block for each block
i (i = 1, 2, 3, ... B), BP of the block
The BPS pointer BPi that points to the head address of the BPS storage section 14f that stores S, the block data pointer DPi that points to the head address of the data buffer-14c that stores the data of the block, and the number of segments Si of the block are managed. Has become.

The BPS added to the head of each block is generated under the control of the distributed processing unit 14d like the frame management table FAT, and the frame head BPS added to the head block is the destination address DA and the source address S.
A, frame head identification code Oxff, cyclic identifier cid, total segment number SN, BPS sequence number Seq indicating the position from the head of the block,
The block division number b, and the port number (transmission path) Pi (i = 1, 2, 3, ... b) for transmitting the block, including the information of each block, and the segment number Si of the block are It is designed to hold. Each BPS added to blocks other than the first block is a destination address DA, a source address SA, a cyclic identifier cid, and B indicating the position from the beginning of the block.
It holds the PS sequence number Seq and the block segment number Si.

FIG. 6 is an explanatory diagram of the respective queue units 14g-1, 14g-2, 14g-3 in the block transmission order management unit 14g. Each queue unit has a ring buffer RBF and a queuing counter QCNT. There is. Ring buffer R
Blocks are queued in the BF in the order of transmission, and a BPS pointer BPi pointing to the BPS storage position of the block corresponding to each block and a segment number Bi of the BPS,
A block data pointer DPi indicating a block data storage position and a block segment number Si are stored. The queuing counter QCNT is incremented each time a block is queued and decremented each time it is dequeued, and the distributed processing unit 14d refers to it during distributed processing so that the number of blocks distributed on each transmission line becomes equal. .

(D) Control of Transmission Side Relay Device FIGS. 7 to 10 are flow charts of control of the transmission side relay device. Block division processing (see FIG. 7) When a MAC frame is input from the LAN, the segment division unit 14a divides the segment into data buffers-1.
4c and stores the total number of segments SN.
When the total number of segments SN of the MAC frame is input from the segment division unit 14a, the block number determination unit 14b compares the block division threshold value ST (preset according to FIG. 3) with the size of the total segment number SN. Then S
In the case of N ≦ ST, it is assumed that the block division is not performed and the block division number b = 1, and in the case of SN> ST, the block division is performed, and the block division number b is calculated by the following equation b = SN / ST ( Step 10
1). In the above equation, the remainder is rounded up, for example, and the block division number b is an integer.

When the block division number b is determined, the distributed processing section 14d secures an area (frame management table storage section 14e) for storing the frame management table FAT, and acquires the head address thereof (step). 1
02). Next, frame identifier fid, destination address DA, source address SA, block division number b
Are sequentially stored from the top address of the frame management table storage section 14e (step 103). Then, the main routine of the distributed processing is executed (step 104).

Distributed processing (see FIGS. 8 and 9) In the main routine of distributed processing, first, i = 1, and then a memory area (BPS) for storing 1 BPS.
Storage part 14f) and secure the start address BPi
Is acquired (step 201). Next, it is judged whether i = 1 (step 202). If i = 1, a frame head BPS is generated. That is, the destination address DA, the source address SA, the frame head identification code Oxff, the cyclic identifier cid, the total segment number SN, and the BPS sequence number Se indicating the position from the head of the block.
q and the block division number b are stored in the BPS storage section 14f (step 203). Thereafter, the number of segments Bi of the frame head BPS is calculated and the head address BPi of the BPS is recorded in the frame management table FAT (steps 204 and 205).

After recording the BPS start address, the start address BP2 to BPb of each block is calculated using the start address of the data buffer 14c and the block division number b and recorded in the frame management table FAT (step 2).
06). Next, the number of segments S1 to Sb in each block
Is calculated and recorded in the frame management table FAT (step 207). The number of segments from the 1st to (b-1) th block is ST, and the number of segments of the last bth block is [SN- (b-1) .ST]. Then, the distributed processing unit 1
4d investigates the count value (initial value is 0) of the queuing counter QCNT of each of the queue units 14g-1 to 14g-3 to find the one having the smallest queuing length (count value), and the queuing length is the highest. The port number Pi corresponding to the small queuing counter QCNT is obtained, and the port number is recorded in the frame management table FAT and the frame head BPS (steps 208 and 209).

Next, the port number Pi, the BPS pointer BPi of the BPS added to the i-th block, and the BPS
Enqueue to the ring buffer RBF of the corresponding queue unit with the number of segments Bi of and the argument as an argument (step 21).
0). Also, the port number Pi and the start address (data pointer) DP of the i-th block in the data buffer
i and the segment number Si of the i-th block are used as arguments to be enqueued in the ring buffer RBF of the corresponding queue (step 211). As described above, the i-th block is queued in the ring buffer RBF of the queue unit corresponding to the port number obtained in step 208. That is, the BPS pointer B pointing to the BPS storage position of the i-th block
The segment number Bi of Pi and BPS, the block data pointer DPi indicating the block data storage position, and the segment number Si of the block are queued (stored) in predetermined queue units.

As described above, when the distributed processing of the i-th block is completed, the distributed processing unit 14d judges whether the distributed processing of all blocks is completed, that is, whether i = b (step 212), i = If it is b, the distributed processing is terminated, and i
If <b, i is incremented by i + 1 → i (step 213), the process returns to step 201 and the subsequent processes are repeated. On the other hand, if i ≠ 1 in step 202, BPS of blocks other than the first block is generated. That is, the destination address DA and the source address S
A, the cyclic identifier cid, the BPS sequence number Seq indicating the position from the beginning of the block, and the block segment number Si are stored in the BPS storage section 14f (step 214). Then, the number Bi of BPS segments is calculated (step 215), the head address BPi of the BPS is recorded in the frame management table FAT (step 216), and then the processing from step 208 is performed.

Transmission processing (FIG. 10) The block transmission order management unit 14g is executed by the above distributed processing .
When the blocks are distributed and queued in the respective queue units, the transmission control units 14h to 14j corresponding to the respective queue units.
Performs the following processing to dequeue blocks in the transmission order and sends them out to the transmission path through the corresponding port to transmit to the receiving side relay device. That is, each transmission control unit 14h
~ 14j is the ring buffer RBF of the corresponding cure section
The pointer and the number of segments are acquired from the pointer, and the number of segments is set as the number of data (steps 301 and 30).
2). For each block, the BPS pointer BPi, the BPS segment Bi, the data buffer pointer DPi, and the block segment number Si are sequentially acquired. Next, it is checked whether the number of data is 0 (step 303). If the number of data is not 0, one segment is read from the address designated by the pointer (BPS pointer or data buffer pointer) and transmitted through the corresponding port. Send to the road (step 304).

After the data of one segment is transmitted, the number of data is decremented (step 305) and the pointer is incremented (step 306). Then, the process returns to step 303 and the subsequent processes are repeated. On the other hand, if the number of data = 0 in step 303, the transmission of 1 BPS or 1 block ends. Then, it is checked whether the transmission of all blocks is completed (step 307), and if not completed, the process returns to step 301 and B to be transmitted next.
After acquiring the PS or block pointer and the number of segments, the subsequent processing is repeated. As described above, in the block order queued in each queue unit, first, the BPS is transmitted to the reception side relay device through the port and the transmission path to which the block corresponds.

(E) Configuration Diagram of Receiving Side Relay Device FIG. 11 is a configuration diagram of the receiving side relay device IWU, and shows an example in which there are three transmission lines TL1 to TL3 between adjacent nodes. In the figure, 15a to 15c are transmission lines TL1 to TL3.
15d to 15f are reception queues for queuing blocks fetched from the ports in the fetching order, 15g is a memory area for storing MAC frames, and a reception management table using the received frame head BPS. A MAC frame assembly processing unit that generates a RAT and restores (assembles) the original MAC frame from the block transmitted using the reception management table RAT, and 15h is a reception management table storage that stores the reception management table RAT Part 15i stores each block while maintaining the original sequence, and finally the MAC
It is a MAC frame storage unit that stores a frame.
The MAC frame assembling processing unit 15g includes processing units 15g-1 to 15g-3 corresponding to each port, and extracts BPS and block data from the corresponding receiving queue in the order of receiving blocks and performs MAC frame assembling processing.

FIG. 12 is an explanatory view of the contents of the reception management table RAT. The reception management table RAT is a MAC frame assembly processing unit 15g based on the frame head BPS.
Generated by the control of the source address SA, the frame head identification code Oxff, the cyclic identifier cid,
The total segment number SN, the BPS sequence number Seq indicating the position from the beginning of the block, the block division number b, and the information of each block are included, and the block port number Pi (i = 1, 2, 3, ...) For each block. b),
The number Si of segments of the block and the start address addi in the MAC frame storage unit 15i that stores each segment data of the block are held. The start address addi is generated as follows with reference to FIG. That is, if the start address of the memory area (MAC frame storage section 15i) for storing the MAC frame is A ₁ , the start address a of the first block is a.
dd ₁ becomes A ₁ and the start address add of the second block
₂ (= A ₂ ) becomes (A ₁ + S ₁ ). However, S ₁ is the number of segments in the first block. Similarly, the start address add ₃ (= A ₃ ) of the third block becomes (A ₂ + S ₂ ), the start address add ₄ (= A ₄ ) of the fourth block becomes (A ₃ + S ₃ ), ... Becomes

(F) MAC Frame Assembling Process FIG. 14 is a flow chart of the MAC frame assembling process by the receiving side relay device. MAC frame assembly processing unit 1
The processing units 15g-1 to 15g-3 in 5g execute the MAC frame assembling processing in parallel according to this flowchart. Each processing unit acquires a segment from the corresponding reception queue in the order of the reception block, and checks whether it is a built-in data counter (initial value is 0) (steps 401 and 40).
2). When the content of the data counter is 0, the segment acquired from the reception queue is judged to be BPS, and then it is judged whether the BPS is the frame head BPS or not by referring to the frame head identification code (step). 403, 40
4). If it is the frame head BPS, the data buffer area (MAC frame storage section 15i) for MAC frame assembly and its head address A1 are secured, and then the frame release processing is performed (steps 405, 40).
6). In the frame release processing, the frame assembled immediately before is subjected to FCS (frame check sequence), and if the FCS is not OK, it is discarded.
This can solve the problem of identity. Then, the reception management table RAT is created and stored in the reception management table storage section 15h (steps 407 and 408). In this case, the head address addi of the area storing each block is calculated and recorded in the reception management table RAT as described with reference to FIG.

When the creation of the reception management table RAT is completed, the head address add ₁ and the block segment number S ₁ are set in a buffer pointer and a data counter (not shown), and the process returns to the beginning. After that, the next segment is fetched from the reception queue (step 401).
Since the content of the data counter is not 0 this time, "NO" is determined in step 402. Therefore, the processing unit 15
g-1 to 15g-3 stores the acquired segment data in the memory area designated by the buffer pointer (step 41).
0). Then, the content of the data buffer pointer is incremented (step 411), the content of the data counter is decremented (step 412), and the process returns to the beginning.
After that, steps 401 → 402 → 410 → 411 → 41
The process 2 is repeated, and finally one block of all the segment data is stored in the designated area of the MAC frame storage section 15i.

All block segment data is MAC
When stored in the frame memory 15i, the content of the data counter becomes 0, and the next segment acquired from the reception queue is determined to be BPS. Since this BPS does not have a frame head identification code, the frame head BP
Not S. The mark frame assembly processing unit 15g determines the source address SA and the cyclic identifier ci included in the BPS.
d, reception management table R using BPS sequence number as key (may use only BPS sequence number as key)
Referring to AT, the start address add ₂ and the segment number S ₂ in the data storage area of the second block are obtained, set in the built-in buffer pointer and data counter, and the process returns to the beginning. After that, steps 401 → 402 → 41
The process of 0 → 411 → 412 is repeated, and finally all segment data of one block (second block) is MAC.
It is stored in a designated area of the frame memory portion 15i.
After that, similarly, the third, fourth ...
It is stored in the C frame storage unit 15i, and finally M
AC frames are continuously stored (assembled) in the MAC frame storage unit 15i, and are sequentially transmitted to the LAN.

In the above, the identity of the MAC frame is determined based on the FCS (frame check sequence) for each frame, but the identity of the MAC frame can be identified by adding the frame identifier to each block. You can also Further, in the above description, the relay devices on the transmitting side and the receiving side are described separately, but each relay device has both a transmitting and receiving configuration. Although the present invention has been described above with reference to the embodiments, the present invention can be variously modified according to the gist of the present invention described in the claims, and the present invention does not exclude these.

[0039]

As described above, according to the present invention, a threshold value ST is set in advance to determine whether a MAC frame should be distributed and transmitted or not, and segments that compose a MAC frame. If the number SN is greater than or equal to the threshold value ST,
MAC to the number obtained by dividing the number of segments by the threshold
When the frame is burro-divided and each block is evenly distributed over a plurality of transmission paths and transmitted, and if the number of segments that make up a MAC frame is less than or equal to a threshold value, the MAC frame is not distributed. Since the transmission is performed using the book transmission line, it is possible to minimize the transmission delay and perform distributed transmission. According to the present invention, the BPS is added to the head of each block, and the total number of segments of the MAC frame, the BPS sequence number indicating the block position from the head, and the block are added to the frame head BPS added to the head block of the MAC frame. BPS indicating the block position from the beginning in the BPS of blocks other than the beginning block, including at least the number of divisions and the number of segments in each block
Since the transmission is performed by including at least the sequence number, the sequence of the segment in each block is maintained, and the sequence of the segment of the entire MAC frame can be stored only by adding the sequence number to each block.

Further, according to the present invention, the frame head BP
When S is received, a reception management table that manages the start address and the number of segments of the block in the memory area storing the block is created for each block based on the information included in the frame start BPS, and the start of each block The reception management table is referred to by using the contents of the BPS added to the key as a key to obtain the start address and the number of segments of the memory area for storing the blocks, and the segments (blocks) corresponding to the number of segments are sequentially arranged from the start address to the memory area. Since the original MAC frame is assembled in such a manner that the original MAC frame is stored in, the original MAC frame can be assembled while storing the sequence by simply referring to the sequence number of each block in the reception processing. The load can be reduced and the transfer delay can be reduced. Further, according to the present invention, the identity of the MAC frame can be easily identified based on the FCS (frame check sequence) for each frame or by preparing the frame identifier for each block.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a relationship diagram between a delay time E due to blocking and the number of segments.

FIG. 3 is a relationship diagram of a transmission delay time and the number of segments and the number of blocks.

FIG. 4 is a configuration diagram of a transmission side relay device of the present invention.

FIG. 5 is an explanatory diagram of contents of a frame management table and BPS.

FIG. 6 is an explanatory diagram of a cue section.

FIG. 7 is a first flow chart (block division processing) of processing by the transmitting-side relay device.

FIG. 8 is a second flowchart (distributed processing) of processing by the transmission-side relay device.

FIG. 9 is a third flowchart (distributed processing) of processing by the transmitting-side relay device.

FIG. 10 is a fourth flowchart (transmission processing) of processing by the transmission-side relay device.

FIG. 11 is a configuration diagram of a receiving-side relay device.

FIG. 12 is an explanatory diagram of contents of a reception management table.

FIG. 13 is an explanatory diagram of storage locations of blocks.

FIG. 14 is a flowchart of a MAC frame assembling process.

FIG. 15 is an explanatory diagram of a first conventional load balancing method.

FIG. 16 is an explanatory diagram of a second conventional load balancing method.

[Explanation of symbols]

11, 12 ··· LAN 13 · · WAN (network) 14 · · Transmission-side relay device (IWU) 14b-1 · · Threshold storage unit 14d · · Distributed processing unit 15 · · Reception-side relay device (IWU) 15g · · MAC frame assembly processing unit 21 · · MAC frame TL ₁ ~TL _n ·· transmission path

Claims (4)

[Claims] 1. A local area network (LAN)
MAC consisting of many segments via a relay device between
In a distributed transmission method in which frames are distributed and transmitted to multiple transmission paths, a threshold value is set for whether or not MAC frames should be distributed and transmitted in advance to a relay device on the transmission side. If the number of segments constituting the MAC frame is equal to or larger than the threshold, the relay device divides the MAC frame into blocks of the number obtained by dividing the number of segments by the threshold, and also divides each block into a plurality of blocks. When the number of segments constituting a MAC frame is equal to or less than the threshold value, the MAC frame is not dispersed and is transmitted by one transmission line. 2. The distributed transmission system according to claim 1, wherein each block is distributed over the transmission lines so that the number of blocks transmitted over each transmission line becomes equal. 3. A block partition segment BPS is added to the head of each block, and the total number of segments of the MAC frame, the BPS sequence number indicating the block position from the head, and the block division are added to the head BPS added to the head block of the MAC frame. Number, the number of segments in each block, and the BPS of blocks other than the first block including at least a BPS sequence number indicating the block position from the beginning for transmission. Transmission method. 4. The relay device on the receiving side, when receiving the head BPS, manages the head address and the number of block segments in the memory area for storing the block for each block based on the information included in the head BPS. When the BPS added to the head of each block is received, the reception management table is referred to based on the BPS, and the start address of the memory area for storing the block and the number of block segments are stored. 4. The distributed transmission system according to claim 3, wherein a MAC frame is assembled by obtaining and storing segments of the number of segments in the memory area in order from the head address.