JPH0638507B2 - Surge absorber - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a surge absorbing element for protecting a protected device from an abnormal voltage caused by various surge factors such as lightning, switching surge, etc. Surge absorption element used, suitable for absorbing common mode surges that may occur between each transmission line consisting of a pair of lines and ground, and normal mode surges that may occur between a pair of transmission lines Regarding the device.

<Prior Art> A surge absorbing element is formed by forming an equivalent low-impedance current line in itself in the subsequent process when a high voltage higher than a specified voltage value called “breakdown voltage” is applied. , Which absorbs a large current due to the high voltage and clamps the voltage across the element and below a certain voltage value so that the protected device to be protected is not affected by abnormal voltage. Most of the equipment provided for the avalanche had a mechanism of avalanche breakdown.

That is, the avalanche breakdown voltage when a reverse bias is applied to the diode structure of the pn junction or the diode connection structure of the transistor is defined as the breakdown voltage as the surge absorbing element.

However, such an "avalanche breakdown type" surge absorbing element has various drawbacks as described in detail in, for example, JP-A-62-65383. Therefore, as described in the publication, In the early stage of surge absorption, the "punch through phenomenon" is used instead of avalanche breakdown, and then
An element having a negative characteristic (breakover characteristic) due to the positive feedback phenomenon has been proposed.

In this punch-through type surge absorber, the polarity of the surge to be absorbed is limited, and it is a "unipolar" surge absorber, but surge is applied between a pair of terminals, causing a break-over from punch-through operation. When it reaches, the clamp voltage between the pair of terminals is considerably low,
Can absorb large current surges. In addition, measures to prevent the follow-up effect in which the clamp voltage becomes extremely low and the pair of terminals remain conductive even after the surge disappears are posted. In addition to the region, there is also a pn junction that is reverse-biased in series, and its avalanche breakdown voltage or zener voltage is used to intentionally increase the clamp voltage, which tends to be extremely low.

<Problems to be Solved by the Invention> In the punch-through type surge absorbing element as described in the above publication, not only a constant voltage characteristic but a break
Since it exhibits the over characteristic, it can absorb a large current, and has a relatively large degree of freedom with respect to, for example, the value of the break over current and the design of the punch through voltage. However, if the surge applied between a pair of terminals has a predetermined polarity and cannot absorb it, in reality, for example, when it is used to protect a transmission line such as a communication line, many surges are required even for one line. I had to use a device. That is,
Since the transmission line generally has a pair of lines, it absorbs a common mode surge between each line and ground, and a normal mode surge between the lines, and
In order to be able to deal with both positive and reverse surge polarities, one pair of surge absorbing elements connected in opposite directions must be set, and three pairs (six in total) must be used. It was

In addition, since the breakdown voltage for each set cannot be made exactly the same, for example, when a common mode surge is applied, either one of the pair of surge absorbing elements connected between one line and ground breaks first. If it exceeds, neither of the pair of surge absorbing elements connected between the other line and the ground will break over yet, so a large line voltage will be generated between the lines at that moment, and in this state, the surge voltage Rises further and is not resolved until one of the surge absorbing elements of the set connected between the other line and ground breaks over.

In view of the conventional situation as described above, the present invention is a three-terminal type surge absorption element capable of achieving surge protection for one transmission line with a single element in the basic structure, that is, which of these three terminals is used. Even between two terminals, it is possible to absorb surges of either positive or reverse polarity applied between those two terminals,
In other words, it is intended to provide a "tripolar bidirectional" surge absorbing element.

<Means for Solving the Problems> In order to achieve the above-mentioned object, the present invention proposes a surge absorbing element having at least the following constituent groups from the basic structure.

A first semiconductor region of the first conductivity type formed as the semiconductor substrate itself or formed separately from the semiconductor substrate. A second semiconductor region formed on one surface side of the first semiconductor region and having a conductivity type opposite to the first conductivity type and forming a first pn junction diode with the first semiconductor region.

By contacting the second semiconductor region from the side opposite to the first semiconductor region, it is possible to punch through between the first semiconductor region and the first semiconductor region based on the reverse bias of the first pn junction. After the through, since minority carriers are injected into the second semiconductor region to generate breakover characteristics, a rectifying junction in a direction opposite to the first pn junction diode is formed between the second semiconductor region and the second semiconductor region. The third region that forms. It is formed laterally apart from the second semiconductor region on the one surface side of the first semiconductor region, has a conductivity type opposite to the first conductivity type, and is formed between the first semiconductor region and the second semiconductor region. A fourth semiconductor region forming a second pn junction diode. By contacting the fourth semiconductor region from the side opposite to the first semiconductor region, it is possible to punch through with the first semiconductor region based on the reverse bias of the second pn junction. After the through, since minority carriers are injected into the fourth semiconductor region to generate breakover characteristics, a rectifying junction in a direction opposite to the second pn junction diode is formed between the fourth semiconductor region and the fourth semiconductor region. The fifth region that forms the. The first semiconductor region is provided on at least a part of a region from the second semiconductor region lower side to the fourth semiconductor region lower side on the back surface side facing the one surface, and between the first semiconductor region and the first semiconductor region. And a sixth semiconductor region forming a third pn junction diode. By contacting the sixth semiconductor region from the side opposite to the first semiconductor region, it is possible to punch through between the first semiconductor region and the first semiconductor region based on the reverse bias of the third pn junction. After the through, since minority carriers are injected into the sixth semiconductor region to generate breakover characteristics, a rectifying junction in a direction opposite to the third pn junction diode is formed between the sixth semiconductor region and the sixth semiconductor region. The seventh region that forms the. A first terminal electrically connected to the surface of the second semiconductor region and the surface of the third region. A second terminal electrically connected to the surface of the fourth semiconductor region and the surface of the fifth region. A third terminal electrically connected to the surface of the sixth semiconductor region and the surface of the seventh region. In the device according to <Action and Effect> The present invention, also for common mode surge invading between the transmission line L _1, L ₂ of each ground G comprising a pair per line, also line L _1, L ₂ It is possible to easily obtain a three-pole bidirectional surge absorbing element that can effectively absorb all the normal mode surges that appear between them, regardless of their polarities.

Here, in order to simplify the understanding of the operation of the device of the present invention,
From the combination of several regions used in the device of the present invention, first, the first pn junction diode constituted by the first semiconductor region and the second semiconductor region in the above-mentioned constitution is taken up, and the reverse thereof. The description will be started assuming that an abnormal voltage in the direction of applying a bias has entered. In such a situation, in the above configuration, a surge is applied between the first terminal and the second terminal or between the first terminal and the second terminal, and the polarity thereof is reverse biased to the first pn junction diode. Occurs when the phase is applied.

However, when the first pn junction diode is reverse biased by the surge, the depletion layer formed in the junction extends toward the first semiconductor region and at the same time toward the third region. And this depletion layer continues to grow according to the magnitude of the applied voltage, and eventually reaches the third region, punch-through occurs between the first semiconductor region and the third region,
Surge current begins to be absorbed through this current path. This punch-through operation start voltage is shown as the breakdown voltage in FIG.

On the other hand, this absorbed current flows in the path from the fourth semiconductor region connected to the second terminal or the sixth semiconductor region connected to the third terminal to the first semiconductor region, so that a surge occurs between the first and second terminals. Minority carriers from the fourth semiconductor region if applied, or from the sixth semiconductor region if a surge is applied between the first and third terminals, into the first semiconductor region of opposite conductivity type. Therefore, even if the surfaces of the second semiconductor region and the third region are electrically connected by the first terminal, the minority carriers flow into the second semiconductor region as a result of flowing into the second semiconductor region. Causes a voltage drop, and carriers are injected from the third region to the second semiconductor region.

While the carrier injection process is repeated, when a current having a magnitude larger than the value shown as the breakover current in FIG. 2 eventually flows, the voltage across the element is changed through the positive feedback phenomenon. Move to an extremely low clamp voltage. Therefore, the surge absorbing element of the present invention can absorb a large current while suppressing heat generation of the element. In addition,
The voltage exhibiting the breakover current can be referred to as the breakover voltage, which is generally higher than the breakdown voltage, as shown in FIG.

Therefore, following the voltage history across the device from the initial operation of the device of the present invention to the voltage clamp, with the application of surge,
If it is equal to or higher than the breakdown voltage, punch-through operation starts and the voltage across the element rises somewhat until the absorption current reaches the breakover current. The voltage shifts to an extremely low clamp voltage.

The above mechanism is the same as in the above description between the first and second terminals, or even between the first and third terminals when a reverse polarity surge is applied, the first semiconductor region and the fourth semiconductor region A second pn junction diode composed of
Alternatively, it can be applied to the third pn junction diode composed of the first semiconductor region and the sixth semiconductor region, and the punch-through phenomenon similar to the above occurs as a result of the reverse bias to them. In other words, punch-through occurred in the second pn junction diode between the first semiconductor region and the fourth semiconductor region and the third pn junction diode between the first semiconductor region and the sixth semiconductor region. Sometimes the second semiconductor region performs the function of the fourth semiconductor region or the sixth semiconductor region in the above description.

Furthermore, a completely similar mechanism can be expected for the surge application between the second terminal and the third terminal. When a surge is applied in which the second pn junction between the fourth semiconductor region to which the second terminal is connected and the first semiconductor region is reverse biased, the first pn junction exists between the first and third terminals already described. The second pn junction diode performs the same operation as the operation of the first pn junction diode when the diode is reverse biased, and the same sixth semiconductor region performs the same operation as the operation of the sixth semiconductor region. Similarly, when a surge is applied between the second and third terminals to reverse-bias the third pn junction diode, the above-mentioned first voltage when the third pn junction diode is reverse-biased between the first and third terminals is applied. The same operation as the operation of the three pn junction diode is performed by the third pn junction diode at this time, and the operation of the sixth semiconductor region is performed by the fourth semiconductor region.

Thus, in the surge absorbing element of the present invention, the transmission line L
If one of the first, second, and third terminals is connected to 1, L2 and the ground G, each of the three punch-through generating diodes included in the device of the present invention, that is, the first semiconductor region and the first The diode formed by the two semiconductor regions, the first semiconductor region and the fourth semiconductor region, the first semiconductor region and the sixth semiconductor region is between the transmission lines L ₁ and L ₂ and the ground G, and is a so-called “Δ” connection. As a result, only one element becomes a three-pole bidirectional element that can quickly absorb an abnormal voltage such as a surge, regardless of the polarity and intrusion route.

It goes without saying that this is advantageous. For example, in the conventional case where such a Δ connection is attempted, in an element capable of absorbing only a surge of one polarity, a pair of them connected back to back is connected to connection L1 and ground G, line L2 and ground G, and line L1,
Since it must be provided between L2, a total of 6 elements are required. Even if there is an element that can absorb a bipolar surge between a pair of element terminals, three elements are still necessary.
On the other hand, since the device of the present invention requires only one,
Practically large effects can be obtained, such as the effect of reducing the number of elements, the effect of downsizing the device, the rationalization of wiring work, and the effect of cost reduction.

Not only can good results be obtained in terms of dynamic characteristics.

For example, even if a common mode surge with the same phase and the same magnitude as an abnormal high voltage is simultaneously applied between the line L1 and the ground G and between the line L2 and the ground G, individual punch-through type surges are also applied between them. When the absorption elements are inserted, it is rather unlikely that they operate at the same time, and the smaller the punch-through voltage, the smaller the turn-on voltage. However, it is actually quite difficult to make the characteristics of such individual elements extremely close to each other, and considerable variations occur. As a result, for example, at the moment when the element inserted between the line L1 and the ground G breaks over and shifts to a considerably low clamp voltage, the potential of the line L1 drops to about the Kunramp voltage, but the potential of the line L2 decreases. Since the high voltage surge remains applied to the element inserted between the ground G, a considerably large line voltage (normal mode voltage) is also generated between the lines L1 and L2. Such a situation cannot be resolved until the remaining element starts the breakdown operation.

On the other hand, in the case of the device of the present invention, three pns that can be manufactured in the same or similar manufacturing process in the common first semiconductor region.
Since the junction diode and minority carrier injection region are used, the variation in each functional region can be suppressed to a much smaller level even with the same degree of rigor as in the past, increasing the simultaneity of device operation and generating line voltage. It is possible to quickly resolve the situation.

In the device of the present invention, the first semiconductor region is common,
For example, when the third pn junction diode for the third terminal connected to the ground G is reverse biased, the first and second pn junction diodes for the first and second terminals connected to the lines L1 and L2 are both forward biased. Therefore, not only the potential of the first terminal but also the potential of the second terminal become low, and conversely, the third pn junction diode is forward-biased, and one of the remaining first and second pn junction diodes is reversed. When breakover is caused by punch-through as a result of bias, minority carriers injected from the sixth semiconductor region forming the third pn junction diode reach the semiconductor region forming the other pn junction diode. , After all, a breakover occurred on this side as well, and eventually between the ground G and the line L1, the ground G
And the line L2 both turn off promptly. When the individual element is used, such a preferable phenomenon cannot occur,
There are also situations where the terminal potential is uncertain.

Note that, since the above constituent requirements group to are the basic constitution of the element of the present invention, the element of the present invention can be further developed as a protection element for multiple lines. Further, since the element of the present invention is a punch-through type element as disclosed in the above-mentioned conventional publication on the principle of operation, even if the same conventional element is compared to an avalanche breakdown type element, The advantages of punch-through type elements can be followed almost as they are.

Further, as described in the above-mentioned conventional publication, the break
If the clamp voltage is too low for the over-type device, the “following current effect” or “following current phenomenon” may occur, and even if the surge disappears, the device may continue to turn on and consume the power supply power. In the device of the present invention,
The second value of the holding current I _h for the surge absorbing element maintains the turn-on state, adjusted by the geometric positional relationship between the fourth semiconductor region and the six semiconductor region can also be controlled.

That is, the sixth semiconductor region is defined by the expression “provided in at least a part of the region portion from below the second semiconductor region to below the fourth semiconductor region” in the above-mentioned constitution. However, in particular, if there is no portion where the sixth semiconductor region and the second and fourth semiconductor regions overlap each other in the lateral direction in plan view, the edge of the sixth semiconductor region and the fourth semiconductor region are distance L ₄₆ between the edges, and also by adjusting the distance L ₂₆ between the edge and the edge of the second semiconductor region of the sixth semiconductor region as a geometric size, adjusting the recombination of carriers Therefore, the value of the holding current can be finally controlled. Generally speaking, the longer the distance is, the larger the holding current I _h becomes, and the shorter the distance becomes, the smaller the holding current I _h becomes. Of course, if the sixth semiconductor region is overlapped with the second semiconductor region and the fourth semiconductor region when seen in a plan view, the size is further reduced according to the degree of the overlap.

In any case, according to this feature of the device of the present invention, the geometrical dimensions L ₄₆ and L ₂₆ are set as one of the important parameters when adjusting the holding current I _h , especially for preventing a follow-up phenomenon.
Can also be used, which is advantageous in design.

Other characteristics and advantages of the device according to the present invention will be clarified in the embodiment section described below.

<Examples> Hereinafter, some of the illustrated examples of the present invention will be described in detail.

The surge absorbing element 12 shown in FIG. 1 is one of the basic embodiments according to the present invention, in which the semiconductor substrate is used as it is as the first conductive type first semiconductor region 1, and the upper and lower surfaces thereof are The second semiconductor region 2, the fourth semiconductor region 4, the third region 3, and the fifth region 5 are sequentially formed on one surface of each set simultaneously by the double diffusion technique, while the first semiconductor region 1 is formed.
On the other surface of the second semiconductor region 2 and a fourth semiconductor region 4 laterally spaced from the second semiconductor region 2.
The set of the sixth semiconductor region 6 and the seventh region 7 is formed on at least a part of them under the same conditions as above and at the same time in the forming process.

For the sake of convenience, the region having these regions 2, 3, 4, 5 will be referred to as the front face of the semiconductor substrate 1, and the region having the regions 6, 7 on the opposite side thereof will be referred to as the back face.

In the above-mentioned respective region relationships, since the first semiconductor region 1 is an n-type semiconductor in this embodiment, the second semiconductor region 2 is made to be p-type by the diffusion technique of an appropriate impurity such as boron, and The fourth semiconductor region 4 and the sixth semiconductor region 6 are also p
It is used as a type semiconductor region.

On the other hand, since the third region 5, the fifth region 5, and the seventh region 7 form one end of the main current path when punch-through occurs, it is preferable that they have high conductivity. In the example, each is a high-impurity-concentration n-type region, that is, an n ₊ -type region, which is formed by double diffusion of impurities into the second, fourth, and sixth semiconductor regions 2, 4, and 6. In practice, this can be obtained by high-concentration phosphorus diffusion or the like.

In the case of the illustrated embodiment, ohmic lead terminals 2t, 3t, 4 are provided in each of the above-mentioned area groups 2, 3;
Completed as an element by adding t, 5t, 6t, and 7t, as shown by the virtual line L _s in the figure, mutual correspondence of these terminal pairs 2t, 3t; 4t, 5t; 6t, All or some of the 7t may be short-circuited at the manufacturing stage, or all of them may be separately pulled out and short-circuited selectively by the user, or an appropriate bias source may be interposed as described later. You may let me.

When short-circuited, such a line L _s can actually be formed of a metal layer or the like in ohmic contact with the exposed surface of each terminal lead-out region of each set by, for example, a series of vapor deposition.

In such a structure, here, first, a pn is formed by a combination of the second semiconductor region 2 and the third region 3 with respect to the first semiconductor region 1.
Focusing on the diode, both terminals 2t related to these areas,
Consider a case where a surge voltage is applied between the lead terminals 4t and 5t of the third semiconductor region 4 and the fifth semiconductor region 5 and the fourth semiconductor region 4 and the fifth region 5, respectively, which are short-circuited by a virtual line L _s in the drawing. View.

In such a surge absorbing element 12, when a reverse bias is applied to the pn junction between the first semiconductor region 1 and the second semiconductor region 2 as described above in the section of operation, depletion caused thereby occurs. The layer extends not only toward the first semiconductor region 1 side but also toward the third region 3 side.

Therefore, if a surge voltage is applied between the terminal 2t (3t) and the terminal 4t (5t), and it is a polarity that applies a reverse bias to the pn junction and is considerably large in absolute value, the depletion will occur. It is possible that the upper edge of the layer reaches the third region 3.

This state is the start of the punch-through state between the first semiconductor region 1 and the third region 3, and is the low impedance state in which a large current can flow, or the breakdown state of the present surge absorbing element. This starting point is shown in FIG. 2 as a breakdown voltage on the voltage axis.

When the breakdown start state is realized, a surge current flows out between the terminals 2t (3t) and 4t (5t), holes are injected from the fourth semiconductor region 4 into the first semiconductor region 1, and the second semiconductor region 2
External current (element current) collected by external terminal 2t
Becomes

Therefore, the product of the resistance and the current of the second semiconductor region 2 sandwiched between the third region 3 and the first semiconductor region 1 is the region 2,
When it becomes equal to the forward voltage of the pn junction diode composed of 3, the electrons are injected into the second semiconductor region 2 from the third region 3 this time, which causes the increase of the current and again the fourth semiconductor region. A positive feedback phenomenon that holes are injected from 4 occurs.

The current value at which such a positive feedback phenomenon begins is the breakover current described above, and the voltage across the element (voltage between the external terminals 5t and 3t) at this time becomes the breakover voltage.

As described above, this breakover voltage has a value somewhat larger than the breakdown voltage, but once positive feedback starts to occur, the voltage across the element transits to a significantly low value.

This value is shown as the clamp voltage in Fig. 2, but it is almost the same as the product of the absorption current and the series resistance of each part, plus one forward voltage of the pn junction. equal.

As can be understood from such a mechanism, the surge absorbing element 12 of the present invention maintains a high breakdown voltage when a surge is not applied and suppresses the current flowing in the element to the minimum limit, so that it is wasted by the present element. While preventing the consumption of power, once a surge is applied above the breakdown voltage, it will soon exhibit an extremely low clamp voltage, thus ensuring the protection of subsequent protected devices that have absorbed large currents. Become.

The breakdown voltage of the surge absorbing element 12 is determined not only by the resistivity or impurity concentration of the first semiconductor region 1 but also by the separation distance between the first semiconductor region 1 and the third region 3. Since the punch-through voltage can be controlled depending on the effective thickness Dt of 2 and / or the impurity concentration, the punch-through voltage can be arbitrarily set within a wide design range.

In fact, according to the experiments by the applicant, it has been confirmed that this design width is extremely wide ranging from several volts to several hundreds of volts.

In the case of the first illustrated embodiment, the semiconductor substrate 1 is as described above.
On the other hand, the case where the second semiconductor region 2 and the third region 3 are formed by the double diffusion technique is shown, but in such a case, the effective thickness Dt of the second semiconductor region 2 is the second semiconductor. After the region 2 is formed, it is directly controlled by controlling the diffusion depth Dd of the third region forming impurity from the surface thereof.

That is, in the case of using such a double diffusion technique, the variation or change setting of the height position of the third region 3 with respect to the first semiconductor region directly changes the effective thickness Dt of the second semiconductor region 2. .

On the other hand, when the second semiconductor region 2 and the third region 3 are formed by the epitaxial growth technique, the effective thickness Dt of the second semiconductor region 2 depends on the growth film thickness itself determined based on the conditions in the epitaxy. Although it is generally specified, in that case, the existence of the third region 3 still defines the effective thickness Dt for punch-through.

Regardless of the diffusion technique or the epitaxy, the control of the effective thickness Dt of the second semiconductor region 2 can be performed with extremely high precision even with the existing technique. The electric potential can be set with extremely high accuracy.

Similarly, the punch-through voltage, and consequently the impurity concentration of the second semiconductor region 2, which is another factor that regulates the breakdown voltage of the present device, are adjusted with extremely high precision using existing techniques.
Can be controlled.

In other words, in the case of the element of the present invention, the breakdown potential is designed by designing the effective thickness Dt of the second semiconductor region 2 and the impurity concentration, which have good designability and are independent of each other. Means having a variable.

Therefore, not only can you set the breakdown voltage over an extremely wide range by using only one of these variables or by using both variables appropriately, but you can also breakdown other electrical characteristics such as junction capacitance and series resistance. It can be seen that it can also be designed independently of voltage.

In the above description, only the second semiconductor region and the third semiconductor region are described from the flow of description, but of course the fourth semiconductor region 4 and the fifth region 5, the sixth semiconductor region 6 and the seventh region 7
The same can be said for each diode formation group formed by.

In particular, the second semiconductor region 2, the fourth semiconductor region 4, and the sixth semiconductor region 6 can be simultaneously formed in a single process under the same impurity diffusion conditions. When the height position of the third region 3 with respect to the second semiconductor region 2 is set, it is preferable that the height positions of the fifth and seventh regions 5 and 7 are automatically set. The definition of the effective thickness Dt of the second semiconductor region 2 according to the height position of 3 also defines that of the fourth and sixth semiconductor regions 4 and 6.

This means that even if the current double diffusion technique is used, double-sided diffusion can be performed accurately in the same process, and at the same time, the breakdown voltage of each unit diode element or unit of the surge absorption section included in the device of the present invention is not uniform. It means that you can arrange without.

As described above, in the surge absorbing element of the present invention, the first, second, third; first, fourth, fifth; first, sixth, and seventh areas are included in the principle configuration. Although three surge absorbers are formed by the above, the current distribution of the surge current after punch-through between the first semiconductor region 1 and the corresponding regions 3, 5, 7 becomes relatively uniform.

However, if it is intended to ensure evenness, a configuration as shown in FIG. 3 can be adopted.

That is, in the embodiment shown in the third figure, the second substrate of the opposite conductivity type formed on the surface of the semiconductor substrate or the first semiconductor region 1,
Region elements 31, 32, 33, ... Divided into a plurality of third, fifth, and seventh regions 3, 5, and 7 formed for the fourth and sixth semiconductor regions 2, 4, and 6, respectively. , 3n; 51, 52, 53, ...
, 5n; 71, 72, 73, ..., 7n (n = 5 in the figure), and each area element 31 to 3n; 51 to 5n; 71 to
7n is adapted to be electrically connected to the outside from the common lead terminals 3t, 5t, 7t.

With such a structure, it is possible to avoid the concentration effect of the electric field, which is seen in the conventional avalanche breakdown type element, and obtain a uniform current distribution. Therefore, the current capacity can be increased almost in proportion to the element area.

In the surge absorbing element 12 shown in FIG. 3, the other considerations described in the first embodiment can be similarly adopted.

Two terminal pairs 2t, 3t; 4 in each surge absorber
As described above, t, 5t; 6t, and 7t can not only be short-circuited due to the operating principle, but also have the effect of avoiding a transient phenomenon if they are short-circuited.

In the surge absorber having the structure as in the present invention, the breakdown voltage, which is originally defined by the punch-through phenomenon, has the breakdown voltage of the first semiconductor region 1 and the second, fourth, and sixth semiconductor regions 2, 4, and 6.
When the avalanche breakdown voltage becomes close to
It is also possible that controllability deteriorates.

When there is such anxiety, in order to prevent or suppress avalanche breakdown that begins to occur at the joining of the ends of the second, fourth, and sixth semiconductor regions 2, 4, 6 in the initial stage, see Fig. 4. As shown, the second, fourth, and sixth semiconductor regions 2,
The semiconductor regions 2, 4 are formed so as to surround the perimeters 4, 4, respectively.
Conductive guard ring area 2G, 4G, 6G same as 4, 6
Or as shown in FIG. 5, each set of the second semiconductor region 2 and the third semiconductor region 3, the fourth semiconductor region 4 and the fifth region 5, and the sixth semiconductor region 6 and the seventh region 7. When the edge portions 8a, 9a, 10a of the ohmic electrodes 8, 9, 10 formed in series on the surface of the are further extended so as to extend beyond the junction with the first semiconductor region via the insulating film 11. good.

By doing so, the concentration of the electric field at the end portions of the second, fourth, and sixth semiconductor regions is alleviated, and the avalanche breakdown voltage is effectively increased. The designability of only the breakdown voltage can be expanded and improved.

Therefore, in the surge absorbing element 12 shown in FIGS. 4 and 5, among the elements 3t, 5t, and 7t, depending on the polarity of the surge voltage applied between the two terminals to which the surge is applied, The diode that causes punch-through is a diode formed by a semiconductor region on one of the terminal sides.

However, regardless of which diode causes the punch-through phenomenon, the operation mechanism is exactly the same as that already described for the diode constituted by the first semiconductor region 1 and the second semiconductor region 2.

Therefore, in the above description, the terminals 2t and 3t for electrically connecting the surfaces of the second semiconductor region 2 and the third region 3 and the connecting (short-circuit) line L _s are drawn out from the element as the first terminal,
Similarly terminals 4t, 5t and the connecting line L _s second terminal, the terminal 6
If t, 7t and its connecting line L _s are used as the third terminal and one of them is connected to each of a pair of transmission lines and the ground, a common mode surge of any polarity related to the transmission line is a normal mode surge. Is a three-pole bidirectional surge absorbing element that can absorb both well. That is, in any combination of the first terminal and the second terminal, the first terminal and the third terminal, the second terminal and the third terminal, and also in the combination, whichever side of the terminals has a positive polarity surge. Can even absorb them equally.

Moreover, as already described in the section of the operation, even when a common mode surge of the same phase is simultaneously applied between the first terminal and the third terminal and between the second terminal and the third terminal, for example, the first semiconductor As a result of the region 1 being a common region, the second, fourth and sixth semiconductor regions 2, 4, 6 formed therefor are formed.
And the third, fifth and seventh areas3, each of which is associated with
Since both 5 and 7 can be manufactured by the same or similar manufacturing process, the variation in surge absorption characteristics expected between the two sets of terminals can be suppressed to an extremely small value, and the surge absorption operation between the two sets of terminals can be suppressed. The simultaneity can be increased. Therefore, generation of a large line voltage (normal mode voltage or surge) can be suppressed, and even if the line voltage is generated, the situation can be quickly resolved.

Further, since the first semiconductor region 1 is common, for example, the ground G
When the third pn junction diode for the third terminal connected to is reverse biased, the first connected to the lines L1 and L2,
Since both the first and second pn junction diodes for the second terminal are forward biased, not only the potential of the first terminal but also the second terminal potential becomes low, and conversely, the polarity of the third pn junction diode is forward biased. Then, when one of the remaining first and second pn junction diodes, for example, the first pn junction diode including the second semiconductor region 2 breaks over based on punch-through as a result of reverse bias, the third pn junction is forward-biased. Since the minority carriers injected from the sixth semiconductor region 6 forming the junction diode reach not only the second semiconductor region 2 but also the fourth semiconductor region 4 forming the second pn junction diode. Side second pn junction diode also has a breakover, and eventually ground G and line
Both L1 and ground G and line L2 turn on quickly during L1.

The embodiment shown in FIG. 4 and the embodiment shown in FIG.
If there is a desired consideration, only the means for preventing or suppressing the avalanche breakdown that occurs at the end junctions of the second, fourth, and sixth semiconductor regions as described above is different.

Therefore, conversely, in these embodiments, according to the configuration of the third illustrated embodiment, the third, fifth, and seventh areas 3, 5, and 7 are each a plurality of area element groups 31 to 3n; 5n;
Although it is composed of a set of 71 to 7n, most basically these areas are each a single non-divided area like the third, fifth and seventh areas 3, 5, and 7 of the first illustrated embodiment. It may be formed as a region.

In the case of the surge absorbing element of the present invention as shown in each of the above-mentioned embodiments, after the element is completed, as a general rule, incidental processing such as end face polishing which is required in the conventional avalanche breakdown type is not necessary. Therefore, a plurality of the configurations of the above-described embodiments can be simultaneously formed in one semiconductor substrate 1.

As a slightly special use of the surge absorbing element 12 of the present invention, the terminal pairs 2t, 3t; 4t, 5t; relating to each surge absorber or each region group constituting the surge absorbing diode of the unit;
When 6t and 7t are individually drawn out by eliminating the virtual line short-circuit line L _s , and an appropriate bias source is inserted between these terminal pairs when they are electrically connected to each other, each punch in each surge absorbing section It is also possible to control the through voltage externally.

Here, as an example, the effect of the present invention is confirmed by comparison in an actual device.

First, a surge absorbing element according to the present invention was manufactured by the steps described below.

A silicon wafer having a resistivity of 5 Ω-cm, a conductivity type of n type, a (111) plane, and a thickness of 300 μm was used as a starting member for the first semiconductor region 1, and 6000 Å SiO ₂ films were first formed on the front and back surfaces thereof.

Next, in order to define the planar shape of the second semiconductor region 2 and the fourth semiconductor region 4 on the front surface and the sixth semiconductor region 6 on the back surface, photolithography is performed according to a predetermined pattern on the silicon oxide films on the front and back surfaces. An etching process was applied to open impurity diffusion windows, and boron was diffused on both sides through the diffusion windows to form p-type regions 2, 4, and 6 each having a depth of 2.5 μm.

In this pattern, the second and fourth regions 2 and 4 each having a width of 200 μm are alternately repeated at intervals of 70 μm, and the sixth semiconductor region 6 is the center of the second and fourth semiconductor regions on the surface. It was formed in each predetermined area so that its center would come to the part.

After a new silicon oxide film is formed on the front surface of the wafer, a plurality of third area elements 31 to 3n and fifth area elements 51 to 5n are provided on the front surface side, and a plurality of third area elements 51 to 5n are provided on the opposite back surface side. In order to define each plane shape for the seven area elements 71 to 7n, the silicon oxide film is photo-etched according to a predetermined pattern, and the plurality of third, fifth, and seventh area elements are used. An impurity diffusion window was formed.

Phosphorus is diffused at a high concentration through this diffusion window, and the third region 3 and the fifth region elements 51 to 5n each consisting of a set of n ⁺ -type third region elements 31 to 3n each having a depth of 1.2 μm. The fifth area 5 consisting of the set of No. 7 and the seventh area 7 consisting of the set of the seventh area elements 71 to 7n are formed.

Therefore, at the same time, the second, fourth, and sixth semiconductor regions 2, 4, and 6 were finally completed, and their effective thicknesses Dt were both defined to be 1.3 μm.

After that, an ohmic contact common to the second and third regions, an ohmic contact common to the fourth and fifth regions,
Then, in order to make a common ohmic contact in the sixth and seventh regions, through photo etching, metal thin film deposition, and the etching process, respective electrodes 8, 9, 10 or terminals 2t, 3t; 4t, 5t; 6t, 7t was formed.

In such a configuration, as a comparative surge absorbing element, a surge absorption model was constructed between the terminals 2t, 3t or 4t, 5t on the front surface side of the board and the board terminals provided on the rear surface side of the board. The breakdown voltage was 120V and the surge absorption current was 300A / cm ² .

On the other hand, as a surge absorbing element according to the concept of the present invention, the one having the above-mentioned configuration so as to absorb a bipolar common or normal surge between the terminals 2t, 3t; 4t, 5t; Even if it was almost the same as 121V, the breakover current density was 4A / cm ² and the surge absorption current density could be as ^high as 5000A / cm ² .

Even if this characteristic example is seen, the functions of the fourth to sixth semiconductor regions with respect to the set of the second and third regions provided by the present invention,
It can be seen that the functions of the second to sixth semiconductor regions for the sets of fourth and fifth regions and the functions of the second to fourth semiconductor regions for the sets of sixth and seventh regions are extremely large.

And again, under the same conditions as above, substantially the second,
The diffusion time for forming the n ⁺ -type third, fifth, and seventh regions 3, 5, and 7 that defines the effective thickness of the fourth and sixth semiconductor regions 2, 4, and 6 was changed. However, the breakdown voltage could be changed between 30V and 170V.

Of course, it is also confirmed that this variation width is not the maximum variation width, and an extremely wide variation range from several volts to several hundreds of volts can be obtained in consideration of other conditions.

It was also verified that the yield mechanism in this device can be controlled without fail by tunneling or avalanche breakdown only by the punch-through phenomenon.

By the way, as described above, the surge absorbing element of the present invention
In FIG. 12, the sixth semiconductor region 6 basically overlaps the second semiconductor region 2 and the fourth semiconductor region 4 when viewed in a plan view so as to overlap with the front and back surfaces. You may have a non-overlapping relationship.

In all of the above-described examples, the sixth semiconductor region 6 has a portion overlapping with the second and fourth semiconductor regions 2 and 4.

However, this is different from the second and fourth semiconductor regions 2 and 4 in plan view as shown in FIG. 6 as a representative of the modification of the basic embodiment shown in FIG. The six semiconductor regions 6 are formed so as not to overlap at all, and therefore, a lateral separation distance L ₄₆ is provided between the edge of the sixth semiconductor region 6 and the edge of the fourth semiconductor region 6 as well. It is also possible to leave a lateral separation distance L ₂₆ between the edge and the edge of the second semiconductor region 2.

By doing so, in addition to the various effects and functions unique to the surge absorbing element 12 of the present invention described so far, the region portion 1 of the first semiconductor region around the distance defined by the spacing distance 1
The regions 3 and 13 can function as regions 13 and 13 that adjust the amount of carrier recombination.

That is, the value of the holding current I _h increases when the separation distances L ₄₆ and L ₂₆ are long, and decreases when the separation distances L ₄₆ and L ₂₆ are short. On the contrary, as shown in the other embodiments described above, when the sixth semiconductor region 6 has an overlapping relationship with the second and fourth semiconductor regions 2 and 4 in plan view, this If the other dimensions and structure are the same, the value of the holding current I _h is lower than that of the embodiment shown in FIG.

Therefore, in the case where the above-described continuous flow phenomenon occurs when it is configured in the overlapping relationship, according to the idea of the embodiment shown in FIG. 6, according to the idea of the sixth semiconductor region, the second semiconductor region and the fourth semiconductor region are separated from each other. It suffices to set the forming position to a position where the separation distances L ₄₆ and L ₂₆ optimized in terms of design can be placed.

The built-in configuration of the carrier recombining adjustment regions 13 and 13 represented by the sixth embodiment shown in the drawings can be applied to the respective embodiments shown in the third, fourth and fifth embodiments described above. The same effect can be expected regarding the adjustment of the holding current.

Finally, regarding desirable mounting for mounting the device of the present invention, for example, the common terminal 10 or the terminals 6t, 7t between the sixth semiconductor region 6 and the seventh region 7 is connected to an electrode plate which also functions as a heat sink. However, if the structure is such that they are adhered, a great heat dissipation effect can be obtained by arranging this electrode plate so that it is exposed to the outside of a suitable mold that seals the present surge absorbing element 12.

Furthermore, if this electrode plate is used as a ground electrode (although it is more desirable to do so), the electrode plate can be screwed to the metal chassis of various devices containing this element to ensure reliable grounding. A further heat dissipation effect can be expected, and deterioration of element characteristics due to heat generation can be suppressed to a minimum.

Actually, according to this method, it is not necessary to insert a heat radiating sheet having an electrically insulating property into the collector electrode as in a conventional power transistor, and the like,
We have succeeded in obtaining sufficient heat dissipation characteristics.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a first embodiment of the surge absorbing element of the present invention, FIG. 2 is an operation characteristic diagram of the first illustrated embodiment, and FIG. 3 is a schematic configuration of a second embodiment of the surge absorbing element of the present invention. FIG. 4, FIG. 5 and FIG. 5 are schematic configuration diagrams of yet another embodiment of the surge absorbing element of the present invention, and FIG. 6 is a schematic configuration diagram when a carrier recombination adjusting region is further incorporated. In the figure, 1 is a first semiconductor region or a semiconductor substrate, 2 is a second semiconductor region, 3 is a third region, 31 to 3n are third region elements, 4
Is a fourth semiconductor region, 41 to 4n are fourth semiconductor region elements, 5 is a fifth region, 51 to 5n are fifth region elements, 6 is a sixth semiconductor region, 7 is a seventh region, and 71 to 7n are a seventh region. Area element, 2G, 4G, 6G
Is a guard ring, 8, 9 and 10 are electrodes, 12 is the surge absorbing element of the present invention as a whole, and 13 is a carrier recombination adjusting region.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Masaaki Sato 1-1-12 Miyashita, Sagamihara-shi, Kanagawa Incorporated company Sankosia Sagami Factory (72) Yuji Matsumura 1-1-12, Miyashita, Sagamihara-shi, Kanagawa (72) Inventor, Hiroaki Yoshihara, 3-3-12, Fujihashi, Ome City, Tokyo Kenji Kitajima, Examiner, Mitaka Research Institute of Electronic Science (56) Reference JP 62-65383 (JP) , A)

Claims (1)

[Claims] 1. A first-conductivity-type first semiconductor region formed as the semiconductor substrate itself or formed separately from the semiconductor substrate; formed on one surface side of the first semiconductor region. A second semiconductor region having a conductivity type opposite to the first conductivity type and forming a first pn junction diode with the first semiconductor region; and a second semiconductor region from a side opposite to the first semiconductor region. By contacting the second semiconductor region, it is possible to punch through between the first semiconductor region and the first semiconductor region based on the reverse bias of the first pn junction, and after the punch through, with respect to the second semiconductor region. A third region that forms a rectifying junction in the opposite direction to the first pn junction diode with the second semiconductor region to generate breakover characteristics by injecting minority carriers; The one surface side of the semiconductor region A second pn junction diode is formed laterally spaced apart from the second semiconductor region, and has a conductivity type opposite to that of the first conductivity type and forms a second pn junction diode with the first semiconductor region. Punching through between the first semiconductor region and the fourth semiconductor region by contacting the fourth semiconductor region from the side opposite to the first semiconductor region, based on the reverse bias of the second pn junction. In addition, after the punch-through, since the minority carriers are injected into the fourth semiconductor region to generate breakover characteristics, the second pn junction diode is formed between the fourth semiconductor region and the fourth semiconductor region. A fifth region forming a rectifying junction in the opposite direction; and a region portion on the back surface side facing the one surface of the first semiconductor region and extending from under the second semiconductor region to under the fourth semiconductor region. At least in part A sixth semiconductor region that is provided in the third semiconductor region and forms a third pn junction diode with the first semiconductor region; and by contacting the sixth semiconductor region from the side opposite to the first semiconductor region. , Punch-through with the first semiconductor region can be performed based on the reverse bias of the third pn junction, and after the punch-through, minority carriers are injected into the sixth semiconductor region to break over. A seventh region forming a rectifying junction in the opposite direction to the third pn junction diode to generate the characteristic; and a surface of the second semiconductor region and the third region. A first terminal electrically connected to the surface of the fourth semiconductor region; a second terminal electrically connected to the surface of the fourth semiconductor region and the surface of the fifth region; and a surface of the sixth semiconductor region. Electrical on the surface of the 7th area A surge absorbing element having a third terminal connected to.