JPH06342762A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To enable a semiconductor device to be improved in electromotive force and rectifying properties by a method, wherein an a-Si layer is formed as an I-type semiconductor layer at a first substrate temperature, and an a-B:H layer is formed as a P-type semiconductor layer at a second substrate temperature. CONSTITUTION: An N-type ohmic layer 32 which is doped with a large number of Ps is deposited on a substrate 11, kept at a temperature of 180 to 400 deg.C. In succession, an I-type a-Si:H layer 10 is deposited at a substrate temperature of 180 to 410 deg.C. After the I-type a-Si:H layer 10 has been deposited, a P-type a-B:H layer 30 is deposited after a substrate temperature is decreased by 100 deg.C or so by stopping a heater. A semi-transparent metallic layer 34 of a metal such as Pb, Cr-Cu or the like is thermally evaporated on the a-B:H layer 30 for the formulation of an M/NIP photovoltaic device. A contact 35 is thermally evaporated on the semi-transparent layer 34 in a vacuum. A TiO antirefection coating or a conductive metal oxide 36, such as ITO is deposited on the metal layer 34 for the formation of a photodiode or a solar cell.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. More particularly, it relates to an improved photovoltaic junction, a rectifying junction, and a method of manufacturing a semiconductor device useful in an image forming apparatus.

[0002]

2. Description of the Related Art Hydrogenated amorphous silicon thin films (hereinafter abbreviated as a-Si: H) have been applied to semiconductor devices and have been manufactured by various techniques. Journal of the Ele
ctrochemical Society) No. 116
Volume 1, January 1969, pages 77-81, entitled "Manufacturing and Properties of Amorphous Silicon," in Chitick, Alexander and St.
Erling is able to dope both donor and acceptor impurities by inductively coupled RF glow discharge in silane (SiH ₄ ) gas, thereby broadening the conductivity of a-Si: H over a wide range. It has been reported to have produced a low conductivity a-Si: H that can be varied. Recently, a-Si: H has been produced by vapor deposition of silicon in a H ₂ + Ar atmosphere. This thin film exhibits semiconductor properties similar to a-Si: H made from silane in glow discharge.

Originally, a-Si: H was synthesized by glow discharge in SiF ₄ and H ₂ . This method has been developed under the guidance of the inventor and is described in British Patent No. 933,545 (issued August 8, 1963). a-S
The excellent dielectric properties and high resistance of i: H are shown in the table on page 4 of the above patent specification. High resistance a-
Si: H is particularly suitable as one component of the connector described here.

US Pat. No. 4,064,521 describes a photovoltaic junction consisting of P-type, N-type and intrinsic a-Si: H deposited by glow discharge.
The patent uses 1 / 2-5% by volume of the gaseous dopants, diboron and phosphine mixed with silane as shown in the Chitick et al. Article.

Similarly, British Patent No. 2,018,446 (issued October 17, 1979) discloses a variety of joints having two layers of a-Si: H of different conductivity types. An image forming apparatus is described. Protective and blocking layers for a-Si: H are also described. Also, in Applied Physics Letters, Vol. 35, No. 4, 349-35 (August 15, 1979).
In a paper entitled "Photoconductive Images Using Amorphous Silicon Thin Films" on page 1, Y. A vidicon image forming apparatus made of sputtered a-Si: H by Imamura et al. Is described.

Finally, in the field of semiconductors, it is well established to implant highly accelerated boron ions into silicon wafers as dopants.
The dopant ions are implanted in the crystal-silicon by a corona discharge. This method is based on Wichner
And Charles of Journal of El
5 of Volume 5 of Electronic Materials
(1976), pages 513-529, entitled "Silicon Solar Cells Made by Corona Discharge". What is important here is that, as described on page 518, the discharge must be kept in a corona state so that the voltage between the electrodes can be maintained at several kilovolts. Moreover, in order to obtain a sufficient implantation depth (range), a plurality of charged ionic species of high energy are required.

Therefore, the voltage and the boron ion energy are not sufficient to obtain a useful implantation depth,
Glow discharges are therefore specifically excluded because the energy of the ions is too low.

[0008]

That is, the present invention relates to a semiconductor device, which is provided with a semiconductor junction between a substrate containing boron and a substrate of amorphous silicon. Boron diffusion is limited. The electromagnetic wave referred to in the present invention is a wavelength that can normally operate this type of semiconductor device, and specifically includes sun rays, X-rays, and the like, and a wavelength longer than far infrared rays is usually used. Absent.

The present invention will be described in detail below with reference to the drawings. FIG. 1 shows an intrinsic semiconductor (I type), P-, on the metal surface M.
FIG. 2 is a schematic view of a glow discharge device for producing coatings of positive and N-type a-Si: H. A typical PIN / M photovoltaic device made using the device of FIG. 1 is shown in FIG. Substrate 1 is 3 inches x supported by electrode 2
0.01 inch thick stainless steel 11 having a 4 inch square surface. Resistance heater 3 is electrode 2
And is embedded in a ceramic block 3a for supporting and heating the substrate 11. The substrate 11 is placed in a concave counter electrode 4 having a 4 inch by 5 inch square cross section defined by sidewalls 8 and tops 9. The top 9 is located approximately 41/2 inches above the top surface of the substrate 11. The electrodes 1 and 4 are installed inside an enclosure 6 sealed to a pedestal 12 by a gasket to form a gas seal. The vacuum pump 20 includes a valve 1 and a nipple 13 to make the enclosure 6 vacuum.
Connected to 2. Gas G from tanks 17a-17e
Are guided to enclosure 6 via pedestal 12 by adjusting needle valves 16a-16e, manifold 15 and connector 14. Here, the gas G is guided by the insulator tube 5 and the diffuser 7 inside the electrode 4 . A gap 118 of, for example, 1/4 inch between the side wall 8 and the electrode 2 becomes an outlet of the gas G after passing through the glow discharge plasma P. The meter VG measures the pressure of the gas G in the enclosure 6, and is preferably a commercially available capacitance manometer type because it uses a corrosive and compressible gas in the range of 0.001 to 10 torr. The signal from the meter VG automatically adjusts the valve 16 by a servo mechanism to maintain the desired pressure. A voltage V is applied between the electrodes 2 and 4 from a power supply 24 by means of conductors 21 and 22 connected via insulated electrical bushings 18 and 19 embedded in the pedestal 12. The protection resistor 23 prevents damage due to the spark current. Voltage V and current I are measured as shown. The resistance heater 3 is connected to a control power supply (not shown) via a conductor 45 and an insulating bushing 45 '.

For operation, the enclosure 6 is 0.0
The pump 20 evacuates to a pressure of 2 torr or less, and the heater 11 holds the substrate 11 at 180 to 400 ° C. Then, by opening the valve 16a, the tank 17
Filled with silane (SiH ₄ ) from a. Valve 16
a is a desired pressure in the enclosure 6 (for example, 0.5
tor). Then tank 1
The mixture of helium containing 1% of phosphine (PH ₃ ) from 7b enters the silane-mixed manifold 15 and flows through the insulator tube 5 and the diffuser 7 to raise the pressure PG of the device to about 1-2 torr. . Electrode 2 and electrode 4
Is the cathode and the anode, the potential difference V between this electrode 2 and the electrode 4 is adjusted to about 200-500 volts which initiates the glow discharge, and the current I positions the glow discharge plasma P on the substrate 11. Adjusted to about 5 mA to provide. This produces a uniform and heavily doped N ohmic layer 32 on the substrate 11 (FIG. 2). After maintaining the discharge for about 2 minutes, the bulb 16b leaves P
Closed to stop the flow of H ₃ and helium.

Since the uniformity and the impurity concentration of the N-type ohmic layer 32 are not as important as the uniformity and the impurity concentration of the intrinsic semiconductor (I) a-Si: H layer 10, the ohmic layer 32 is accompanied by glow discharge. Alternatively, it may be deposited by thermal treatment. For example, P in conventional helium carrier gas
Chemical vapor deposition (CVD) filled with H ₃ / SiH ₄
The device is loaded into the N-type layer 32 before loading the substrate into the device of FIG.
May be used for depositing. However, it is important to keep the temperature of the CVD low so that the polycrystals are formed on a macro scale and, due to their surface roughness, do not damage the next deposited a-Si: H layer.

Subsequently, on the top surface of the N layer, I-type a-Si:
In order to generate the H layer 10, the temperature of the substrate 11 is set to the heater 3
Held at 180-410 ° C. Then, the pressure PG of only silane is adjusted to 0.1 to 0.4 torr. If helium is used as the carrier gas, the pressure PG is adjusted to about 2 torr. Voltage V is P
Depending on G, it is adjusted to 500-1500 volts.
Further, the current I is adjusted to about 5 mA to start the discharge in the strong electric field region Es of the gap G ′ between the electrodes 2 and 4, and the diffusion plasma P is generated in the weak electric field region Ew close to the substrate 11.
To minimize the possibility of sparking on the substrate 11. The discharge is continued for about 40 minutes, producing an a-Si: H layer 10 of about 1 micron. Longer discharge times, higher currents or the use of disilane can increase the thickness of layer 10. Once layer 10 is at the desired thickness, voltage V is removed and valve 16a
Is closed, and residual gas is removed by pump 20.

Next, the formation of the M / NIP joined body is completed.
Therefore, hydrogenated amorphous boron (a-
B: H) P-type layer 30 is the top of the I-type a-Si: H layer 10.
Diborane (B₂H₆) And helium plasma P
Is deposited by introducing into. First, the valve 16
B is opened until c is opened and the pressure PG becomes 1 to 2 torr.
₂H₆/ He gas is introduced, and the temperature of the substrate 11 is
As in the formation of layers 10 and 30, at 180-410 ° C.
Maintained. The voltage V is weak due to the weak electric field Ew on the substrate 11.
-200-500 volts to place discharge plasma P
Is adjusted to. Current is a-B: H layer thickness is 100Å
Is maintained at about 5 mA for 2 minutes. Also, the substrate 1
The temperature of 1 is the same as that for depositing the a-Si: H layer, 180-
Hold at 410 ° C. Then, close the valve 16c.
Then the valve 16d is opened and the enclosure 6
Nitrogen gas was introduced to remove residual diborane from
It The current to the heater 3 is cut off, and after cooling for 1 hour,
The enclosure 6 is returned to atmospheric pressure and the substrate 11 is removed.
Will be issued.

To complete the formation of the M / NIP photovoltaic device, a semi-transparent metal layer 34, eg 100 Å Pb, C.
Thermally depositing r-Cu or Ni-Cr alloy on the aB: H layer. The contact fingers 35 are thermally vacuum deposited on the translucent layer 34 for electrical contact. Metal layer for anti-reflection (AR) coating such as TiO ₂ or SnO ₂ , indium and tin oxide (ITO) or conductive metal oxide (CMO) such as zinc oxide for use as a photodiode or solar cell. Deposited on top of 34.

After the above deposition process has been carried out, M /
The electrical properties of NIP batteries were tested with various light sources. A
The short-circuit current I of a typical battery due to irradiation of M1 sunlight
As a result of measuring sc, it was 4 mA / cm ² . The open circuit voltage Voc is 0.4 using the Cr / Ni alloy semitransparent electrode 34.
It was 5 volts. This electrode transmitted only about 30% of the incident photon flux, so if sufficient AM1 irradiation was utilized without loss due to electrode absorption and reflection, the calculated value was 4 / 0.3, or 13.3 mA. / Cm
Become ² .

This current value is about the same as the best value reported in the literature if a similar correction is also made for the loss of the electrodes. Also, the measured Voc is equivalent to the value when the same low work function electrode is used. A second M / NIP battery was then made in the same process using the apparatus of Figure 1 as described above. However, the heater 3 is
In order to deposit the a-B: H layer 30 at a temperature lower than the deposition temperature of the i: H layer 10, the I-type a-Si: H layer 10 was deposited and then blocked. Electrode 11 and consequently a-Si:
The temperature of the H layer 10 is from 200 to 300 ° C. to about 1 in about 1 hour.
Decrease to 00 ° C. After that, except that the temperature of the a-B: H layer 30 was lowered,
Deposit on layer 10 in a glow discharge for about 2 minutes. After removing the diborane gas, the substrate 11 is removed from the enclosure 6 without further cooling and tested for imaging properties and photovoltaic properties after the addition of the semitransparent electrode 34, as shown in FIG.

Further, in order to form a photovoltaic solar cell,
The semi-transparent metal coating 34 and the contact finger 35 are attached to the first M /
A-B: H layer 30 in the same vacuum deposition system as the NIP battery
Thermal treatment is applied on top and vapor deposition is performed. A second completed M / NIP cell was then tested under solar radiation both with and without the AR coating 36. Voc was 0.65 volts and current was 4 mA / cm ² in a test using AM1 solar flux and without AR coating 36. Therefore, a-B: H layer 3
No. 4 was deposited at low temperature, Voc deposited the aB: H layer without decreasing the temperature of the substrate 11 and the first M / NI.
It is about 0.2 volt higher than the P battery.

The increase in the open-circuit voltage Voc obtained by the present invention cannot be theoretically explained at the present time, but since the temperature of the substrate 11 is low, the increase of the a to the surface of the I-type a-Si: H layer 10 is caused.
-B: It seems that the damage due to impact when the H layer 30 is deposited is slight. The aB: H layer 30 appears to be a P-type semiconductor when deposited on a low temperature substrate. And undoped I, which is slightly N-type as deposited
A PN heterojunction is formed for the type a-Si: H layer 10. Since a depletion region is formed from the boundary surface between the I-type a-Si: H layer 10 and the a-B: H layer 30 toward the I-type a-Si: H layer 10, the top portion of the a-Si: H layer 10 is formed. The surface is the most important.

The composition was analyzed by a mass spectrometer to determine the amount of boron diffusion in the first M / NIP cell. Figure 4
Analyzes the boron / silicon ratio at the interface between the aB: H layer 30 and the a-Si: H layer 10 deposited by claw discharge at 300 ° C. by a commonly used second ion mass spectrometer. The results are shown. As is clear from the figure, the ratio of B ¹¹ / Si ²⁸ isotopes sharply decreases at about 100 Å, then gradually decreases to 500 Å, and finally becomes background noise. The first 100 Å seems to represent aB: H with interdiffusion of silicon, while up to 500 Å seems to show the diffusion gradient of boron in silicon. However, this diffusion is greater than would be expected from previously published boron diffusion data in the absence of glow discharge. Some implantation of boron-containing ions in the glow discharge will also occur, and S
An iB ₆ alloy may also be formed.

However, when the aB: H layer 30 is deposited at a low temperature and the diffusion of boron into the a-Si: H layer 10 is suppressed, the Voc is generated by conventional semiconductor technology, that is, crystalline silicon. It is inconsistent with what is expected from the result of the PN junction body made by diffusing the boron dopant by the mechanical treatment. When the aB: H thin film 10 is deposited by thermal treatment at 180 ° C. or lower, the aB: H thin film damages other surfaces, which affects the semiconductor characteristics of the aB: H thin film deposited at a low temperature. No data seems to exist.

In FIG. 3, an a-B: H layer 40 is first deposited on a 0.010 inch stainless steel substrate 11, then I-type a-Si: H43 and N-type a-Si: H.
A M / PIN photovoltaic connector device made by depositing layer 42 is shown. P-type, I-type and N-type layers 40, 43, 4 under the same process conditions used by the glow discharge deposition system described with reference to FIG. 1 to make M / NIP connections.
2 can be used to deposit the two, or the glow discharge deposition system described with respect to FIG. 2 can be used with the deposition order reversed. Upon cooling, the M / PIN cell is removed from the deposition system and tested in the imager described below with respect to FIG. 7 and as a photovoltaic device.

An electrode 44 may be added to provide electrical contact to the N-type layer 42 to form a photovoltaic device. In the M / NIP battery of FIG. 2, 100 Å Cr
/ Cu or Ni-Cr alloy semi-transparent layer 44 is N-type a-S
While thermally deposited on the i: H layer 42, the electrode 44 of the cell of FIG. 3 produces a very high Voc for the N-type a-Si: H layer 42, so Cr, Al, Ti
2 is deposited similarly to the M / NIP cell of FIG. 2 except that it is preferably made of a low work function metal such as.

An AR coating 46, preferably of a conductive metal oxide such as tin oxide or zinc oxide, is deposited on the electrode 44 by standard techniques, and T
A contact finger of i-Ag is added by standard methods. In the test without the AR coating 46, when the aB: H layer 40 was deposited on the stainless steel substrate 11, M / P
The Isc of the IN battery was 4 mA / cm ² . 100Å
Since the light transmission of the Cr / Ni semi-transparent top electrode is about 30%, the internal Isc is about 13.3 mA / cm ² which is almost the same as the M / PIN battery of FIG. However, the measured Voc was 0.79 volts, and the a-B: H layer 30
Is a large value even though it was deposited at a low temperature like the M / PIN battery of FIG. Solar Ener
gy, Vol. 23, pp. 145-147 (1979), reported by Hanak that Voc of Pt electrode in contact with P-type a-Si: H is 0.75 volts. However, the Voc of the present invention is the Voc0.
It is equal to or higher than 75 volts. Pt is expensive and fairly inaccessible, whereas stainless steel is cheap and plentiful. Expensive metals have a satisfactory material cost when used for small electronic devices, but are not suitable when used for solar energy conversion devices with large areas, as the cost is considerable. .

The deposition conditions are as follows: the temperature of the substrate 11 is raised to facilitate the deposition of the aB: H layer 40, and then the temperature is lowered to form the I-type a-Si: H layer 43 at 180 to 410 ° C. It may be deposited. For example, if the a-B: H layer 40 is B ₂ H
The temperature of the substrate may be maintained at 300 to 600 ° C. in the presence of ₆ / He to deposit by a normal CVD apparatus, and after cooling, it may be transferred to the glow discharge apparatus shown in FIG. Also, if the CVD temperature is below the temperature at which polycrystals are formed and the surface is roughened, the mixture of B ₂ H ₆ / SiH ₄ will cause the layer 40 on the stainless steel substrate 11 to reach approximately 600 ° C. It may be used for CVD processing at a temperature of or higher. The B / Si ratio is preferably 0.01 or more.

Another suitable layer 40 on the substrate 11 is:
Mixture hydrogenated amorphous carbon, boron deposited by glow discharge is doped with a-C of butadiene and B ₂ H ₆ in the apparatus of Figure 1: is H layer. In any case, the boron-doped layer 40 may be of any desired thickness for physical and electrical considerations, as light will enter through the N-type layer 42. However, when the aB: H layer 40 is deposited by glow discharge, a thickness of 500 Å or more is not preferable because it adds series resistance and peels off from the stainless steel substrate 11. P, I and N layers 4 in production
Deposition of 0,43,42 is carried out on a substrate 11 through a series of deposition chambers with programmed temperature, pressure and gas composition.
It is preferable to move them in line.

In addition, the I-type a-Si: H layer 43 can be made from other silane compounds such as disilane, thermally cracks vapor phase SiH ₄ and is used in a device such as that shown in FIG. Can also be made by SiH ₄ or other deposition techniques such as diffusing silicon containing materials through a glow discharge in hydrogen. a-S
Regarding other techniques for forming the i: H layer 43, the present inventors' earlier US application No. 857 and 690, as an example, the a-Si: H layer 43 is formed by sputtering silicon in the presence of SiH ₄ or hydrogen-argon.

The unexpectedly high Voc and Isc of the M / PIN battery described above cannot be explained based on the generally accepted theory. A small number of carriers generated only in the depletion region (0.3 micron) of the I-type a-Si: H layer 43 adjacent to the P-type layer 40 is a useful current I.
Collected as sc. However, in the M / PIN battery of the present invention, the photon flux passing through the semitransparent electrode 44 is absorbed by the N-type layer 42 and the non-depleted region of I-type a-Si: H. Outside the depletion region, the vacancy diffusion is 0.1
Since it is well known to those skilled in the art that it is smaller than micron, it is not possible to predict how much these regions contribute to the photocurrent. Unexpectedly, Isc does not decrease in the M / PIN battery of the present invention even if the thickness of the I-type a-Si: H layer 43 is increased to 2 microns. Type I a-
It only decreases slightly for the Si: H layer thickness of 3 microns.

A second M / PIN cell was introduced with a helium carrier to introduce a gas mixture of SiH ₄ containing 10% B ₂ H ₆ by opening valves 16a, 16c and a pressure of 2 torr, as described with reference to FIG. Bottom, made by first depositing boron-doped a-Si: H as layer 40 on a stainless steel substrate 11 by glow discharge. 2 micron a- as layer 43 and layer 42 on layer 40 to complete the M / PIN cell of FIG.
Si: H layer and 200-400Å N-type a-Si: H
Deposit layers. After depositing the semi-transparent electrode 44 and testing under AM1 sunlight, the high power Voc and Isc are measured as for the first M / PIN cell with the aB: H layer 40. However, the Isc output in the red part of the spectrum is B ₂ H ₆ / S less than the layer 40 deposited with aB: H only.
Higher for those co-deposited in iH ₄ . Similar high power Isc and Voc were measured under irradiation when P-type layer 40 was formed using B-doped a-Si: H and hydrogenated amorphous carbon aC: H. It Even if the a-Si: H layer 30 is deposited on the predeposition of the boron-containing P-type layer on stainless steel, P
Even though the -N junction is the deepest light irradiation area,
Seems to make improved properties.

FIG. 5 shows a tandem type M in which the photovoltaic devices of FIGS. 2 and 3 are connected in equilibrium with a common semitransparent electrode 53.
A / PIN / NIP conjugate is shown. First, an aB: H layer 50 is deposited to a thickness of 200Å on a stainless steel substrate 11 using a device as described in FIG. Then 2 micron thick intrinsic aS
An i: H layer 51 and a 200Å thick N-type layer 52 are deposited by glow discharge, resulting in the formation of an M / PIN as shown in FIG. 100Å thick Ni / C
The r alloy electrode 53 is vacuum deposited on the N-type layer 52, completing the first M / PIN stage. Instead of a Ni / Cr alloy, the semi-transparent electrode 53 may be a conductive metal oxide such as tin oxide having a thickness of 0.1 micron or more.

Using the process conditions described with reference to FIG. 2, an N-type layer 54 of about 200Å thickness and then an I-type a-Si: H layer 55 of 1 micron thickness were deposited by glow discharge to give M / NIP. It is formed. a-B: H P-type layer 56
Is preferably deposited after cooling the substrate 11 to about 100.degree. C., as was done for the second M / NIP cell described in FIG. The aB: H layer 50 on the substrate 11 is preferably deposited at a temperature of 180 ° C. or higher, while the top a- is deposited.
The B: H layer 56 is preferably deposited below 180 ° C. to maximize Voc. Layer 50 on stainless steel substrate 11 is a boron-doped a-Si: H
Or B / S as a-Si: H in that case.
It is preferable that the i ratio is 0.1% or more.

The semi-transparent electrode 57, AR coating 58 and contact fingers 59 are then ab: H layer 56 as before.
Evaporate on top. Electrode 1 without adjusting the current of each battery in series connection as required in conventional tandem device technology using suitable contact pads (not shown)
It is also possible to connect 1,57 in parallel. Under AM1 solar illumination, the output Isc is at least 20% higher when compared to either cell alone. The photon flux not absorbed by the first PIN conjugate passes through the layer 52 and at the interface with the aB: H layer 50 the a-Si: H layer 51.
The output power and efficiency will be negligibly low to generate minority carriers in the depletion region of. However, the second M / PIN connector obtains energy as if the P-type layer was first irradiated. This result occurring on the opaque electrode 11 cannot be explained if the depletion region remains 0.3 micron thick as previously reported.

FIG. 6 shows a cross-sectional view of an image device 70 in which the aB: H layer 60 is deposited by glow discharge with a free surface 60 'that receives electrostatic charges. Here, a 0.20 inch thick aluminum substrate 61
Is coated with a 0.25 micron Si ₃ N ₄ dielectric layer 66 by conventional plasma deposition or evaporation techniques. Then 10 micron a-Si: H layers 62 and 100
The Å a-B: H layer 60 is deposited on the dielectric layer 66 within a temperature of 180-410 ° C. using a glow discharge device as in FIG. The a-Si: H layer 62 may be deposited at 30-100 ° C and annealed at 200-250 ° C. In any case, the temperature at which the aB: H layer 60 is deposited is preferably 180 ° C. or lower. Finally, a protective organic coating 67 such as polyparaxylene can be deposited on layer 60.

If maintained below the macrocrystal temperature and below the temperature at which dark resistance and photoconductivity decrease due to hydrogen desorption, I
The type a-Si: H layer 62 is a low temperature CV in silane / helium.
It may be deposited by D. In order to form the I-type a-Si: H layer 62 if suitable photoconductivity, dark resistance and reverse bias charging are material specific, the present inventor's patent application no. Other deposition techniques such as sputtering and evaporation as described in 857,690 may be used.
The apparatus shown in FIG. 9 is particularly effective for image formation.

FIG. 7 schematically illustrates an electrophotographic apparatus that can be used to form an image on a connector such as the battery of FIG. Corona discharge wire 72 of housing 73
A cell 70 is placed on the conveyor of a dark chamber 76 in which a high negative surface potential is induced on the surface 66 '(or protective layer 63) of layer 66. The battery 70 is then transported to the second dark chamber 77. There, light from a tungsten sphere 74 is focused on a test object 76 with a suitable lens system. Then the battery 70
Toner (not shown) of suitable polarity is applied (in liquid or powder form) and carried to the development station 78 which is heat deposited from the lamp 79. Both liquid and powder toners formed good transfer images corresponding to the contours of the test object. It was also found that a conventional developing electrode (not shown) inverts the image.

FIG. 8 shows an electrode 34 and an AR coating 35.
2 a-B: H layer 3 of the M / NIP electrode shown in FIG.
An x-ray point discharge source that can be used to form an image on the surface 80 'of the cell 80 , such as the zero surface, is shown.
First, the a-B: H surface 80 'is negatively charged by the high voltage corona wire 82 in the electrostatic shield 83 placed in the dark chamber 86. After charging, battery 80 is conveyorized from chamber 86 to chamber 87, which is shielded, and exposed to x-rays from point source 84. X-rays cause the I-type a-Si: H layer 10 to become electrically conductive and discharge the electrostatic charge on the surface 80 '. The induced conductivity and the amount of discharged charge are a function of X-ray emissivity and exposure time. The dose of X-rays is reduced according to the subject 85 and accordingly a
-B: Discharge of charges on the H layer 30 is determined. The battery 80 is carried to a chamber 88 where commercial toner (powder or liquid) is applied and fused with heat from a lamp 89. The M / PIN battery of FIG. 3 was positively charged and formed a good image of subject 85 when the appropriate toner was used.

FIG. 9 shows a glow discharge deposition apparatus particularly suitable for coating a cylindrical substrate 90 used as an imaging member. The substrate 90 is made of an aluminum cylinder 6 inches in diameter and 18 inches long supported by a rod 94 in an insulated bearing barrel 95 in a pedestal 93. Enclosure 100 is made of 12 inch diameter and 28 inch long stainless steel tubing 91 with top plate 97 and provides a vacuum-tight, closed structure when placed on a table with suitable gaskets. Has become. Cylindrical electrode 92 (top plate 9
(Electrically coupled to 7) is placed coaxially to the surface 99 of the substrate 90 with a gap d from the top surface 99 as shown. Gas G passes from a storage tank and a control valve (not shown) through plate 97 to nozzle 120.
Easily injected by. As discussed with respect to FIG. 1, a suitable gas for forming a-Si: H is SiH ₄
Alternatively, disilane can be used, and examples of the silicon dopant include phosphine, arsine, diborane, and the like. Gas G is exhausted through the gap and through a vacuum pump 131 connected through a valved stainless steel conduit 98. The power supply 132 is the enclosure member 9 that is grounded to the support rod 94 of the substrate 90.
A strong electric field region Es, which is connected between the electrodes 1, 92, 93, and 97, is induced in the gap d between the electrodes 92 and 99, and a weak electric field region Ew is induced in the surface of the substrate 90. A heater wire 96 with a suitable ceramic insulator is attached to the table 93, and a part of the gas G is thermally decomposed to form a silicon compound, which diffuses into the plasma part P and promotes glow discharge.
A cylindrical block 134 on the platform 93 shields the bearing barrel 95 which is insulated from the silicon-containing compound.

The operation of the device is similar to that described in FIG.
A negative voltage of 500 to 1500 volts is applied to the substrate 90, and glow discharge is started through the gas G at the pressure PG in the strong electric field region Es. The diffusive component of the glow discharge plasma P is then positioned in the weak electric field region Es above the active surface of the substrate 90 by adjusting the pressures PG and V. Furthermore, the SiH ₄ a-Si: Upon depositing H, power by passing a sufficient current (not shown) to the heater wire 96, some of the SiH ₄ is thermally decomposed, and the plasma is some of the silicon-containing fragment Diffuse into P and onto the surface of substrate 90, thereby forming coating 130. The deposition rate is enhanced by these pyrolyzed fragments and the electrical resistivity of the a-Si: H thin film 130 is increased to make the coating 130 particularly suitable for imaging devices. The coating 130 is either deposited on the substrate 90 maintained at 180-410 ° C by a heater (not shown) or on the substrate 90 kept at 30-100 ° C and then annealed at 200-300 ° C. Be done.

In order to complete the image forming PN junction,
The a-B: H layer 131 is a-Si: H as described in FIG.
It is deposited on the surface of layer 130 by glow discharge. Figure 7
In the test of the electrophotographic apparatus as shown in FIG.
The B: H top layer 131 was charged above 100 volts. Devices made with the device shown in FIG. 9 are shown in FIGS.
It has good imaging properties with any combination of P, I, N and blocking layers as described above (without electrodes 34, 44 and AR coatings 36, 46). Also, the solar cells, rectifier diodes and planar transistors made with the device of Figure 9 exhibit improved characteristics.

When adding aB: H to aC: H or a-Si: H, a gas containing boron, for example, BF ₃ may be diluted with hydrogen before use. Paragraph 6 of U.S. Pat. No. 3,069,283, issued Dec. 18, 1962.
Note that the inventor previously used BF ₃ as a gas source for coating a thin film of boron with a glow discharge, as described in. However, the present invention relies on a-Si and a-B contact and it is preferred to control each deposition temperature.

Furthermore, the present inventors have found that when the deposition temperature of the N-type layer 42 is lowered to 100 ° C., Voc in the M / PIN structure is obtained.
Found to increase by as much as 50 mV. This is surprising since Type I a-Si expresses maximum Isc when deposited at 180 ° C. and above. In fact, in the past, since all a-Si thin films act electrically,
It had to be deposited and annealed above 180 ° C. This increase in voltage occurs when silane is mixed with a phosphine or arsine dopant gas during the formation of layer 42 using a device such as that shown in FIG.

It is therefore clear that the concepts described thus far form the basis of solar energy conversion, rectifying junctions as circuit elements with opaque electrodes and improved photovoltaic devices useful in image devices. is there. The semiconductor device of the present invention can be used to make an improved bipolar transistor. Other applications and combinations will be easy for those skilled in the art.

[Brief description of drawings]

FIG. 1 is a first apparatus for glow discharge deposition and doping of amorphous boron, amorphous silicon and amorphous carbon.

FIG. 2 is a sectional view of an M / NIP semiconductor showing a first embodiment of the present invention.

FIG. 3 is a sectional view of an M / PIN semiconductor showing a second embodiment of the present invention.

FIG. 4 is a graph showing a boron / silicon ratio in an amorphous boron / amorphous silicon connection body.

FIG. 5 is a sectional view of a tandem semiconductor device representing a third embodiment of the present invention.

FIG. 6 is a sectional view of an image forming apparatus representing a fourth embodiment of the present invention.

FIG. 7 is a schematic view of an electrophotographic developing device.

FIG. 8 is a schematic view of an X-ray electrophotographic apparatus showing a fifth embodiment of the present invention.

FIG. 9 is a schematic diagram of a second apparatus for pyrolysis of a silicon-containing gas.

Claims (1)

[Claims] 1. A substrate is a laminate having an N-type semiconductor layer, an I-type semiconductor layer provided adjacent to the N-type semiconductor layer, and a P-type semiconductor layer provided adjacent to the I-type semiconductor layer. In the method for manufacturing a semiconductor device provided above, a step of forming a deposited film made of amorphous silicon as the I-type semiconductor layer at a first substrate temperature, and comprising amorphous boron containing hydrogen as the P-type semiconductor layer The deposited film is the first
And a step of forming the second substrate temperature different from the second substrate temperature.