JPH06313764A - Ultrasonic signal processor - Google Patents

Abstract

PURPOSE:To improve the effective accuracy of A/D conversion with a simple configuration by using the oversampling method for digital processing of ultrasonic signals and then performing accumulation addition processing after shifting to a low frequency. CONSTITUTION:A plurality of analog reception signals received by a transmitter/ receiver 23 consisting of a group of aligned wave reception element are digitized by a A/D converter and then are mixed with a reference signal, where time is precisely controlled, from a digital reference signal generation circuit 19 and then are converted to low-frequency signals. Then, accumulation addition processing is performed by a digital adder 4 for accumulation addition, thus extracting low-frequency components. Then, the signals which are subjected to accumulation addition are delayed by a digital delay circuit 7 and then signals which are delayed by a digital adder 3 are added, thus phasing the digital signal accurately.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing apparatus such as an apparatus for nondestructively inspecting an object by ultrasonic waves or an ultrasonic apparatus used for medical diagnosis, and more particularly to an ultrasonic signal processing apparatus suitable for digitization. Is.

[0002]

2. Description of the Related Art Conventionally, an ultrasonic wave receiving device is composed of an analog delay circuit, an adder, etc., and after radiating ultrasonic waves to an inspection object (for example, inside the body), the reflected waves from the inspection object are arrayed. The direction of the reception beam is changed by adjusting the delay time between the reception signals received by the wave receiving element group. A large output is obtained as the total output by matching the incident direction of the ultrasonic waves and the forming direction of the reception beam and adding the outputs of the arrayed wave receiving elements in the same phase. Further, the signals received by the array receiving elements from other than the target have mutually different phases, and therefore cancel each other out, resulting in a suppressed output as the total output. As described above, in the conventional method, the signals received by the plurality of receiving elements are phase-matched and the resolution is increased by adding them, so that it is necessary to improve the delay time accuracy of the analog delay circuit. There was a problem in terms of configuration complexity and cost. Therefore,
In order to solve the above-mentioned problems, a method for realizing a device which has a simplified device configuration and mainly includes an analog circuit that does not require high delay time accuracy has been proposed in the past. This is an ultrasonic phasing method, which is a so-called frequency shifting method, in which the center frequency of the received signal is moved and then the signal delay processing and addition processing are performed. This method mixes a signal from an ultrasonic receiving element with a reference signal whose time is precisely controlled to convert it into a low frequency signal, delays the low frequency signal component by a delay circuit, and finally, This is a method of constructing a phasing unit for ultrasonic signals from the respective portions for adding the signals from.

FIG. 2 is a block diagram of a conventional analog ultrasonic signal processing apparatus using the frequency shift phasing method.
In FIG. 2, 23 is an ultrasonic wave transmitter / receiver, 14 is an analog mixer, 6 is an analog delay circuit whose delay time can be set, 2 is an analog adder, 18 is an analog reference signal generation circuit, and 8 is an analog delay. It is a control circuit. Now, assuming that time is t and a transmission signal whose center frequency is ω _S is s (t), s (t) = A ₀ (t) {exp (jω _S t) + exp (−jω _S t)} ( It can be approximated as 1). Note that A ₀ (t) is the envelope shape of the transmission signal, and j is the imaginary unit. The reception signal f _n (t) of the target reflection signal generated by this transmission signal by the n-th array receiving element is _expressed by the following equation (2) when the propagation time of the sound wave is τ _n . _{f n (t) = k n} s (t-τ n) = k n A 0 (t) {exp (jω S t) + exp (-jω S t)} = A n (t-τ n) [exp { jω _S (t−τ _n )} + exp {−jω _S (t−τ _n )}] = A _n (t−τ _n ) [exp {j (ω _S t−φ _n )} + exp {−j (ω _{S t-φ n)}]} ... (2) where a _{a n = k n a 0,} k n is determined by the propagation distance of the reflected sound wave coefficient, the phi _n is a value indicating the phase difference. next,
In the analog mixer 14, this signal f _n (t) and the reference signal h generated by the analog reference signal generation circuit 18 are used.
Multiply with _n (t). Now, for the sake of simplicity, _let h _n (t) be a signal having the same frequency as the carrier wave of the received signal, and the phase term φ _n is taken into consideration and defined as in the following equation (3). _{h n (t) = exp {} -j (ω S t-φ n)} ... (3) the multiplication result g _n (t) is represented by the following formula (4). _{g n (t) = f n} (t) h n (t) = A n (t-τ n) [1 + exp {-2j (ω S t-φ n)}] ... (4) where the carrier DC G focusing only on the components
_n (t) is expressed by the following equation (5). G _n (t) = A _n (t−τ _n ) ... (5) If a signal obtained by delaying this waveform by the time τ ₀ −τ _n by the analog delay circuit 6 is V _n (t), this value is It becomes like Formula (6). V _n (t) = G _n (t−τ _n − (τ ₀ −τ _n )) = A _n (t−τ ₀ ) ... (6) where τ ₀ is a constant determined by the analog delay circuit 6. . As described above, the signal V _n (t) is obtained by moving A _n (t) with time, and since A _n is a constant multiple of the envelope A ₀ of the transmission signal, its waveform shape does not depend on n. It will be constant.
Therefore, the value Y obtained by adding 1 to N by the analog adder 2
(T) is the final result (see the following equation (7)).

[Equation 1] In this way, the added value Y (t) grows greatly because the phases of the signals match. On the other hand, for signals from directions other than the target direction, each signal has a phase different from φ _{n in} equation (3), and a phase term remains in equation (5). Due to this,
Since the interference due to the phase difference occurs during the addition in the equation (7), the signal of the addition result is attenuated. With the operation principle described above, it is possible to select the received signal from the target direction. Related to this type of device, there are, for example, the official gazette of Japanese Patent No. 1333370 and the specification of US Pat. No. 4140022.
The structure shown in FIG. 2 is usually composed of an analog circuit, but it is desirable to be composed of a digitized arithmetic unit in order to improve the precision of phasing and further improve the device.

FIG. 3 is a diagram showing the configuration of an apparatus when the ultrasonic signal processing apparatus shown in FIG. 2 is digitized, and FIG. 4 is an apparatus configuration when an oversampling method is applied to the ultrasonic signal processing apparatus shown in FIG. FIG. 5 is a diagram showing a conventional ultrasonic signal waveform. In the case of simply digitizing a device composed of a conventional analog circuit, for example, as shown in FIG.
It is conceivable to configure the device as follows. In Figure 3,
Using the analog-digital converter 5, the analog mixer 14, the analog delay circuit 6, the analog adder 2, the analog reference signal generation circuit 18, and the analog delay control circuit 8 shown in FIG. A digital signal delay circuit 7, a digital delay circuit 7, a digital adder 3, a digital reference signal generation circuit 19, and a digital delay control circuit 9 are used. With this configuration, a large number of bits, such as 10 bits or more, are required as the amplitude accuracy of the analog-digital converter (A / D) in normal ultrasonic applications. This leads to an increase in the complexity and cost of the device, and it becomes impossible to achieve high speed. Therefore, it is conceivable to apply a so-called oversampling method, which is a method that uses both known high-speed sampling and cumulative signal processing, to increase the effective number of bits.
For example, in the configuration example of FIG. 4, the cumulative addition digital adder 4 for calculating the sum of a plurality of signals is arranged between the analog-digital converter 5 and the digital mixer 15 shown in FIG. Here, although the effect of the oversampling method depends on the number of times of cumulative addition, since the waveform of the ultrasonic signal has a shape as shown in FIG. 5, if the amplitude change is within Δ, the cumulative time length is within T _0. It is limited to, and a significant improvement in accuracy cannot be expected. Note that in FIG. 5, A (t) indicates an envelope having the same shape as the transmission signal s (t). The waveform shape of FIG. 5 is a typical example in a conventional ultrasonic device.

[0005]

As described above, in the prior art, a digital signal of 10 bits or more was required to realize a highly accurate digital phasing process, so that the analog-digital converter can be simplified. It was difficult to convert. Further, it has been difficult to simultaneously improve the amplitude accuracy and the sampling frequency of the analog-digital converter in response to a received signal having a high center frequency. Further, there is a problem in that the analog-digital converter cannot cope with the case where the sampling frequency is not sufficiently higher than about twice the upper limit frequency of the received signal component. The object of the present invention is to improve such problems, particularly in a received signal with a high center frequency, equivalently greatly improve the accuracy of the analog-digital converter, and simplify the configuration of the device.
An object is to provide an ultrasonic signal processing device suitable for cost reduction.

[0006]

In order to achieve the above object, an ultrasonic signal processing apparatus according to the present invention comprises: (a) After radiating an ultrasonic wave to an inspection object, an array receiving element of reflected waves from the inspection object. In an ultrasonic signal processing device that receives a group of signals and adjusts the delay time between the received signals to change the direction of the receiving beam and visualizes the detected inspection object, multiple analog receptions received by the array receiving element group Digitizing means (5 in FIG. 1) for digitizing a signal, and digitizing means (5)
The waveform converting means (15) for converting the signal waveform by multiplying the digital signal obtained by the above with the reference signal of the predetermined frequency, and the accumulating means (4) for cumulatively processing the signal converted by the waveform converting means (15). ) And cumulative means (4)
Delay means (7) for delaying the signal cumulatively processed by
And an adding means (3) for adding a plurality of signals delayed by the delay means (7). Further, (b) digital signal waveform conversion means (5)
In addition to the above, it is characterized in that it is provided with an analog signal waveform converting means (14 in FIG. 2) or a separate digital signal waveform converting means (17 in FIG. 10). Also, (C)
First and second waveform converting means (16, 17 in FIG. 10) are provided as digital signal waveform converting means, and the output end of the first waveform converting means (16) is at the input end of the accumulating means (4). It is also characterized in that the output terminal of the accumulating means (4) is connected to the input terminal of the second waveform converting means (17). Further, (c) first and second waveform converting means (16 and 17 in FIG. 10) are provided as digital signal waveform converting means, and the output end of the first waveform converting means (16) is an accumulating means (4). ) Connected to the input end of the second waveform conversion means (1
It is also characterized in that a plurality of circuit means consisting of 7), delay means (7) and adding means (3) are connected in parallel to the output terminal of the accumulating means (4). In addition, (d) cumulative addition means (see FIG.
It is also characterized in that it is provided with a storage means (10) for storing the signal which has been subjected to the cumulative processing by 22) of 1). Also,
(E) After the ultrasonic wave is radiated to the inspection target, the reflected wave from the inspection target is received by the array receiving element group, the delay time between the reception signals is adjusted to change the direction of the reception beam, and the detected inspection is performed. In an ultrasonic signal processing device for visualizing an object, an analog waveform converting means for converting a signal waveform by multiplying a plurality of analog reception signals received by an array receiving element group and an analog reference signal of a predetermined frequency (Fig. 8). 14)
And a filter means (11) for passing a low frequency component of the signal waveform converted by the analog waveform converting means (14).
A digitizing means (5) for digitizing the output signal of the filter means (11), and a digitizing means (5)
A digital waveform converting means (15) for converting a signal waveform by multiplying the digital signal obtained by (1) with a reference signal of a predetermined frequency, and a digital waveform converting means (1
5) a cumulative addition means (4) for cumulatively processing the signal converted, a delay means (7) for delaying the signal cumulatively processed by the cumulative addition means (4), and a plurality of delay means (7) for delaying the signal. It is also characterized in that it comprises an adding means (3) for adding signals. It is also characterized in that it has a plurality of (f) digital waveform converting means (16, 17 in FIG. 15). Further, as (g) digital waveform converting means, first and second digital waveform converting means (see FIG.
5, 16 and 17), the output terminal of the first digital waveform converting means (16) is connected to the input terminal of the accumulating means (4), and the second digital waveform is applied to the output terminal of the accumulating means (4). It is also characterized in that the input end of the conversion means (17) is connected. Also, (h) a first digital waveform converting means
And second digital waveform converting means (16, 1 in FIG. 19)
7), the output end of the first digital waveform conversion means (16) is connected to the input end of the cumulative addition means (4), and the second digital waveform conversion means (17), the delay means (7) and the addition It is also characterized in that a plurality of circuit means comprising the means (3) are connected in parallel to the output end of the accumulating means (4). Further, it is also characterized by including a storage means (12) for storing the signal obtained by the (i) accumulating means (4 in FIG. 21). Further, the (n) accumulating means (4) has the bandwidth of the envelope of the transmission signal indicated by the low frequency component of the output of the digital waveform converting means (15) as BW, the sample frequency of the digitizing means (5) as ADFQ, It is also characterized in that it is means for cumulatively processing the digitally converted signal so that when the cumulative number of times is COUNT, COUNT ≦ (ADFQ / BW). (L) The analog waveform converting means (14) has a reference signal frequency of ω _a , a received signal center frequency of ω _S , and a transmission signal envelope represented by a low frequency component of the output of the digital waveform converting means. It is also characterized by a means for multiplying the received signal by the reference signal set so that ω _a ≦ ω _S − (BW / 2) when the bandwidth of B is BW. Further, the signal processing device of the present invention is (a) a signal processing device provided with a receiving means for receiving an analog signal and a digitizing means for digitizing an analog received signal obtained by the receiving means. It is characterized by comprising waveform conversion means for mixing the digital signal thus obtained with a reference signal of a predetermined frequency to convert it into a low frequency signal, and accumulating means for cumulatively processing a plurality of signals converted by the waveform conversion means. There is. Further, in addition to (f) digital waveform converting means and accumulating means, analog waveform converting means for converting a signal waveform by multiplying an analog received signal by an analog reference signal of a predetermined frequency, and analog waveform converting means It is also characterized by further comprising a filter means for passing a low frequency component of the signal waveform.

[0007]

According to the present invention, the oversampling technique is used for the digital processing of the ultrasonic signal, and the cumulative addition processing is performed after the frequency is moved to the low frequency. Improve to. In particular, by using an oversampling method in which an ultrasonic signal with a high center frequency is moved to a low frequency by analog signal processing, and then the frequency is moved to a low frequency by digital signal processing, and then cumulative processing is performed, a simple configuration is achieved. Therefore, even in the case of an ultrasonic signal having a high center frequency, the effective accuracy of analog-digital conversion can be significantly improved.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. [First Embodiment] FIG. 1 is a block diagram of an ultrasonic signal processing apparatus for realizing highly accurate digital phasing processing according to the first embodiment of the present invention. FIG. 6 shows the apparatus of FIG. It is a figure which shows the obtained ultrasonic waveform, and FIG. 7 is explanatory drawing of the frequency shift method of the received signal in a present Example. In FIG. 1, a cumulative addition digital adder 4 for calculating the sum of a plurality of signals is arranged between the digital mixer 15 and the digital delay circuit 7 shown in FIG. The accumulated signal in this case is the low frequency component G _n (t) of the output of the digital mixer 15, that is, A _n (t−τ _n ) corresponding to the envelope shape, according to the equation (5). Therefore, as shown in FIG.
The cumulative processing can be performed in a relatively long time of T ₁ , which is a sufficiently long time as compared with T ₀ shown in FIG. Next, the number of cumulative additions in the cumulative addition digital adder 4 will be described. The spectrum-a in FIG. 7 is the amplitude spectrum of the transmission signal s (t). Here, BW is the bandwidth of the envelope A (t). Actually, by sampling with the analog-digital converter 5, the spectrum-a in FIG. 7 folds the sample frequency of the analog-digital converter 5 into a cycle, but here the sample frequency of the analog-digital converter 5 is The folding spectrum is omitted, assuming that it is sufficiently larger than the center frequency ω _S. To spectrum -a 7, multiplied by exp (-jω _S t) in digital mixer 15, by extracting the low frequency component in cumulation for digital adder 4, in the spectrum of the adder output, FIG. 7 The envelope spectrum appears around the zero frequency as in the spectrum-b. At this time, the analog-digital converter 5
The sampling frequency of the signal is ADFQ, and the number of times of cumulative addition in the cumulative addition digital adder 4 is COUNT. The sampling frequency of the signal drops to (ADFQ / COUNT). The larger the number of cumulative additions in the cumulative digital adder 4, the more remarkable the effect of improving the S / N by the oversampling method, and therefore the folding of the (ADFQ / COUNT) cycle cannot be ignored.

The spectrum -c in FIG. 7 has a center frequency ω _n.
= (ADFQ / COUNT).
In order to completely reproduce the envelope, the folded spectra must not overlap each other, and therefore the following expression (8) must hold. COUNT ≦ (ADFQ / BW) (8) Thus, the bandwidth BW of the envelope and the sampling frequency (ADFQ / COUNT of the analog-digital converter 5
The condition of the cumulative number of times is automatically determined from (T). However, even if the folding spectra overlap to some extent, it is not necessary to satisfy the expression (8) when the S / N improvement by the cumulative number of times is prioritized. By the way, in FIG. 1, according to the sampling theorem, the sampling frequency of the analog-digital converter 5 must be at least twice the required upper limit frequency of the frequency band of the transmission signal s (t). Here, if the upper limit frequency is about 5 MHz, the sampling frequency of the analog-to-digital converter 5 may be 10 MHz or more. An analog-to-digital converter that is easily available at present, for example, a 25-MHz analog-to-digital converter can be used. Full oversampling is possible. Furthermore, if the analog-digital converter 5 has an operating frequency of 25 MHz, the operating frequency of the digital mixer 15 will also be 25 M.
Hz, which is easy to integrate. Therefore, it can be said that the device configuration shown in FIG. 1 is optimal for high-precision digital phasing processing. However, assuming that the upper limit frequency is 15 MHz, the sampling frequency of the analog-digital converter 5 is at least 30 MHz, and an analog-digital converter having a very high operating frequency is required for oversampling ( 30 MH
An analog-to-digital converter (A / D) which is expensive and consumes a large amount of power is required. In addition, the operating frequency of the digital mixer 15 also increases, making integration difficult. As described above, in the configuration example shown in FIG. 1, it is difficult to handle a high frequency ultrasonic signal.

[Second Embodiment] FIG. 8 is a block diagram of an ultrasonic signal processing apparatus according to a second embodiment of the present invention. In FIG. 8, 14 is an analog mixer, 11 is an analog-pass filter, 5 is an analog-digital converter, and 15
Is a digital mixer, 4 is a cumulative digital adder, and 7
Is a digital delay circuit, and 3 is a digital adder.
Reference numeral 18 denotes an analog reference signal generation circuit used when the received signals are analog-mixed by the analog mixer 14, and 19 is a digital reference signal generation used when the analog-digital converted reception signals are digitally mixed by the digital mixer 15. The circuit, 9 is a digital delay control circuit. The received signal of the n-th element is expressed by the following equation (9). f _n (t) = A _n (t−τ _n ) [exp {j (ω _S t−φ _n )} + exp {−j (ω _S t−φ _n )}] ... (9) Expression (9) above When is expressed as a real number, the following expression (10) is obtained. f _n (t) = 2A _n (t−τ _n ) cos (ω _S t−φ _n ) ... (10) The signal of the formula (10) and the reference signal m _n (t) generated by the analog reference signal generation circuit 18 The analog mixer 14 performs multiplication with. For simplicity, if the phase of m _n (t) at t = 0 is 0, the reference signal m _n (t) becomes as shown in the following expression (11). m _n (t) = cos (ω _a t) (11) The multiplication in the analog mixer 14 is a multiplication of real numbers. Therefore, the multiplication result o _n (t) becomes a result as in the following Expression (12). _{o n (t) = f n} (t) m n (t) = A n (t-τ n) [cos {(ω S + ω a) t-φ n} + cos {(ω S -ω a) t- φ _n }] (12) By passing through the analog low pass filter 11,
The following expression (13) is obtained. o _n (t) = A _n (t−τ _n ) cos {(ω _S −ω _a ) t−φ _n } ... (13) When this equation (13) is returned to the complex representation, the following equation (14) is obtained. Become. _{o n (t) = A n} (t-τ n) [exp {j ((ω S -ω a) t-φ n)} + exp {-j ((ω S -ω a) t-φ n)} ] ... (14) (14) is for the omega _S in equation (9) is replaced with ω _S -ω _a, ω _S -ω the center frequency of the received signal from the omega _S
This means that the value is lowered to a, and the configuration after the analog-digital converter 5 becomes easy when ω _S is large. If ω _S −ω _a is newly considered as ω _S , the signal processing after Expression (14) is equal to the processing described using Expression (3) to Expression (7). Further, the reference signal in the analog reference signal generation circuit 18 may be replaced by the following expression (15). _{m n (t) = cos (} ω a t-φ n) ... (15) At this time, the output of the analog lowpass filter 11,
The following expression (16) is obtained. _{o n (t) = A n} (t-τ n) cos {(ω S -ω a) t} ... (16) In this case, consider a new omega _S of omega _S - [omega] _a in the same manner as described above And the multiplication in the digital mixer 15 is
7), which is common to each element. h _n (t) = exp (−jω _S t) (17)

FIG. 9 is a frequency characteristic diagram showing a state in which the frequency spectrum of the received signal changes due to analog mixing. The frequency of the reference signal multiplied by the analog mixer 14 in FIG. 8 will be described. The frequency spectrum of the transmission signal s (t) is set to spectrum-a shown in FIG.
Further, as in the case of FIG. 7, the folded spectrum having the sampling frequency of the analog-digital converter 5 as a period is omitted. Here, BW is the bandwidth of the envelope. Since the analog mixer 14 performs multiplication with cos (ω _a t),
The output spectrum of the analog low-pass filter 11 is shown in FIG.
The spectrum-b shown in FIG. At this time, if the two envelope spectrums existing at the positive and negative frequencies overlap, the envelope cannot be reproduced by the subsequent operation. Therefore, in order to completely reproduce the envelope, the condition of the following expression (18) is required. ω _a ≦ ω _S − (BW / 2) (18) In this case, even if the spectra of the envelopes are slightly overlapped, s
When giving priority to lowering the center frequency of (t),
There is no need to satisfy (18). In the following explanation,
The center frequency ω _S −ω _a of the received signal moved to the low frequency by the analog frequency shift is regarded as a new ω _S, and the discussion proceeds. Now, in the above equation (3), the reference signal h _n (t) is set as in the following equation (19). h _n (t) = exp {−j (ω _S t−φ _n )} (19) The h _n (t) in the above equation (19) may be a real function instead of a complex function. At this time, the real function h _n (t) is represented by the following equation (20). _{h n (t) = cos (} ω S t-φ n) ... (20) multiplication result g _n (t) is as shown in the following equation (21). _{g n (t) = f n} (t) h n (t) = A n (t-τ n) [1 + cos {2 (ω S t-φ n)}] ... (21) where only the low-frequency component Focusing attention, G _n (t) is given by the equation (5) as described above.

Next, the center frequency ω _S of the transmission signal and the propagation time τ _{n of the} sound wave are unknown, and the approximate value ω _m of the center frequency ω _S is
Also, a case where the time difference between each element reception signal and the reference reception signal is known will be described. That is, the reference received signal is f
_{If 1} (t), then τ _n −τ ₁ is known. At this time, the reference signal h _n (t) is expressed by the following equation (22). h _n (t) = exp [−j {ω _m t − (ω _m + ω _a ) (τ _n −τ ₁ )}] (22) The low frequency component (that is, the DC component) of the multiplication result g _n (t). )
Is expressed by the following equation (23). G _n (t) = A _n (t−τ _n ) exp [+ j {(ω _S −ω _m ) (t−τ _n ) − (ω _m + ω _a ) τ ₁ }] (23) The above equation (23) _Let V _n (t) be a signal obtained by delaying) by τ _n −τ ₁ , V _n (t) is given by the following equation (24). V _n (t) = g _n (t + τ _n −τ ₁ ) = A _n (t−τ ₁ ) exp [+ j {(ω _S −ω _m ) (t−τ ₁ ) − (ω _m + ω _a ) τ ₁ }] = A _n (t−τ ₁ ) exp [+ j {(ω _S −ω _m ) t−φ ₁ }] (24) As is apparent from the above equation (24), the value of V _n (t) Is
It does not depend on n and is constant. However, φ ₁ = − (ω _S + ω _a ) τ
_{Is 1} . At this time, since the above equation (24) is a complex number,
The envelope is obtained by taking the absolute value. That is, when the reference signal h _n (t) is a real function in the above equation (22),
It is expressed by the following equation (25). h _n (t) = cos {ω _m t − (ω _m + ω _a ) (τ _n −τ ₁ )} (25) At this time, V _n (t) is represented by the following equation (26). V _n (t) = A _n (t−τ ₁ ) cos {(ω _S −ω _m ) t−φ ₁ } ... (26) In the above equation (26), when ω _S and ω _m are almost equal,
Since φ ₁ is unknown, the envelope cannot be obtained. However, if ω _S and ω _m are made different from each other so that the envelope spectra centered around the frequency ± (ω _S −ω _m ) in the spectrum of the above equation (26) do not overlap, the envelope can be obtained. To be However, even in that case, since the trigonometric function term representing the carrier signal of the received signal remains, further detection processing is required after the processing in the digital adder 3. In the above description, when the center frequency ω _S of the transmission signal and the propagation time τ _{n of the} sound wave are unknown,
The case where the approximate value ω _{m of} ω _S and the time difference τ _n −τ ₁ between the received signal of each element and the reference received signal are known is described.
_S and time difference between each element received signal and reference received signal τ _n
The signal processing when −τ ₁ is known and when the approximate values ω _m and τ _{n of} ω _S are known can be easily inferred from the above-described present embodiment.

[Third Embodiment] FIG. 10 shows a third embodiment of the present invention.
FIG. 3 is a block configuration diagram of an ultrasonic signal processing device in the example of FIG. This embodiment is a modification of the first embodiment shown in FIG. That is, in this embodiment, in addition to the digital mixer 16, another digital mixer 1
7, and a reference signal generation circuit 21 is provided. That is, the multiplication with the reference signal h _n (t) in the equation (3) is
Do it in two steps. For this, decomposes _{h n (t) = exp {} -j (ω S t-φ n)} = exp (-jω S t) exp (jφ n) ... (27), considered as 2 multiplications This enables the configuration shown in FIG. The reference signal h _n (t) is divided into two multiplications only when h _n (t) is a complex function. In FIG. 10, reference numerals 16 and 17 denote digital mixers, which replace the multiplication by the digital mixer 15 shown in FIG. Reference numerals 20 and 21 denote digital reference signal generation circuits used when digital mixing is performed by the digital mixers 16 and 17. Digital mixer 16
Signal waveform p (t) used for the first digital mixing by
Is expressed by the following equation (28) which is common to all the elements. p (t) = exp (-jω S t) ... and (28), the digital mixer 17, a digital reference signal q generated by the digital reference signal generating circuit 21
_n (t) (this is different for each element) is expressed by the following equation (2
9). q _n (t) = exp (jφ _n ) ... (29) These p (t) and q _n are stored in the digital mixers 16 and 17.
(T) is multiplied to compensate for the mutual phase difference. In such a configuration, it is possible to simultaneously receive signals from a plurality of positions within the subject by holding only the digital mixer 17 or later in parallel or performing multiple processing.

FIG. 11 is a block diagram showing a single signal processing configuration according to the third embodiment of the present invention.
FIG. 8 is a timing chart of control signals in the third embodiment. In FIG. 11, 26 is a digital multiplier corresponding to the digital mixers 16 and 17 of FIG.
Multiplication is performed using reference signals having different phases by 0 degree. Reference numeral 22 is a cumulative addition digital adder, 10 is a temporary storage for the addition result of the digital adder 22, and these two correspond to the cumulative addition digital adder 4 in FIG. The time relationship between the control signals is as shown in FIG. In this embodiment, the analog-digital conversion command (A
/ D conversion) ADC, end of accumulation and output command of result (accumulation /
Output) RSC and the like suppress noise by synchronizing with the transmitted signal. Further, in FIG. 10, it is also possible to change the control data generated by the digital reference signal generation circuit 21 and the digital delay control circuit 9 with time to continuously move the focus position. FIG. 13 is a block diagram showing another processing configuration of a single signal in the third embodiment of the present invention. In the configuration example of FIG. 13, a digital weighting means 24 is arranged between the digital adder 22 for cumulative addition and the temporary storage 10 shown in FIG. 11, and is configured to give different weights to each data at the time of addition. . As a result, each control signal (analog-digital conversion command (A /
Since the time relationship between the D conversion) ADC, the end of cumulative addition and the resulting output command (cumulative / output) RSC, and the digital weight generation command W) is as shown in FIG.
The digital data individually weighted in 4 are added and output. That is, the weighting means 24 individually outputs 0.5, 1.
After weighting 0, 1.0, and 0.5, the cumulative output command RSC is issued at every fourth weighting timing to output to the digital mixer 17 in the next stage.

[Fourth Embodiment] FIG. 15 shows a fourth embodiment of the present invention.
FIG. 3 is a block configuration diagram of an ultrasonic signal processing device in the example of FIG. This embodiment is a modification of the second embodiment shown in FIG. 8. Basically, the configuration of the third embodiment shown in FIG. 10 is basically the same as that of the analog mixer 14 shown in FIG. A signal generation circuit 18 and an analog low pass filter 11 are added. FIG. 16 is a block diagram showing the single-signal processing configuration according to the fourth embodiment of the present invention. 16, 25 is an analog multiplier corresponding to the analog mixer 14 in FIG. 15, 13 is an analog low-pass filter corresponding to the analog low-pass filter 11 in FIG. 15, and 26 is a digital mixer 16, 17 in FIG.
Is a digital multiplier corresponding to, and performs multiplication using reference signals having a 90-degree phase difference. Further, 1 is a digital adder for complex multiplication. Further, reference numeral 22 is a cumulative addition digital adder, and 10 is a temporary storage of the addition result of the digital adder 22, which corresponds to the cumulative addition digital adder 4 of FIG. Similar to the third embodiment, each control signal
The time relationship of (ADC, RSC) is as shown in FIG. 12, and the conversion command ADC, the cumulative output command RSC, etc. are suppressed in noise by synchronizing with the transmission signal. Further, similarly to the third embodiment, the focus position can be continuously moved by changing the control data generated by the digital reference signal generation circuit 21 and the digital delay control circuit 9 in FIG. 15 with time. Is. Figure 17
It is a block diagram which shows the other process structure of the single signal in the 4th Example of this invention. In this embodiment, similarly to the configuration shown in FIG. 13, a digital weighting means 24 is arranged between the cumulative digital adder 22 shown in FIG. 16 and the temporary memory 10, and each data is different at the time of addition. Configure for weighting. Similar to the case of FIG. 13, since the time relationship of each control signal is as shown in FIG. 14, the digital data individually weighted by the digital weighting means 24 is added and output.

[Fifth Embodiment] Next, a configuration in which the processes after the digital mixer 17 shown in FIG. 13 are held in parallel will be described. FIG. 18 is a block diagram of the ultrasonic signal processing apparatus according to the fifth embodiment of the present invention. FIG.
10, the reference numerals are the same as those used in FIG. 10, except that blocks 121 to 123 each include a digital mixer 17, a digital delay circuit 7, and a digital adder 3 and are configured in parallel. Is to be done. Further, a1 to a3 are outputs from the block 121, b1,
b2 is an output from the block 122, and c1 and c2 are outputs from the block 123, which show signal values corresponding to the beams of the ultrasonic waves formed in the respective blocks.
In this way, by providing the three delay addition parts in parallel after the cumulative addition digital adder 4, the time addition method is used.
Receive beams in two different directions can be formed.

[Sixth Embodiment] FIG. 19 shows a sixth embodiment of the present invention.
FIG. 3 is a block configuration diagram of an ultrasonic signal processing device in the example of FIG. In this embodiment, basically, the analog mixer 14, the analog reference signal generating circuit 18, and the analog low pass filter 11 shown in FIG. 8 are added to the configuration of the fifth embodiment shown in FIG. . [Seventh Embodiment] Next, a configuration for storing all the signals after the oversampling process and correcting the blur will be described. FIG. 20 is a block diagram of the ultrasonic signal processing apparatus in the seventh embodiment of the present invention. In FIG. 20,
Reference numeral 12 denotes a digital signal storage unit arranged between the cumulative addition digital adder 4 and the digital mixer 17.
It is a characteristic constituent part in the seventh embodiment. The digital signal storage unit 12 efficiently stores data necessary for blur correction by adaptive image reproduction. In the signal after the oversampling process, all the information within the band of the received signal is stored in the low frequency range due to the frequency shift, so the number of data stored in the signal is compressed. Based on this data, the phase correction of the signal by the digital mixer 17 and the time shift by the digital delay circuit 7 which is complementary thereto can realize a phasing method according to the situation of the object to be imaged. With this, it is possible to change the delay time τ _n given to each receiving element on the assumption that, for example, the sound velocity in the subject changes little by place.

[Eighth Embodiment] FIG. 21 shows an eighth embodiment of the present invention.
FIG. 22 is a block configuration diagram of an ultrasonic signal processing apparatus in the embodiment of FIG. 22, and FIG. 22 is a diagram showing another configuration example for realizing cumulative addition in each embodiment. The configuration of this embodiment is basically the same as that of the seventh embodiment shown in FIG. 20, except that the analog mixer 14 and the analog reference signal generation circuit 1 shown in FIG.
8 and an analog low-pass filter 11 are added. In the second, fourth, sixth and eighth embodiments described above, as compared with the first, third, fifth and seventh embodiments, the configuration of the analog-digital converter that handles ultrasonic signals having a higher center frequency is provided. It can be realized easily. It should be noted that in each of the embodiments described above, the frequency of the received signal after the analog frequency shift and the frequency of the digital reference signal are made to match for the sake of simplicity. It is also possible to change it. Further, various configurations of the cumulative adder 4 are conceivable as long as they have an integration effect by addition, in addition to the configurations described above. For example, as shown in FIG.
The weighting required for each data may be realized with a high degree of freedom. In FIG. 22, 310 to 31
k and 340 to 34m are adders, and 320 to 32k,
330-33m, 370-37r are unit delay means, 35
0 to 35k, 360 to 36 (m + 1) are multipliers, 380
˜38 (r + 1) is a gate. The coefficient of each multiplier may of course be fixed, or may be read from a storage means (not shown) according to the purpose. Note that in FIG. 22, k, m, and r are non-negative integers determined by the target configuration and scale. With this configuration, an integrating circuit having a desired frequency characteristic can be assembled by using the feedback unit 22A or the feedforward unit 22B. Further, the output timing control unit 22C can control a desired time interval and time offset. 22A, 22B and 22C select the scale or the presence or absence thereof as needed. It is needless to say that many configuration examples other than the illustrated configuration can be applied as long as the configuration has the same function as in FIG.

Further, in each of the above-described embodiments, the subordinate relationship between the digital delay circuit 7 and the digital mixer 17 may be reversed if necessary. Further, in the above embodiment, the analog mixer 14, the digital mixer 15,
Although the amplitude of the reference signal in 16 and 17 is set to 1, it is not limited to this. It is also possible to change the amplitude of the reference signal for each element and weight the received signal. The signal processing apparatus of the present invention realizes cumulative processing after moving the received signal to a low frequency, and the oversampling processing effectively works and the configuration of the analog-digital converter is simplified, so that the ultrasonic wave The present invention can be applied to various devices as well as the device. That is, the highest-level concept of the present invention is that in a signal processing device that receives an analog signal and digitizes the analog signal, the digital signal obtained by digitization is mixed with a reference signal of a predetermined frequency to perform low-frequency signal processing. After the conversion, the plurality of converted signals are cumulatively processed. Furthermore, in addition to the above processes, after converting the signal waveform by multiplying the analog received signal and the analog reference signal of a predetermined frequency,
It is also characterized in that the low-frequency component of the signal waveform converted by the filter means is passed. In each of the embodiments described above, the digital circuit means such as the digital reference signal generating circuit, the digital delay circuit, the digital delay control circuit, the digital adder, and the digital mixer are
It is needless to say that the analog circuit means, the A / D and / or D / A corresponding to each other, and a combination of other circuit means can be used.

[0020]

As described above, according to the present invention, the over-sampling process effectively works by moving the ultrasonic signal to the low frequency and then performing the cumulative addition process, and the effective accuracy of the analog-digital conversion is significantly increased. Improve to. As a result, the configuration of the analog-digital converter in the digital ultrasonic device having a high center frequency can be simplified, which is useful for cost reduction. In particular, the oversampling process works effectively by moving an ultrasonic signal with a high center frequency to a low frequency by analog processing and digitizing it, and then moving it to a low frequency by digital processing to perform cumulative addition processing. , The accuracy of analog-digital conversion can be greatly improved.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of an ultrasonic signal processing apparatus showing a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an analog ultrasonic signal processing device to which a conventional frequency shift phasing method is applied.

FIG. 3 is a configuration diagram in the case where the ultrasonic signal processing device of FIG. 2 is digitized.

FIG. 4 is a configuration diagram when an oversampling method is applied to the ultrasonic receiver of FIG.

FIG. 5 is a diagram showing an ultrasonic waveform obtained by a conventional ultrasonic signal processing device.

FIG. 6 is a diagram showing an ultrasonic waveform obtained by the ultrasonic signal processing apparatus according to the first embodiment of the present invention.

FIG. 7 is a diagram for explaining a frequency shift method for received signals according to the present invention.

FIG. 8 is a configuration diagram of an ultrasonic signal processing device according to a second embodiment of the present invention.

FIG. 9 is a diagram showing a state in which the spectrum of a received signal in the present invention changes due to analog mixing.

FIG. 10 is a configuration diagram of an ultrasonic signal processing device according to a third embodiment of the present invention.

FIG. 11 is a diagram showing a single-signal processing configuration according to the third embodiment of the present invention.

FIG. 12 is a diagram showing the timing of control signals in the third embodiment of the present invention.

FIG. 13 is a diagram showing another processing configuration of a single signal according to the third embodiment of the present invention.

FIG. 14 is a diagram showing the timing of control signals in the third embodiment of the present invention.

FIG. 15 is a configuration diagram of an ultrasonic signal processing device according to a fourth embodiment of the present invention.

FIG. 16 is a diagram showing a single signal processing configuration according to a fourth embodiment of the present invention.

FIG. 17 is a diagram showing another processing configuration of a single signal according to the fourth embodiment of the present invention.

FIG. 18 is a configuration diagram of an ultrasonic signal processing device according to a fifth embodiment of the present invention.

FIG. 19 is a configuration diagram of an ultrasonic signal processing device according to a sixth embodiment of the present invention.

FIG. 20 is a configuration diagram of an ultrasonic signal processing device according to a seventh embodiment of the present invention.

FIG. 21 is a configuration diagram of an ultrasonic signal processing device according to an eighth embodiment of the present invention.

FIG. 22 shows another block diagram for realizing cumulative addition in each embodiment of the present invention.

[Explanation of symbols]

1, 3, 22 ... Digital adder, 2 ... Analog adder, 4 ... Cumulative digital adder, 5 ... Analog-digital converter, 6 ... Analog delay circuit, 7 ... Digital delay circuit, 8 ... Analog delay control circuit , 9 ... Digital delay control circuit, 10 ... Digital data temporary memory, 11, 13 ... Analog low-pass filter, 12 ... Digital signal memory, 14 ... Analog mixer, 15, 16, 17 ... Digital mixer, 18 ... Analog Reference signal generation circuit, 19, 20, 21 ... Digital reference signal generation circuit, 23 ... Transceiver, 24 ... Digital weighting means, 25 ... Analog multiplier, 26 ... Digital multiplier, 121, 122, 123 ... Digital mixer A circuit block composed of a digital delay circuit and a digital adder, 310 31k, 340-34m ... Adder, 320-32k, 330-33m, 370-37r ... Unit delay means, 350-35k, 360-36 (m + 1) ... Multiplier, 380-38 (r + 1) ... Gate, 22A ... Feedback section, 22B ... Feed forward section, 22C ... Output timing control section.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Ryuichi Shinomura 1-280 Higashi Koikeku, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Shizuo Ishikawa 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. (72) Inventor, Yutaka Sato, 1-1-14 Kanda, Chiyoda-ku, Tokyo Inside Hitachi Medical Co., Ltd.

Claims (14)

[Claims] 1. After radiating an ultrasonic wave to an inspection target, a reflected wave from the inspection target is received by an array receiving element group, and a delay time between reception signals is adjusted to change a direction of a reception beam, In an ultrasonic signal processing apparatus for visualizing a detected inspection object, a digitizing means for digitizing a plurality of analog reception signals received by the arrayed wave receiving element group, a digital signal obtained by the digitizing means and a predetermined signal Waveform conversion means for converting a signal waveform by multiplying by a frequency reference signal, cumulative addition means for cumulatively processing the signal converted by the waveform conversion means, and delay for delaying the signal cumulatively processed by the cumulative addition means An ultrasonic signal processing apparatus comprising: a means and an adding means for adding a plurality of signals delayed by the delay means. 2. The ultrasonic signal processing apparatus according to claim 1, further comprising, in addition to the digital signal waveform converting means, an analog signal waveform converting means or a separate digital signal waveform converting means. Ultrasonic signal processing device. 3. The ultrasonic signal processing apparatus according to claim 1, further comprising first and second waveform converting means as waveform converting means for the digital signal, and the output of the first waveform converting means. An ultrasonic signal processing device, wherein an end is connected to an input end of the accumulating means, and an output end of the accumulating means is connected to an input end of the second waveform converting means. 4. The ultrasonic signal processing device according to claim 1, further comprising first and second waveform converting means as waveform converting means for the digital signal, wherein the first waveform converting means is provided. Is connected to the input end of the accumulating means, and a plurality of circuit means including the second waveform converting means, the delay means and the adding means are connected in parallel to the output end of the accumulating means. Characteristic ultrasonic signal processing device. 5. The ultrasonic signal processing apparatus according to claim 1, further comprising a storage unit that stores the signal cumulatively processed by the cumulative unit. 6. After radiating an ultrasonic wave to an inspection target, a reflected wave from the inspection target is received by an array receiving element group, and a delay time between reception signals is adjusted to change a direction of a reception beam, In an ultrasonic signal processing device for visualizing a detected inspection object, an analog waveform conversion for converting a signal waveform by multiplying a plurality of analog reception signals received by the array receiving element group and an analog reference signal of a predetermined frequency. Means, a filter means for passing a low frequency component of the signal waveform converted by the analog waveform converting means, a digitizing means for digitizing an output signal of the filter means, and a digital signal obtained by the digitizing means. And a reference signal of a predetermined frequency are multiplied to convert a signal waveform, and a digital waveform converting means converts the signal waveform. And a delay unit for delaying the signal cumulatively processed by the cumulative addition unit, and an adding unit for adding a plurality of signals delayed by the delaying unit. Ultrasonic signal processing device. 7. The ultrasonic signal processing device according to claim 6, comprising a plurality of the digital waveform converting means. 8. The ultrasonic signal processing apparatus according to claim 6, further comprising first and second digital waveform converting means as the digital waveform converting means, wherein an output end of the first digital waveform converting means is An ultrasonic signal processing apparatus, characterized in that it is connected to an input terminal of the accumulating means, and an input terminal of the second digital waveform converting means is connected to an output terminal of the accumulating means. 9. The ultrasonic signal processing apparatus according to claim 6, further comprising first and second digital waveform converting means as the digital waveform converting means, wherein the output end of the first digital waveform converting means is It is characterized in that it is connected to the input terminal of the accumulating means, and a plurality of circuit means comprising the second digital waveform converting means, the delay means and the adding means are connected in parallel to the output terminal of the accumulating means. Ultrasonic signal processor. 10. The ultrasonic signal processing apparatus according to claim 6, further comprising storage means for storing the signal obtained by the accumulating means. 11. The ultrasonic signal processing device according to claim 6, wherein the accumulating means digitizes the bandwidth of the envelope of the transmission signal represented by the low frequency component of the output of the digital waveform converting means by BW. The sample frequency of the means is A
An ultrasonic signal processing device, characterized in that it is means for cumulatively processing a digitally converted signal so that DFQ, COUNT = (ADFQ / BW), where COUNT is the cumulative number of times. 12. The ultrasonic signal processing device according to claim 6, wherein the analog waveform conversion means has a frequency of the reference signal ω _a , a center frequency of the received signal is ω _S , and the analog waveform conversion means of the digital waveform conversion means. Means for multiplying the received signal by a reference signal set such that ω _a ≦ ω _S − (BW / 2), where BW is the bandwidth of the envelope of the transmitted signal indicated by the low-frequency component of the output. The ultrasonic signal processing device as described above. 13. A signal processing device comprising a receiving means for receiving an analog signal and a digitizing means for digitizing the analog received signal obtained by the receiving means, wherein the digital signal obtained by the digitizing means is predetermined. A signal processing apparatus comprising: a waveform converting means for mixing with a frequency reference signal to convert into a low frequency signal; and an accumulating means for accumulating a plurality of signals converted by the waveform converting means. 14. The signal processing device according to claim 13, wherein in addition to the digital waveform converting means and the accumulating means,
An analog waveform converting means for converting a signal waveform by multiplying the analog received signal by an analog reference signal of a predetermined frequency; and a filter means for passing a low frequency component of the signal waveform converted by the analog waveform converting means. A signal processing device, further comprising: