JPH06309812A - Digital-data transmission apparatus - Google Patents

Abstract

PURPOSE:To effectively generate an error-correcting signal by dividing a digital video signal into bits on the significant side and bits on the insignificant side, increasing a code amount at an outer parity at the bits, on the significant side, which are e.g. visually important and reducing the code amount at the bits, on the insignificant side, which are not important as compared with the bits on the significant side. CONSTITUTION:When digital data on a video signal and an aural signal is transmitted, the video signal which is composed of, e.g. eight bits is divided into four bits on the significant side and four bits on the insignificant side and an outer parity and an inner parity which correspond to each data part are added to the four bits on the significant side by using a correction-adding circuit which is not indicated in the figure. In addition, an outer parity and an inner parity are added to the four bits on the insignificant side in the same manner by using another correction-adding circuit. At this time, when the four bits on the significant side are data which is, e.g. visually important, a code amount at the outer parity is increased, and the outer parity in a small code amount is added to the four bits, on the insignificant side, which are not important.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital data transmission device for video signals and audio signals.

[0002]

2. Description of the Related Art Recent breakthroughs in semiconductor technology have led to
Research and development have been conducted on a method of converting a video signal into a digital signal and transmitting the signal in the form of digital data.
This digital data transmission device can perform noise-free and waveform-distorted transmission as compared with the conventional analog signal transmission device.

Hereinafter, a digital video tape recorder (hereinafter referred to as D-), which is a typical example of a digital data transmission device, will be described.
(VTR) will be described. D-VT
In R, the reproduced data may include a lot of erroneous data due to scratches and dust on the tape. Usually, in order to correct / correct the error of this data, an error correction code generated by a generator polynomial based on the error correction theory is added to the recording data at the time of recording. During playback, this error correction code is used to detect an error, correct the error if correctable, and correct the data using neighboring data on the screen if the error cannot be corrected. .

For example, the error correction coding technique used in the D1 system D-VTR is "digital video recording technique".
(Nikkan Kogyo Shimbun, 1990), this is a method of using two types of error correction codes called outer code and inner code by using Reed-Solomon product code. The block configuration at this time is shown in FIG. With this method,
It consists of a Reed-Solomon code in which a pixel (one pixel is represented by 8 bits) is one word, and an error can be corrected and detected in a pixel unit.

In the D1 system D-VTR, the generator polynomial is x ⁸
+ X ⁴ + x ³ + x ² +1 and divide the video data that has been shuffled into 30 words and 60 words,
An outer parity having a length of 2 words and an inner parity having a length of 4 words are generated by the Reed-Solomon code and added. In this method, video data is arranged in a two-dimensional block, and inner parity is added to horizontal pixels in the block and outer parity is added to vertical pixels in the block. At the time of reproduction, correction is performed by the inner parity, and then an error that cannot be corrected by the inner parity is corrected by the outer parity. The correction capability is greatly improved by such double correction. Further, even if errors occur continuously due to burst errors, it is difficult for the outer parity to become continuous errors, and the error correction capability is improved.

[0006]

However, in the above conventional configuration, when adding the error correction code, one pixel of the video signal is regarded as one word, and this one word is used as the minimum structural unit in the block, and the Reed-Solomon product code is used. Is used to add an error correction code. In this, all words are processed with equal weighting, and each bit from MSB to LSB in one word is processed with equal weighting. However, in reality, the importance of the data is different for each word and for each bit depending on the position of the word on the screen or the visual or auditory characteristics such as the weight of the bit. It is necessary to perform weighting according to the degree of importance of data when constructing an image. From this point of view, there is a problem in that redundant data, which is an error correction code, must be efficiently added.

The present invention solves the above-mentioned conventional problems by considering one word, which is data of one pixel, or each bit, which is data in one word, from the viewpoint of visual characteristics or auditory characteristics. It is an object of the present invention to provide a digital data transmission device in which redundant data, which is an error correction code, is efficiently used by more efficiently distributing to error correction addition blocks and adding an error correction code.

[0008]

In order to achieve this object, a digital data transmission apparatus of the present invention uses a digital video signal or a digital audio signal in which a digital video signal or a digital audio signal is added with an error correction code and transmitted within a predetermined period. The digital data of the signal is divided into N groups of n ₁ , n ₂ , n ₃ , ..., _{N N} bits in the order of importance of the bit data (however, n ₁ , n ₂ , n ₃ , ... N). _N is a natural number, N: an integer of 2 or more, and (C ₁ / n ₁ ) ≧ (C ₂ / n ₂ ) ≧ (C ₃ / n ₃ ) ≧ for each of the N groups …… ≧
(C _N / n _N ) (At least one of the above n ₁ , n ₂ ,
and a means for adding an error correction code having a relationship of (C ₁ , C ₂ , C ₃ , C _N for the amount of error correction code added to each group of n ₃ and n _N ). .

[0009]

With this configuration, when an error occurs in the reproduced data, the error correction code is added more efficiently than in the conventional case, and the visually important data or the auditory important data is added. It is possible to reduce the probability that the important data cannot be corrected by increasing the code amount of the error correction code per bit added to the. Therefore, it is difficult for the visually important data to be uncorrectable, and the quality of the reproduced image is improved.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1A and 1B are diagrams showing application of the error correction code in this embodiment, and FIG. 2 is a diagram showing an application example of the conventional error correction code. In FIG. 2, one word consists of 4 bits. Indicate the case. FIG. 3 is a block diagram showing a digital data transmission device in this embodiment.

In FIG. 3, 1 is an input terminal, 2 is an AD conversion circuit, 3 is a data division circuit, 4 is an error correction code addition circuit A, 5 is an error correction code addition circuit B, 6 is a recording signal processing circuit, and 7 is a recording signal processing circuit. Is a recording head, 8 is a recording medium tape, and 9
Is a reproduction head, 10 is a reproduction signal processing circuit, 11 is an error correction circuit A, 12 is an error correction circuit B, 13 is a data integration circuit, 14 is a DA conversion circuit, and 15 is an output terminal. In this embodiment, the D-VTR will be described separately for recording and reproduction.

At the time of recording, in FIG. 3, the analog video signal input from the input terminal 1 is converted into an 8-bit digital video signal by the AD conversion circuit 2. The output of the AD conversion circuit 2 is input to the data division circuit 3. The data division circuit 3 divides the input 8-bit digital signal into 4 bits from the higher order and the remaining 4 bits. The upper 4-bit data and the lower 4-bit data are input to the error correction code addition circuit A4 and the error correction code addition circuit B5 from the outputs of the two systems of the data division circuit 3, respectively. FIG. 1 (A) shows how the error correction code is added by these two error correction code adding circuits.
It is shown in FIG.

In FIGS. 1 and 2, the data portion has 30 pixels × 60.
It consists of pixels. In the conventional example shown in FIG. 2, an 8-bit digital video signal is used as one word, one word is used as one symbol, and two words of outer parity and four words of inner parity are added to the data part. In this embodiment, an 8-bit digital video signal is divided into upper 4 bits and lower 4 bits, and the upper 4 bits are corrected by an error correction code adding circuit A4 as shown in FIG. Error correction code addition circuit B for the lower 4 bits
At step 5, as shown in FIG. 1B, the outer parity and the inner parity corresponding to each data part are added.

As shown in FIG. 1A, since the upper 4 bits are visually important data, the code amount of the outer parity is increased, and the lower 4 bits are not as important as the upper 4 bits. Therefore, the outer parity having a smaller code amount than the code amount of the outer parity of the upper 4 bits is added. In FIG. 1 (A), 8 words of outer parity are added to upper 4-bit data, and in FIG. 1 (B), 1 word of outer parity is added to lower 4-bit data. The data to which the error correction code is added in this way is output from the error correction adding circuit A4 and the error correction adding circuit B5 and input to the recording signal processing circuit 6. The recording signal processing circuit 6 performs integration processing of input two-system data, shuffling processing, addition of ID signal and sync signal, recording modulation, and the like, and outputs to the recording head 7. The recording head 7 records the input data on the tape 8.

At the time of reproduction, the data reproduced by the reproducing head 9 from the tape 8 is input to the reproduction signal processing circuit 10. The reproduction signal processing circuit 10 performs reproduction demodulation, deshuffling processing, etc., and divides the signal into two parts, a signal processed by the error correction code adding circuit A4 and a signal processed by the error correction code adding circuit B5 during recording, and outputs the divided signal. The two-divided data are input to the error correction circuit A11 and the error correction circuit B12, and error correction is performed by the error correction code added at the time of recording.

Error correction circuit A11 and error correction circuit B12
The data output from is input to the data integration circuit 13. The data integration circuit 13 integrates the input upper 4-bit data and the lower 4-bit data, and outputs them as 8-bit data per sample.
Enter in 4. The DA conversion circuit 14 converts the input digital signal into an analog signal and outputs it to the output terminal 15.

As described above, according to the present embodiment, when adding an error correction code to a digital video signal or a digital audio signal and transmitting the digital data, the digital data of the digital signal is divided into 2 bits by 4 bits in the order of importance of the bit data. A data dividing circuit 3 for dividing into two groups and 2
By providing error correction code addition circuits A4 and B5 for adding error correction codes of an error correction code amount corresponding to the degree of importance of bit data to each group, The correction capability is larger than the correction capability of the lower bit data. As a result, an uncorrectable error in the high-order bits is reduced, and even when the reproduced signal contains many data errors, it is possible to reduce the adverse visual effects of the data errors. Can be realized.

In the present embodiment, the data of one pixel is divided and the error correction code amount added per bit is changed according to the degree of importance thereof. The present invention can be achieved even when the error correction code amount added per bit is changed according to the importance of the data with the importance being high and the inconspicuous portion being low. Does not leave.

In this embodiment, the data of one pixel is divided and the error correction code amount added per bit is changed for each importance level. Even when the color difference signal is set to have a low degree of importance and the error correction code amount to be added per bit is changed according to the degree of importance of the data, the present object can be achieved and does not go beyond the scope of the present invention.

In this embodiment, the data of one pixel is divided and the error correction code amount added per bit is changed, but DCT (discrete cosine transform) or the like is used, for example. In the compression type D-VTR, 1 is set for the data in one block (for example, when the data of L pixels × L pixels is DCTed) according to the importance of the data.
Even when the error correction code amount added per bit is changed, the present object can be achieved, which is beyond the scope of the present invention.

[0021]

As described above, according to the present invention, the digital data are transferred in the order of n ₁ , n ₂ ,
A means for dividing n ₃ bits by n _N bits into n groups and (C ₁ / n ₁ ) ≧ (C ₂ / n ₂ ) ≧ (C ₃ / for each of the N groups n ₃ ) ≧ …… ≧
(C _N / n _N ) (At least one of the above n ₁ , n ₂ ,
means for adding an error correction code having a relationship of C ₁ , C ₂ , C ₃ , C _N ) to the respective groups of n ₃ and n _N. The correction capability of important data such as bits is larger than that of other data. As a result, uncorrectable errors in important data are reduced, and even if the receiving side contains a data error, it is possible to reduce the effects of the data error visually or auditorily. It is possible to realize a transmission device.

[Brief description of drawings]

FIG. 1 is a diagram showing application of an error correction code according to an embodiment of the present invention.

FIG. 2 is a diagram showing an application example of a conventional error correction code.

FIG. 3 is a block diagram showing a digital data transmission device according to this embodiment.

[Explanation of symbols]

 2 AD conversion circuit 3 data division circuit 4 error correction code addition circuit A 5 error correction code addition circuit B 6 recording signal processing circuit 7 recording head 8 tape 9 reproduction head 10 reproduction signal processing circuit 11 error correction circuit A 12 error correction circuit B 13 data integration circuit 14 DA conversion circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04N 7/13 A // H04N 7/133 A

Claims (2)

[Claims] 1. When adding an error correction code to a digital video signal or a digital audio signal and transmitting the digital signal, digital data of the digital signal within a predetermined period is n ₁ , n ₂ , in the order of importance of the bit data. n ₃ ,
..., divided into N groups of n _N bits each (however,
n ₁ , n ₂ , n ₃ , ..., _{N N} are all natural numbers, N: an integer greater than or equal to ₂ ) and (C ₁ / n ₁ ) ≧ (C ₂ / n ₂ ) ≧ (C ₃ / n ₃ ) ≧ …… ≧
(C _N / n _N ) (At least one of the above n ₁ , n ₂ ,
n _3, and means for adding an error correction code having respectively _{C 1, C 2, C 3} , and ...... C _N) relationship error correction code size to be added to each group of ...... n _N Digital data transmission equipment. 2. M bits per sample (where M:
2 or more integer) digital video signal or digital audio signal, and the dividing means divides the M-bit digital signal for each sample into n ₁ , n ₂ ,
n ₃ , ..., _{N N} bits are divided into N groups (where n ₁ , n ₂ , n ₃ , ... _{N N} are all natural numbers, N: 2).
The digital data transmission device according to claim 1, which is a means for performing the above integer, n ₁ + n ₂ + n ₃ + ... + n _N = M).