JPH0630070A - Demodulator - Google Patents

Abstract

PURPOSE:To improve the detection accuracy of frequency offset without thickening a cable which supplies a phase value. CONSTITUTION:A reception signal is converted to an in-phase signal and an orthogonal component at a synchronous detection circuit 2, and an identification point is detected at a reception filter 3 based on those signals. Processing to estimate roughly the frequency offset by a slot synchronous symbol is applied to the output signal of the reception filter 3 at an offset rough estimation circuit 4. When such signal is inputted to an offset estimation and phase control circuit 5, processing to re-estimate the frequency offset by using a pilot symbol is performed. Furthermore, phase control processing is applied to a signal whose frequency offset is estimated, and the frequency offset is corrected. A signal whose frequency offset is corrected is decoded by a Gray decoder 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a demodulation device, and more particularly to a demodulation device suitable for demodulating a signal used in a digital mobile communication device or the like.

[0002]

2. Description of the Related Art In a digital mobile communication system, a demodulation device using a synchronous detection circuit is adopted as a device for demodulating a baseband signal. When demodulating the baseband signal using the demodulator, it is necessary to generate a carrier wave having exactly the same frequency and phase as the frequency used when modulating the transmission signal. However, if the carrier generated by this demodulator has a frequency offset with respect to the carrier in the modulator, not only signal loss but also interference between channels occurs. Therefore, in a conventional demodulation device, a process of correcting a frequency offset is performed when demodulating a baseband signal, and as a conventional device of this type, a device shown in FIG. 3 is known.

FIG. 3 shows the structure of a conventional 16QAM demodulator. In FIG. 3, 10 is an automatic frequency controller (AFC). Reference numeral 11 is a synchronous detection circuit for converting the received signal into an in-phase component signal and a quadrature component signal in the baseband. Reference numeral 12 is a reception filter that extracts a signal of a specific component from the output signal of the synchronous detection circuit 11.
An offset estimation / phase control circuit 13 receives the signal from the reception filter 12 and estimates and controls a frequency offset. Reference numeral 14 is a Gray decoder that decodes the signal from the offset estimation / phase control circuit 13. Also 16QA
The slot format of M is, as shown in FIG.
As known symbols, slot synchronization symbols 7 and pilot symbols 8 for compensating for fading distortion are inserted, and the rest are information symbols 9.

With respect to the slot format configured as described above, frequency offset estimation will be described below.

First, when the reception signal output from the automatic frequency controller 10 is input to the synchronous detection circuit 11,
The signals are converted into an in-phase component signal and a quadrature component signal in the base band, and the converted signals are input to the reception filter 12. An identification point is detected by the reception filter 12 in the signal input to the reception filter 12. Then, this detection output is input to the offset estimation / phase control circuit 13.
Here, a process is performed in which the phase error is obtained for the slot synchronization symbol 7 whose reception phase is already known, and the frequency offset is estimated from the inclination. Then, the estimated value of this frequency offset is output as a control signal of the automatic frequency controller in the next frame. Further, the currently received data is subjected to the correction of the frequency set by the phase control processing, and the corrected signal is decoded by the Gray decoder 14.

[0006]

However, in the above-mentioned conventional configuration, it is necessary to increase the resolution of the reception phase in order to increase the detection accuracy of the frequency offset, but in order to increase the resolution of the reception phase, the phase value must be increased. There is a problem that the table to be given becomes large.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a demodulation device capable of increasing the frequency offset detection accuracy without enlarging the table for giving the phase value. is there.

[0008]

In order to achieve the above object, the present invention provides a synchronous detection means for converting a received signal into an in-phase component signal and a quadrature component signal in a baseband band, and an output signal of the synchronous detection means. Receiving means for extracting a specific component of this signal to detect an identification point, frequency offset coarse estimating means for receiving the output signal of the filter means and roughly estimating the frequency offset of this signal using slot synchronization symbols, and A frequency offset estimating means for estimating a frequency offset by using pilot symbols for the signal estimated by the coarse offset estimating means, and a frequency by performing a phase control process on the signal for which the frequency offset is estimated by the frequency offset estimating means. A correction means for correcting the offset and a decoding means for decoding the signal corrected by the correction means are provided. Those were.

[0009]

According to the present invention, with the above-described structure, the frequency offset is first roughly estimated by the slot synchronization symbol. Since the symbol period of this slot synchronization symbol is 1, the maximum value of the frequency offset that can be detected can be maximized. Further, since the frequency offset due to the pilot symbol is estimated after rough estimation using the slot synchronization symbol, the frequency offset detection accuracy can be improved without increasing the table for giving the phase value.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of a demodulation device in an embodiment of the present invention. In FIG. 1, the demodulation device comprises an automatic frequency controller 1, a synchronous detection circuit 2, a reception filter 3, an offset rough estimation circuit 4, an offset estimation / phase control circuit 5, and a Gray decoder 6. A reception signal from the antenna is input to the automatic frequency controller 1, and the frequency of this reception signal is controlled to a constant frequency according to the control signal from the offset estimation circuit / phase control circuit 5. The output signal of the automatic frequency controller 1 is input to the synchronous detection circuit 2. The synchronous detection circuit 2 is configured as a synchronous detection means for converting a received signal into an in-phase component signal and a quadrature component signal in the baseband band. The reception filter 3 receives the signal from the synchronous detection circuit 2 and is configured as a filter means for extracting a specific component of this signal and detecting an identification point.
The coarse offset estimation circuit 4 is configured as frequency offset coarse estimation means that receives the signal from the reception filter 3 and roughly estimates the frequency offset of this signal using slot synchronization symbols. The offset estimation / phase control circuit 5 constitutes frequency offset estimation means for estimating a frequency offset by using pilot symbols for the signal estimated by the coarse offset estimation circuit 4, and the frequency offset is estimated by the frequency offset estimation means. Compensating means for compensating the frequency offset by performing a phase control process on the generated signal is configured. The Gray decoder 6 is configured as a decoding unit that receives the signal from the offset estimation / phase control circuit 5 and decodes the signal with the corrected frequency offset.

Next, the operation when a signal according to the 16QAM slot format as shown in FIG. 2 is applied to the demodulator of the above embodiment will be described.

First, the reception signal input via the automatic frequency controller 1 is converted by the synchronous detection circuit 2 into an in-phase component signal and a quadrature component signal. When these signals are input to the reception filter 3, the reception filter 3 detects an identification point. The detection result of the reception filter 3 is input to the offset estimation circuit 4, and in this offset rough estimation circuit 4,
A process of roughly estimating the frequency offset is performed for the slot synchronization symbol 7 whose reception phase is already known. This estimation is a rough estimation because the slot synchronization symbol 7 has an interval of 1. When this estimation result is input to the offset estimation / phase control circuit 5, the pilot symbol 8 is used to perform the frequency offset estimation process again according to the value of the coarse frequency offset estimation value. This frequency offset estimated value is output as a control signal for the automatic frequency controller in the next frame, and the frequency offset is corrected by the phase control process for the data that has been received at present. Then, the gray decoder 6 performs a decoding process on the signal whose frequency offset has been corrected.

As described above, according to this embodiment, after the frequency offset rough estimation by the slot synchronization symbol 7,
Since the frequency offset is estimated by the pilot symbol 8, the final frequency offset detection accuracy can be improved without lowering the upper limit of the detectable frequency offset.

[0015]

As is apparent from the above embodiment, the present invention is configured to roughly estimate the frequency offset by the slot synchronization symbol and then re-estimate the frequency offset by the pilot symbol. Therefore, the upper limit value of the frequency offset is set. It is possible to improve the accuracy of the final frequency offset without lowering the value, that is, without enlarging the table that gives the phase value.

[Brief description of drawings]

FIG. 1 is a block diagram of a demodulation device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a 16QAM slot format applied to the present invention.

FIG. 3 is a block diagram of a conventional demodulation device.

[Explanation of symbols]

 1 Automatic frequency controller 2 Synchronous detection circuit 3 Reception filter 4 Offset rough estimation circuit 5 Offset estimation / phase control circuit 6 Gray decoder

Claims (1)

[Claims] 1. A synchronous detection means for converting a received signal into an in-phase component signal and a quadrature component signal in a baseband band, and an output signal of the synchronous detection means for extracting a specific component of this signal to detect an identification point. A filter means, a frequency offset rough estimation means for roughly estimating a frequency offset of the signal received by the filter means by using a slot synchronization symbol, and a pilot symbol for the signal estimated by the frequency offset rough estimation means A frequency offset estimating means for estimating a frequency offset by means of a frequency offset estimating means, a correcting means for performing a phase control process on the signal whose frequency offset is estimated by the frequency offset estimating means to correct the frequency offset, and a signal corrected by the correcting means. A demodulation device comprising a decoding means for decoding.