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JPH06296070A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH06296070A
JPH06296070A JP8046093A JP8046093A JPH06296070A JP H06296070 A JPH06296070 A JP H06296070A JP 8046093 A JP8046093 A JP 8046093A JP 8046093 A JP8046093 A JP 8046093A JP H06296070 A JPH06296070 A JP H06296070A
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
connection pad
pad
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP8046093A
Other languages
Japanese (ja)
Inventor
Kenji Goto
謙二 後藤
Naoto Kamegawa
直人 亀川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP8046093A priority Critical patent/JPH06296070A/en
Publication of JPH06296070A publication Critical patent/JPH06296070A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】 【目的】 狭ピッチの接続用パッド群を備えながら、そ
の狭ピッチの接続用パッド面に、相互が確実に離隔した
形で所要の半田層を被着・形成可能なプリント配線板の
製造方法の提供を目的とする。 【構成】 支持基板の少なくとも一主面に一体的に狭ピ
ッチのパッド群を含む所要の回路パターンをフォトエッ
チング処理で形成する工程と、前記フォトエッチング処
理に用いたエッチングレジストを除去し、回路パターン
形成面を露出させる工程と、前記露出させた回路パター
ン形成面に少なくとも狭ピッチパッド面を含む接続用パ
ッド面を露出させ、かつ回路パターン形成面が平坦面化
されるようにソルダーレジスト層を被覆・形成する工程
とを具備して成ることを特徴し、また他の手段は、前記
接続用パッドを支持基板面と同一平面を成すように埋め
込んで同様に前記目的を達成するものである。
(57) [Abstract] [Purpose] A print that has a narrow-pitch connection pad group, and can adhere and form the required solder layer on the narrow-pitch connection pad surface in a form that is surely separated from each other. An object is to provide a method for manufacturing a wiring board. A step of integrally forming a required circuit pattern including a group of pads with a narrow pitch on at least one main surface of a supporting substrate by a photo etching process, and removing an etching resist used for the photo etching process to form a circuit pattern. Exposing the formation surface and exposing the exposed circuit pattern formation surface to a connection pad surface including at least a narrow pitch pad surface, and coating a solder resist layer so that the circuit pattern formation surface is planarized. And a step of forming the connection pad, and another means is to achieve the above-mentioned object by embedding the connection pad so as to be flush with the surface of the supporting substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はプリント配線板の製造方
法に係り、特に表面実装用パッドを有するプリント配線
板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and more particularly to a method for manufacturing a printed wiring board having surface mounting pads.

【0002】[0002]

【従来の技術】電子機器類の軽量化ないしコンパクト化
を目的として、回路機構の小形化なども図られている。
すなわち、プリント配線板の主面に、所要の電子部品を
実装して成る実装回路装置(実装回路ユニット)が、各
種の電子機器類で広く実用に供されつつあり、またこの
ために、たとえば 0.4mm未満の狭ピッチな接続用パッド
群を備えた高密度プリント配線板の開発も進められてい
る。
2. Description of the Related Art For the purpose of making electronic devices lighter or more compact, circuit structures have been downsized.
That is, a mounting circuit device (mounting circuit unit) in which required electronic components are mounted on the main surface of a printed wiring board is being widely put to practical use in various electronic devices, and for this reason, for example, 0.4 Development of a high-density printed wiring board with a narrow-pitch connection pad group of less than mm is underway.

【0003】ところで、前記表面実装用の高密度プリン
ト配線板の製造方法としては、次のような、サブトラク
ティブ法と呼称される手段が知られている。すなわち、
銅箔張り積層板の銅箔面に、エッチングレジストをパタ
ーニングした後、前記エッチングレジストをマスクとし
て銅箔を選択エッチングを行い、狭ピッチな接続用パッ
ドを含む導体回路を形成する。次いで、前記エッチング
レジストを剥離ないし溶解などにより除去し、前記形成
した導体回路形成面を露出させる。その後、表面仕上げ
として、前記露出させた回路パターン形成面に少なくと
も狭ピッチパッドを含む接続用パッド面を露出させ、ソ
ルダーレジスト層を被覆・形成する。なお、このソルダ
ーレジスト層の被覆・形成は、後工程の半田付けなどに
対応して、接続用パッド面を露出させておく一方、その
他の導体回路面に半田が付着するのを回避(防止)した
り、導体回路の酸化防止など保護機能の付与や、 QFPパ
ット間に形成することによりソルダーダムとしての役割
を目的としている。次に、要すれば、前記ソルダーレジ
スト層の被覆・形成面の露出した接続用パッド面に、た
とえばクリーム半田の印刷や、ホットエヤーレベリング
法などにより、予備半田層を被着形成した形とし、市販
され、実用に供している。いずれにしても、表面実装用
としてプリント配線板を用いる場合は、前記接続用パッ
ド面に、選択的に半田を供給・被着する必要がある。
By the way, as a method of manufacturing the above-mentioned high-density printed wiring board for surface mounting, the following means known as subtractive method is known. That is,
After patterning an etching resist on the copper foil surface of the copper foil-clad laminate, the copper foil is selectively etched using the etching resist as a mask to form a conductor circuit including connection pads with a narrow pitch. Then, the etching resist is removed by peeling or melting to expose the formed conductor circuit formation surface. After that, as a surface finish, at least the connection pad surface including at least a narrow pitch pad is exposed on the exposed circuit pattern forming surface, and a solder resist layer is coated / formed. In addition, this solder resist layer coating / formation allows the connection pad surface to be exposed in response to soldering in a later process, while avoiding (preventing) solder from adhering to other conductor circuit surfaces. It is intended to serve as a solder dam by providing a protective function such as preventing oxidation of the conductor circuit and forming it between the QFP pads. Next, if necessary, on the exposed connection pad surface of the coating / forming surface of the solder resist layer, for example, by printing cream solder, or by a hot-air leveling method, a preliminary solder layer is formed by adhesion. Commercially available for practical use. In any case, when a printed wiring board is used for surface mounting, it is necessary to selectively supply and adhere solder to the connection pad surface.

【0004】なお、表面実装用の高密度プリント配線板
の製造方法にはその他、アディティブ法、電解半田層を
エッチングレジストとして用いる部分半田剥離法やスー
パソルダーテクノロジー法なども知られているが、工程
が比較的煩雑なこと、設備など含めコスト面で問題があ
る。
Other known methods for manufacturing a high-density printed wiring board for surface mounting include an additive method, a partial solder peeling method using an electrolytic solder layer as an etching resist, and a super solder technology method. However, there is a problem in that it is relatively complicated and the cost is low, including equipment.

【0005】[0005]

【発明が解決しようとする課題】上記サブトラクティブ
法と呼称される製造方法は、他の製造方法に較べて実用
的に多くの利点を有するが、なお製造された表面実装用
プリント配線板の場合、実用上次のような問題がある。
すなわち、表面実装用としての使用に当たっては、接続
用パッド面に半田層の被着・付与を要し、この半田層の
被着・付与は、製造工程における表面仕上げ、あるいは
実装回路形成(組み立て)段階で行われる。 しかしな
がら、高密度表面実装化に伴い、 0.4mm以下(たとえば
0.3mm)の狭ピッチで、接続用パッド群を有するプリン
ト配線板の場合、それら狭ピッチの各パッド間にソルダ
ーレジストを形成することは困難で、したがって接続用
パッド面に、互いに離隔して確実、かつ十分な半田を被
着することが困難で、信頼性の高い高密度実装回路を構
成し得ないという問題がある。すなわち、接続用パッド
のピッチが 0.4mm未満の場合、ホットエヤーレベリング
法によって半田を被着すると、いわゆる半田ブリッジの
発生が認められる。また、接続用パッドのピッチが 0.3
mm未満の場合、クリーム半田の印刷による半田被着て
は、同様に半田ブリッジの発生が認められ、いずれにし
ても信頼性の高い実装の達成が困難な状況にある。つま
り、これら接続用パッド群などは、支持基板面からの突
出高さが僅かであるとはいえ、支持基板面において凹凸
を形成しているばかりでなく、接続用パッドのピッチが
狭いので、互いに隣接する接続用パッド間の凹部でのみ
で相互を確実に離隔して、半田層を選択的に各接続用パ
ッド面に被着・形成することは事実上至難の業といえ
る。
The manufacturing method referred to as the subtractive method has many practical advantages as compared with other manufacturing methods. However, in the case of the manufactured surface mounting printed wiring board, However, there are the following problems in practice.
That is, when used for surface mounting, a solder layer needs to be attached / applied to the connection pad surface, and this solder layer attachment / applying requires surface finishing in the manufacturing process or mounting circuit formation (assembly). Done in stages. However, with the high-density surface mounting, 0.4mm or less (for example,
In the case of a printed wiring board having a connection pad group with a narrow pitch of 0.3 mm), it is difficult to form a solder resist between each pad with a narrow pitch, and therefore the connection pad surface should be separated from each other and secured. In addition, there is a problem that it is difficult to deposit sufficient solder, and a highly reliable high-density mounting circuit cannot be configured. That is, when the pitch of the connecting pads is less than 0.4 mm, the occurrence of so-called solder bridges is observed when the solder is applied by the hot air leveling method. The pitch of the connecting pads is 0.3.
If the thickness is less than mm, the solder bridging is similarly observed when the solder is applied by printing the cream solder, and in any case, it is difficult to achieve highly reliable mounting. In other words, although these connecting pad groups and the like have a small protruding height from the supporting substrate surface, they not only form irregularities on the supporting substrate surface, but also because the connecting pad pitch is narrow, It can be said that it is practically difficult to selectively separate and deposit the solder layer on the surface of each connecting pad only by surely separating them from each other only by the concave portion between the adjacent connecting pads.

【0006】本発明は上記事情に対処してなされたもの
で、狭ピッチの接続用パッド群を備えながら、その狭ピ
ッチの接続用パッド面に、相互が確実に離隔した形で所
要の半田層を被着・形成可能なプリント配線板の製造方
法の提供を目的とする。
The present invention has been made in view of the above circumstances, and has a narrow pitch connecting pad group, and a required solder layer on the narrow pitch connecting pad surface so as to be surely separated from each other. An object of the present invention is to provide a method for manufacturing a printed wiring board capable of depositing and forming

【0007】[0007]

【課題を解決するための手段】本発明に係る第1のプリ
ント配線板の製造方法は、支持基板の少なくとも一主面
に一体的に狭ピッチのパッド群を含む所要の回路パター
ンをフォトエッチング処理で形成する工程と、前記フォ
トエッチング処理に用いたエッチングレジストを除去
し、回路パターン形成面を露出させる工程と、前記露出
させた回路パターン形成面に少なくとも狭ピッチパッド
面を含む接続用パッド面を露出させ、かつ回路パターン
形成面が平坦面化されるようにソルダーレジスト層を被
覆・形成する工程とを具備して成ることを特徴とし、さ
らに、第2のプリント配線板の製造方法は、支持基板の
少なくとも一主面に一体的に狭ピッチのパッド群を含む
所要の回路パターンをフォトエッチング処理で形成する
工程と、前記フォトエッチング処理に用いたエッチング
レジストを除去し、回路パターン形成面を露出させる工
程と、前記露出させた回路パターン形成面の少なくとも
狭ピッチパッド面を含む接続用パッド面に加圧処理を施
し、前記接続用パッドを上面を支持基板面と同一面化す
る工程とを具備して成ることを特徴とする。
According to a first method of manufacturing a printed wiring board of the present invention, a predetermined circuit pattern including a pad group of a narrow pitch is integrally photo-etched on at least one main surface of a supporting substrate. And a step of removing the etching resist used for the photoetching process to expose the circuit pattern forming surface, and a connecting pad surface including at least a narrow pitch pad surface on the exposed circuit pattern forming surface. And a step of coating and forming a solder resist layer so that the surface on which the circuit pattern is formed is flattened. Further, the second method for manufacturing a printed wiring board is characterized in that Forming a required circuit pattern including a group of pads with a narrow pitch integrally on at least one main surface of the substrate by photoetching; The etching resist used in the etching process to expose the circuit pattern forming surface, and the connecting pad surface including at least the narrow pitch pad surface of the exposed circuit pattern forming surface is subjected to a pressure treatment, and the connection is performed. And the step of making the upper surface of the pad for use flush with the surface of the supporting substrate.

【0008】[0008]

【作用】本発明に係るプリント配線板の製造方法によれ
ば、少なくとも狭ピッチのパッド群を含む接続用パッド
面が、支持基板(配線基板)面と同一な平坦面を成す構
成のプリント配線板を製造し得る。すなわち、本発明方
法においては、被半田面として機能する狭ピッチのパッ
ド群を含む接続用パッド面は、ソルダーレジストによる
周辺領域の埋め立て、または支持基板への加圧・埋め込
みによって、支持基板と実質的に同一平面を呈する構成
を採るため、クリーム半田の印刷やホットエアーレベリ
ング法などによる 0.3mmピッチ未満といった狭ピッチパ
ッド上への予備半田層の形成が可能となる。つまり、高
配線密度で、かつ狭ピッチのパッド群を含む接続用パッ
ドを有しながら、信頼性の高い電気的な接続など形成・
保持する高密度実装回路の構成に適するプリント配線板
の提供が可能となる。
According to the method of manufacturing a printed wiring board according to the present invention, the printed wiring board has a structure in which the connecting pad surface including at least the narrow-pitch pad group forms the same flat surface as the supporting substrate (wiring substrate) surface. Can be manufactured. That is, in the method of the present invention, the connection pad surface including the narrow-pitch pad group that functions as the surface to be soldered is substantially filled with the support substrate by filling the peripheral region with a solder resist or by applying pressure / embedding to the support substrate. By adopting a configuration in which the surfaces are substantially the same, it is possible to form a preliminary solder layer on a narrow pitch pad of less than 0.3 mm pitch by cream solder printing or hot air leveling method. In other words, it is possible to form a highly reliable electrical connection while having a connection pad that includes a pad group with a high wiring density and a narrow pitch.
It is possible to provide a printed wiring board suitable for the configuration of a high-density mounted circuit to be held.

【0009】[0009]

【実施例】以下図1 (a)〜 (g)および図2 (a)〜 (e)を
参照して本発明の実施例を説明する。
EXAMPLES Examples of the present invention will be described below with reference to FIGS. 1 (a) to 1 (g) and 2 (a) to 2 (e).

【0010】実施例1 図1 (a)〜 (g)は本発明に係る第1のプリント配線板の
製造方法の実施態様例を模式的に示した断面図である。
Example 1 FIGS. 1 (a) to 1 (g) are sectional views schematically showing an example of an embodiment of the first method for manufacturing a printed wiring board according to the present invention.

【0011】先ず、所要の内層回路を備え、かつ両主面
に厚さ約18μm の銅箔層が一体的に配設(形成)された
プリント配線板を用意し、所要の箇所(位置)に電気的
な接続孔3を形設する。次いで、前記孔明け加工したプ
リント配線板の銅箔層面上に、ドライフィルムをラミネ
ートして露光、現像を行うことによりパターンマスキン
グした。その後、前記パターンマスキングしたプリント
配線板に、エッチング処理を施して、前記銅箔層を 0.3
mmの狭ピッチパッド1群を含む接続用パッド化および回
路部化してから、前記接続孔2の内壁面に、選択的なメ
ッキ処理によってスルホール接続層2aを形成した(図1
(a))。図1 (a)において、3はプリント配線板を、3a
は内層回路をそれぞれ示す。
First, a printed wiring board having required inner layer circuits and having copper foil layers with a thickness of about 18 μm integrally disposed (formed) on both main surfaces is prepared, and is provided at required positions (positions). An electrical connection hole 3 is formed. Then, a dry film was laminated on the copper foil layer surface of the perforated printed wiring board, and exposure and development were performed to perform pattern masking. Then, the pattern-masked printed wiring board was subjected to an etching treatment to remove the copper foil layer by 0.3
After forming a connection pad including a group of 1 mm narrow pitch pads and forming a circuit portion, a through-hole connection layer 2a was formed on the inner wall surface of the connection hole 2 by selective plating (FIG. 1).
(a)). In FIG. 1 (a), 3 is a printed wiring board, 3a
Indicate inner layer circuits, respectively.

【0012】次いで、前記プリント配線板3のパターニ
ングした面のうち、半田付けを要しない領域に第1のソ
ルダーレジスト層4aを、たとえばスクリーン印刷により
被覆・形成してから(図1 (b))、被半田付部を成す狭
ピッチパッド1群を含む接続用パッド領域につき、たと
えばスクリーン印刷により、第2のソルダーレジスト層
4bを塗布・硬化する(図1 (c))。この第2のソルダー
レジスト層4bの形成では、必然的に接続用パッド1面も
被覆されるので、たとえば光学式パターン検査装置など
でモニターしながら、前記接続用パッド1面を被覆して
いる第2のソルダーレジスト層4bを、たとえばバフ研磨
装置5などにより削りおとし、接続用パッド1面をほぼ
一様に露出させる(図1 (d))。なお、前記において、
ソルダーレジスト層4a,4bの形成は、ドライフイルムも
しくは液状ソルダーレジストのいずれを用いてもよく、
ドライフイルムによる場合は真空ラミネート方式で、ま
た液状ソルダーレジストによる場合は、スクリーン印刷
法やスプレー法などで行えばよい。さらに、接続用パッ
ド1面を被覆する第2のソルダーレジスト層4bの削り落
としに当たっては、接続用パッド1面など損傷しないよ
うに、十分な注意,慎重な対応が望まれる。
Then, on the patterned surface of the printed wiring board 3, the first solder resist layer 4a is coated / formed by, for example, screen printing on a region which does not require soldering (FIG. 1 (b)). A second solder resist layer is formed by, for example, screen printing on the connection pad region including the narrow pitch pad group 1 forming the soldered portion.
Apply and cure 4b (Fig. 1 (c)). In the formation of the second solder resist layer 4b, the surface of the connecting pad 1 is inevitably covered, so that the surface of the connecting pad 1 is covered while being monitored by, for example, an optical pattern inspection device. The second solder resist layer 4b is scraped off by, for example, a buffing machine 5 to expose the surface of the connection pad 1 substantially uniformly (FIG. 1 (d)). In the above,
The solder resist layers 4a and 4b may be formed by using either dry film or liquid solder resist.
In the case of a dry film, a vacuum laminating method may be used, and in the case of a liquid solder resist, a screen printing method or a spray method may be used. Further, when the second solder resist layer 4b covering the surface of the connection pad 1 is scraped off, sufficient care and caution should be taken so as not to damage the surface of the connection pad 1 or the like.

【0013】前記バフ研磨により、接続用パッド1面を
露出させると、一方では、この接続用パッド群の各接続
用パッド1間が、前記研磨・削除されなかった第2のソ
ルダーレジスト層4bによ埋められ、接続用パッド1群領
域は全体的に同一平面を成し、かつプリント配線板3の
回路形成面は実質的に平坦面を形成する形態を採ること
になる(図1 (e))。この状態で、前記プリント配線板
3の接続用パッド1を露出させた面に、たとえばクリー
ム半田を印刷した後、リフロー処理を施すことによっ
て、前記接続用パッド1面に、選択的かつ半田ブリッジ
の発生を伴わずに所要の半田(予備半田)層6を設けた
プリント配線板が得られる(図1 (f))。
When the surface of the connection pad 1 is exposed by the buffing, on the other hand, the space between the connection pads 1 of this connection pad group is formed into the second solder resist layer 4b which has not been polished or removed. The group of connection pads 1 is entirely filled with the same plane, and the circuit forming surface of the printed wiring board 3 is substantially flat (FIG. 1 (e)). ). In this state, for example, cream solder is printed on the surface of the printed wiring board 3 where the connection pad 1 is exposed, and then reflow processing is performed to selectively and solder bridge the surface of the connection pad 1. A printed wiring board provided with a required solder (preliminary solder) layer 6 can be obtained without generation (FIG. 1 (f)).

【0014】なお、上記の製造工程において、接続用パ
ッド1の露出面への半田層6の被着・形成を、いわゆる
ホットエヤーレベリング法で行った場合は、接続用パッ
ド1の露出面に、選択的かつ半田ブリッジの発生を伴わ
ずに所要の半田層6が形成されただけでなく、スルホー
ル接続層2a上にも半田層6′を被着形成し得た(図1
(g))。
In the above manufacturing process, when the solder layer 6 is deposited / formed on the exposed surface of the connection pad 1 by the so-called hot air leveling method, the exposed surface of the connection pad 1 is Not only was the required solder layer 6 formed selectively without generation of solder bridges, but a solder layer 6 ′ could also be deposited on the through-hole connection layer 2a (FIG. 1).
(g)).

【0015】上記では、半田付けを要しない領域と被半
田付部を成す狭ピッチパッド1群を含む接続用パッド領
域に分けて、第1のソルダーレジスト層4a、および第2
のソルダーレジスト層4bを順次被覆・形成したが、同時
に被覆・形成した後、被半田付部を成す接続用パッド領
域を研削し、接続用パッド1面を露出させる方式を採っ
ても、同様の作用・効果を達成し得る。
In the above description, the first solder resist layer 4a and the second solder resist layer 4a are divided into a region that does not require soldering and a connection pad region that includes a group of narrow pitch pads 1 that form a portion to be soldered.
Although the solder resist layer 4b of 1 is sequentially coated / formed, the same method can be applied by grinding the connection pad region forming the soldered portion and exposing the one surface of the connection pad after coating / forming at the same time. The action and effect can be achieved.

【0016】実施例2 図1 (a)〜 (e)は本発明に係る第2のプリント配線板の
製造方法の実施態様例を模式的に示した断面図である。
Example 2 FIGS. 1 (a) to 1 (e) are sectional views schematically showing an example of an embodiment of the second method for manufacturing a printed wiring board according to the present invention.

【0017】先ず、ガラス不織布−樹脂系を絶縁体とし
て所要の内層回路3aを備えた基板3′を用意し(図2
(a))、この基板3′の両主面にガラス不織布−樹脂系
のプリプレグ層を介して、厚さ約18μm の銅箔層が一体
的に配設(形成)してプリント配線素板とし、所要の箇
所(位置)に電気的な接続孔2を形設する。次いで、前
記孔明け加工したプリント配線素板の銅箔層面上に、た
とえばドライフィルムをラミネートして露光、現像を行
うことによりパターンマスキングした。その後、前記パ
ターンマスキングしたプリント配線素板に、エッチング
処理を施して、前記銅箔層を 0.3mmの狭ピッチパッド1
群を含む接続用パッド化および回路部化してから、前記
接続孔2の内壁面に、選択的なメッキ処理によってスル
ホール接続層2aを形成した(図2 (b))。
First, a substrate 3'having a required inner layer circuit 3a using a glass nonwoven fabric-resin system as an insulator is prepared (see FIG. 2).
(a)) A copper foil layer having a thickness of about 18 μm is integrally provided (formed) on both main surfaces of this substrate 3'through a glass nonwoven fabric-resin prepreg layer to form a printed wiring board. The electric connection hole 2 is formed at a required position (position). Then, for example, a dry film was laminated on the copper foil layer surface of the perforated printed wiring board, and exposure and development were performed for pattern masking. Then, the pattern-masked printed wiring board is subjected to etching treatment so that the copper foil layer has a narrow pitch pad of 0.3 mm.
After forming a connection pad including a group and forming a circuit portion, a through-hole connection layer 2a was formed on the inner wall surface of the connection hole 2 by selective plating (FIG. 2 (b)).

【0018】次いで、前記プリント配線板3のパターニ
ングした面のうち、被半田付部を成す狭ピッチパッド1
群を含む接続用パッド領域に、たとえば 170℃程度の温
度,20kg/cm2 程度の圧力を、加熱加圧体7によって加
え(図2 (c))、前記狭ピッチパッド1群を含む接続用
パッドを上面がプリント配線板(支持基板)3面と同一
面を成すように、プリント配線板3に埋め込む。このよ
うにして、接続用パッド1面をプリント配線板(支持基
板)3面と同一平面化した後、半田つけを要しない領域
にソルダーレジスト層5aを、たとえばスクリーン印刷に
より被覆・形成する。ここで、ソルダーレジスト層4aの
形成は、ドライフイルムもしくは液状ソルダーレジスト
のいずれを用いてもよく、ドライフイルムによる場合は
真空ラミネート方式で、また液状ソルダーレジストによ
る場合は、スクリーン印刷法やスプレー法などで行えば
よい。
Next, of the patterned surface of the printed wiring board 3, the narrow-pitch pad 1 forming the soldered portion is formed.
For example, a temperature of about 170 ° C. and a pressure of about 20 kg / cm 2 are applied to the connecting pad area including the groups by the heating and pressurizing body 7 (FIG. 2 (c)), and the connecting area including the narrow pitch pad 1 group. The pads are embedded in the printed wiring board 3 so that the upper surface thereof is flush with the printed wiring board (supporting substrate) 3 surface. In this way, the surface of the connection pad 1 is made flush with the surface of the printed wiring board (supporting substrate) 3 and then the solder resist layer 5a is coated / formed by, for example, screen printing on the area where soldering is not required. Here, the formation of the solder resist layer 4a may be either dry film or liquid solder resist, vacuum drying method when dry film, screen printing method or spray method when liquid solder resist. You can go in.

【0019】次いで、前記プリント配線板3の接続用パ
ッド1露出面に、たとえばクリーム半田を印刷した後、
リフロー処理を施すことによって、前記接続用パッド1
面に、選択的かつ半田ブリッジの発生を伴わずに所要の
半田(予備半田)層6を設けたプリント配線板が得られ
る(図2 (d))。
Next, for example, cream solder is printed on the exposed surface of the connection pad 1 of the printed wiring board 3,
By applying a reflow process, the connection pad 1
A printed wiring board having a desired solder (preliminary solder) layer 6 selectively provided on the surface without generation of a solder bridge is obtained (FIG. 2 (d)).

【0020】なお、上記の製造工程において、接続用パ
ッド1露出面への半田層6の被着・形成を、いわゆるホ
ットエヤーレベリング法で行った場合は、接続用パッド
1の露出面に、選択的かつ半田ブリッジの発生を伴わず
に所要の半田層6が形成されただけでなく、スルホール
接続層2a上にも半田層6′を被着形成し得た(図2
(e))。
In the above manufacturing process, when the solder layer 6 is deposited / formed on the exposed surface of the connection pad 1 by a so-called hot air leveling method, the exposed surface of the connection pad 1 is selected. Not only the required solder layer 6 was formed without causing the occurrence of solder bridges, but also the solder layer 6 ′ could be formed on the through-hole connection layer 2a (FIG. 2).
(e)).

【0021】本発明はそれぞれ上記実施例に限定される
ものでなく、本発明の趣旨を逸脱しない範囲でいろいろ
変更した態様での実施が可能である。
The present invention is not limited to the above embodiments, but can be carried out in various modified modes without departing from the spirit of the present invention.

【0022】[0022]

【発明の効果】上記したように本発明に係るプリント配
線板の製造方法によれば、繁雑な操作をなどを要せず
に、あるいは特殊な手段などとくに用いることなく、狭
ピッチのパッドを備えていて高密度で信頼性の高い実装
が可能なプリント配線板を容易に、かつ低コストで得る
ことができる。すなわち、製造手段が常套的で歩留まり
も良好であるばかりでなく、狭ピッチのパッド面に互い
に隔別した形で、かつほぼ一様な厚さ(量)の半田層を
確実に被着形成し得るので、実装電子部品のリード接続
も高い信頼性で達成することが可能となる。そして、前
記低コスト性,歩留まりの良好さ,信頼性の高い高密度
実装回路を構成し得ることなどは、実用上多くの利点を
もたらすものといえ、狭ピッチパッドに予備半田層が形
成されるため、ホットバー法など個別実装方法の適用が
できるる。
As described above, according to the method for manufacturing a printed wiring board of the present invention, a pad with a narrow pitch is provided without requiring complicated operations or using special means. Therefore, a printed wiring board that can be mounted with high density and high reliability can be obtained easily and at low cost. That is, not only the manufacturing method is conventional and the yield is good, but also the solder layer having a substantially uniform thickness (quantity) is securely formed by being separated from each other on the pad surface with a narrow pitch. Therefore, the lead connection of the mounted electronic component can be achieved with high reliability. And, it can be said that the low cost, the good yield, and the ability to form a highly reliable high-density packaging circuit bring many advantages in practical use, and a preliminary solder layer is formed on a narrow pitch pad. Therefore, the individual mounting method such as the hot bar method can be applied.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る第1のプリント配線板の製造方法
の実施態様例を模式的に示すもので、 (a)は外層パター
ニングした状態の断面図、 (b)は非半田付け領域を第1
のハンダレジスト層で被覆した状態の断面図、 (c)は被
半田付け領域を第2のハンダレジスト層で被覆した状態
の断面図、 (d)は第2のハンダレジスト硬化層を研磨し
て接続用パッド面を露出させる状態の断面図、 (e)は第
2のハンダレジスト硬化層を研磨して接続用パッド面を
露出させた状態の断面図、 (f)は露出させた接続用パッ
ド面に半田層を印刷法で被着形成した状態の断面図、
(g)は露出させた接続用パッド面に半田層をホットエア
ーレベリング法で被着形成した状態の断面図。
FIG. 1 schematically shows an embodiment example of a method for manufacturing a first printed wiring board according to the present invention, in which (a) is a cross-sectional view of a state in which an outer layer is patterned, and (b) shows a non-soldered region. First
Sectional view of the state where the solder resist layer is covered, (c) is a sectional view of the state in which the soldered area is covered with the second solder resist layer, (d) is the second solder resist cured layer A cross-sectional view of the connection pad surface exposed, (e) a cross-sectional view of the connection pad surface exposed by polishing the second solder resist hardened layer, (f) an exposed connection pad Sectional view of a state in which a solder layer is deposited on the surface by a printing method,
(g) is a cross-sectional view of a state in which a solder layer is adhered and formed on the exposed connection pad surface by a hot air leveling method.

【図2】本発明に係る第2のプリント配線板の製造方法
の実施態様例を模式的に示すもので、 (a)は内層回路を
有するプリント配線素板の断面図、 (b)は外層パターニ
ングした状態の断面図、 (c)は接続用パッドをプリント
配線素板に埋め込む状態の断面図、 (d)は接続用パッド
面がプリント配線素板面と同一平面を成して埋め込まれ
た状態の断面図、 (d)は非半田付け領域を第1のハンダ
レジスト層で被覆し、接続用パッド面に半田層を印刷法
で被着形成した状態の断面図、印刷法で被着形成した状
態の断面図、 (e)は接続用パッド面に半田層をホットエ
アーレベリング法で被着形成した状態の断面図。
FIG. 2 schematically shows an embodiment example of a second method for manufacturing a printed wiring board according to the present invention, in which (a) is a sectional view of a printed wiring board having an inner layer circuit and (b) is an outer layer. A cross-sectional view of a patterned state, (c) a cross-sectional view of a state in which a connection pad is embedded in a printed wiring board, (d) a connection pad surface is flush with the printed wiring board surface and embedded. Cross-sectional view of the state, (d) is a cross-sectional view of the state in which the non-soldered area is covered with the first solder resist layer and the solder layer is formed by the printing method on the connection pad surface, and the formation by the printing method FIG. 3E is a cross-sectional view of a state in which the solder layer is deposited on the connection pad surface by a hot air leveling method.

【符号の説明】[Explanation of symbols]

1…接続用パッド(狭ピッチパットなど) 2…接続
孔 2a…スルホール接続層 3…プリント配線板
3a…内層回路 3′…プリント配線素板 4a…第1のソルダーレジスト層 4b…第2のソルダー
レジスト層 5…バフ研磨装置 6…半田層 7
…加熱加圧体
1 ... Connection pad (narrow pitch pad, etc.) 2 ... Connection hole 2a ... Through hole connection layer 3 ... Printed wiring board
3a ... Inner layer circuit 3 '... Printed wiring board 4a ... First solder resist layer 4b ... Second solder resist layer 5 ... Buffing device 6 ... Solder layer 7
... Heating / pressurizing body

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 支持基板の少なくとも一主面に一体的に
狭ピッチのパッド群を含む所要の回路パターンをフォト
エッチング処理で形成する工程と、 前記フォトエッチング処理に用いたエッチングレジスト
を除去し、回路パターン形成面を露出させる工程と、 前記露出させた回路パターン形成面に、少なくとも狭ピ
ッチパッド面を含む接続用パッド面を露出させ、かつ回
路パターン形成面が平坦面化されるようにソルダーレジ
スト層を被覆・形成する工程とを具備して成ることを特
徴とするプリント配線板の製造方法。
1. A step of integrally forming on a at least one main surface of a supporting substrate a required circuit pattern including a narrow-pitch pad group by photoetching, and removing the etching resist used for the photoetching, Exposing the circuit pattern forming surface, and exposing the exposed circuit pattern forming surface to at least the connection pad surface including the narrow pitch pad surface, and making the circuit pattern forming surface flat. A method for manufacturing a printed wiring board, comprising the steps of coating and forming layers.
【請求項2】 支持基板の少なくとも一主面に一体的に
狭ピッチのパッド群を含む所要の回路パターンをフォト
エッチング処理で形成する工程と、 前記フォトエッチング処理に用いたエッチングレジスト
を除去し、回路パターン形成面を露出させる工程と、 前記露出させた回路パターン形成面の少なくとも狭ピッ
チパッド面を含む接続用パッド面に加圧処理を施し、前
記接続用パッドを上面を支持基板面と同一面化する工程
とを具備して成ることを特徴とするプリント配線板の製
造方法。
2. A step of integrally forming a required circuit pattern including a pad group of a narrow pitch on at least one main surface of a supporting substrate by photoetching, and removing an etching resist used for the photoetching, Exposing the circuit pattern forming surface, and applying pressure treatment to the connecting pad surface including at least the narrow pitch pad surface of the exposed circuit pattern forming surface, and the connecting pad upper surface is flush with the supporting substrate surface. A method of manufacturing a printed wiring board, comprising the steps of:
JP8046093A 1993-04-07 1993-04-07 Manufacture of printed wiring board Withdrawn JPH06296070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8046093A JPH06296070A (en) 1993-04-07 1993-04-07 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8046093A JPH06296070A (en) 1993-04-07 1993-04-07 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPH06296070A true JPH06296070A (en) 1994-10-21

Family

ID=13718876

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8046093A Withdrawn JPH06296070A (en) 1993-04-07 1993-04-07 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPH06296070A (en)

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