JPH06291299A - Hybrid integrated circuit and manufacturing method thereof - Google Patents

Abstract

PURPOSE:To produce a low-cost optical hybrid integrated circuit of large scale integration with high yield by providing an InP substrate coated selectively with silicon or its oxide where the InP substrate and a silicon substrate are joined. CONSTITUTION:Electronic devices 5 such as transistors are formed on an Si substrate 1. Optical devices 4 such as a laser are formed on a InP substrate 2 including a silicon oxide film 3, which comes into direct contact with the silicon substrate. The electronic devices and optical devices on the two substrates are functionally connected through electrical interconnections to form large scale integration. Since the Si substrate 1 has a large thermal conductivity, heat dissipation is adequate if a high-power laser is formed on the InP substrate 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high performance hybrid integrated circuit using InP and Si and a manufacturing method thereof.

[0002]

2. Description of the Related Art Conventionally, in a hybrid integrated circuit, such as an optoelectronic integrated circuit in which a semiconductor laser is integrated with a driving transistor and an amplifying transistor, a semiconductor laser such as InP is formed on a substrate on which a semiconductor laser can be manufactured. A method is known in which an element and an electronic element such as a transistor are simultaneously formed.

[0003]

However, in the method of integrating both an optical element and an electronic element on the above InP substrate, the InP substrate is several times more expensive than the Si substrate,
Further, since the process of forming a semiconductor device is more complicated than that of the case of using a Si substrate, there is a problem that the yield is poor and high-density integration cannot be achieved. Further, since the InP substrate has a heat conductivity several times worse than that of the Si substrate, there is a problem that it is not suitable for integration of a circuit having a large amount of power consumption.

In consideration of the above problems of the prior art, the present invention is a hybrid integrated circuit capable of high-density integration of optical elements and electronic elements, having low cost, high yield, and good characteristics, and a manufacturing method thereof. It is intended to provide.

[0005]

The present invention according to claim 1 is based on I
The hybrid integrated circuit includes an nP substrate and a Si substrate joined to the InP substrate by a silicon oxide film or a silicon film formed on a predetermined portion of the InP substrate.

The present invention according to claim 6 provides a Si substrate and In.
After subjecting each of the P substrates to a semiconductor process treatment to be performed at a temperature equal to or higher than a predetermined temperature for strengthening the junction,
A silicon oxide film or a silicon film is formed on a P substrate, and the surface of the silicon oxide film or the silicon film formed on the InP substrate is replaced with Si.
After bonding to a predetermined part of the substrate and performing heat treatment at a predetermined temperature to strengthen the bonding force of the part, the InP substrate and the Si substrate are processed at a temperature lower than the predetermined temperature by a temperature not higher than the predetermined temperature. A method of manufacturing a hybrid integrated circuit integrated by performing a desired semiconductor process.

[0007]

According to the present invention of claim 1, the silicon oxide film or the silicon film formed on the InP substrate is bonded to the Si substrate,
An integrated circuit in which the nP substrate and the Si substrate are integrated is formed.

According to a sixth aspect of the present invention, the surface of the silicon oxide film or the silicon film formed on the InP substrate is bonded to a predetermined portion of the Si substrate, and at a predetermined temperature to strengthen the bonding force of the portion. Since the heat treatment is performed, the InP substrate and the Si substrate can be easily bonded with a bonding force of sufficient strength.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit according to an embodiment of the present invention and a method of manufacturing the same will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a schematic sectional view showing a structure of a hybrid integrated circuit according to a first embodiment of the present invention. That is, S that constitutes the hybrid integrated circuit
An electronic element 5 such as a transistor is formed on the i substrate 1, and an optical element 4 such as a semiconductor laser is formed on the InP substrate 2. In addition, on the predetermined surface of the InP substrate 2,
A silicon oxide film (or silicon film) 3 is formed, and the silicon oxide film (or silicon film) 3 and the Si substrate 1 are directly bonded (a bonding method will be described later). The optical element 4 and the electronic element 5 formed on each substrate are functionally connected by electrical wiring or the like.

As described above, the optical element 4 is formed on the InP substrate 2 having excellent optical characteristics such as light emission, and the electronic element 5 such as a transistor is a Si substrate suitable for forming a large-scale integrated circuit. Since it is formed on the first substrate, the high performance optical device 4 and the large-scale integrated electronic device 5 can be integrated and integrated. Further, since the Si substrate 1 has a high thermal conductivity, even if a high-power semiconductor laser is formed on the InP substrate 2, it is possible to sufficiently radiate heat. Therefore, electronic elements such as a power amplifier are also integrated. I was able to do it.

(Embodiment 2) FIG. 2 is a schematic sectional view showing the structure of a hybrid integrated circuit according to a second embodiment of the present invention. That is, S that constitutes the hybrid integrated circuit
An electronic element 5 such as a transistor is formed on the i substrate 1, and an optical element (light emitting element) 4 such as a semiconductor laser is formed on a part of the surface of the InP substrate 2 facing the Si substrate 1. There is. A silicon oxide film (or silicon film) 3 is formed on a predetermined portion of the surface around the optical element (light emitting element) 4, and the silicon oxide film (or silicon film) 3 and the Si substrate 1 are formed.
And are directly joined (the joining method will be described later). Further, an optical element (light receiving element) 4 ′ such as a photodiode is formed at a portion of the Si substrate 1 facing the optical element (light emitting element) 4 formed on the InP substrate 2, and these optical elements (light emitting element) 4 are formed. The optical element (light receiving element) 4'is adapted to be coupled by light. The optical elements 4 and 4'formed on the respective substrates and the electronic element 5 are functionally connected by electrical wiring and the above-mentioned optical coupling as required.

As described above, the optical element 4 such as a semiconductor laser is formed on the InP substrate 2 having excellent optical characteristics such as light emission, and high performance can be obtained even on the Si substrate 1 such as a photodiode. Since some of the optical elements 4'and the electronic elements 5 such as transistors are formed on the Si substrate 1 suitable for forming a large-scale integrated circuit, the high-performance optical elements 4 and 4'and the large-scale integration can be achieved. It was possible to integrate the converted electronic device 5. As a result, the same effect as in Example 1 was obtained. In this case, as described above, the large-scale integrated circuit on the Si substrate 1 and the optical element 4 on the InP substrate 2 are
It was also possible to directly transmit signals by light without using electrical wiring. It was also possible to simultaneously integrate high-speed electronic elements on the InP substrate 2.

In any of the above embodiments, I
An amorphous silicon film or a polycrystalline silicon film may be used instead of the silicon oxide film formed on the nP substrate.

Further, in the above embodiment, the light emitting element is formed on the InP substrate side, the light receiving element is formed on the Si substrate side, and both the substrates are coupled by light. On the contrary, the light receiving element is formed on the InP substrate side. May be formed, and a light emitting element may be formed on the Si substrate side to perform light coupling.

In the above embodiment, the space between the light emitting element and the light receiving element is a space. However, the present invention is not limited to this, and the light emitted from the light emitting element is incident on the light receiving element. Good.

(Embodiment 3) A method of manufacturing a hybrid integrated circuit according to a third embodiment of the present invention will be described.

First, a series of semiconductor process treatments including a process, such as a diffusion process, which should be performed at a temperature equal to or higher than the heat treatment temperature necessary for strengthening the bonding force, are performed on predetermined portions of the Si substrate and the InP substrate. An electronic element such as a field effect transistor (FET) and an optical element such as a semiconductor laser were formed. The diffusion process and the like are usually performed at a high temperature of 1000 ° C. or higher.

Next, after forming a protective film on the Si portion and the InP portion where various elements were formed, the surfaces of the other exposed Si portion and the InP portion were extremely cleaned. In particular,
The surface layer of the InP substrate was removed by etching with hydrogen peroxide and an ammonia-based etching solution. Similarly, the surface of the Si substrate was cleaned with a hydrofluoric acid-based etching solution. At that time, the protective film was removed only in a necessary portion. Then, a silicon oxide film was formed on the InP substrate by a chemical vapor deposition method or the like. The film thickness is 0.
It is about 1 to 3 μm, and it is easy to control this thickness and the uniformity of the thickness. Further, the surface of the silicon oxide film was cleaned with buffered hydrofluoric acid. At that time, the protective film was removed only in a necessary portion.

After that, the surface of the silicon oxide film is thoroughly washed with pure water, and the silicon oxide film of the InP substrate is uniformly overlapped with the exposed portion of the Si substrate.
A direct bond was easily obtained by the hydroxyl groups adsorbed on the substrate surface. Sufficient bonding strength can be obtained as it is,
Further, in this state, when heat treatment was performed at a temperature of 100 ° C. to 700 ° C., the bond was further strengthened. Here, when the heat treatment temperature is high, there is a difference in the thermal expansion coefficient of the InP substrate and the thermal expansion coefficient of the Si substrate, so some restrictions are imposed on the shape, dimensions, etc. The thinner the substrate to be bonded and the smaller the area were, the more the bonding strength could be improved without peeling or damage.

Next, various processes to be processed at a temperature equal to or lower than the heat treatment temperature for strengthening the bonding force, such as electrode formation, were carried out to form a wiring pattern. Aminium or gold was used for the wiring. As a result, the hybrid integrated circuit having the structure shown in Example 2 was obtained. The effect of heat treatment for strengthening the bonding is, for example, several tens of times even if it is held at 200 ° C. for about 1 hour.
The strength of was obtained. If you raise the temperature above 700 degrees C,
Since P (phosphorus) escapes from the surface of the InP substrate, the characteristics of the surface are largely deteriorated and predetermined performance as an optical element cannot be obtained. Therefore, it is desirable that the heat treatment temperature for bonding is 700 ° C. or less.

When the above-mentioned Si substrate 1 and the silicon oxide film (or silicon film) 3 are bonded using an adhesive such as a general resin, the semiconductor after bonding is heat-resistant and chemical-resistant. Although there is a problem that the process cannot be performed, the Si substrate and the InP substrate are directly bonded by using the method of this embodiment, and such a problem was solved.

When an adhesive such as a resin is used for adhesion, it is difficult to control the thickness of the adhesive with high accuracy, so that the parallelism of the substrate after adhesion is deteriorated and the accuracy of photolithography is deteriorated. Such problems have also been resolved.
Further, in the case of direct bonding, the heat conduction is better, so it could be applied to a circuit with large power consumption.

The mechanism of the direct bonding described above is that the surface of the silicon film or the silicon oxide film is appropriately surface-treated and then immersed in pure water so that hydroxyl groups are attached to the surfaces of both surfaces to be bonded. It is considered that the bonding is performed by the hydroxyl group attached to the. Subsequent heat treatment is believed to strengthen the bond by mutual diffusion.

(Embodiment 4) A method of manufacturing a hybrid integrated circuit according to a fourth embodiment of the present invention will be described.

In the same manner as in Example 3, the Si substrate and I
An electronic element or an optical element is formed at a predetermined position on the nP substrate, and then a protective film is formed and the surface is cleaned, and then an amorphous silicon film is formed on the InP substrate to be a bonding surface by plasma C
It was formed by VD or the like. The film thickness of the amorphous silicon to be formed is about 0.1 to 3 μm, which is almost the same as the case of the third embodiment. Then, as in Example 3, the amorphous silicon film and the surface of the Si substrate were extremely cleaned. The specific method is almost the same as that of the third embodiment. The surface of the amorphous silicon film was cleaned with a buffered hydrofluoric acid-based etching solution. After that, the surfaces of the amorphous silicon film and the Si substrate were thoroughly washed with pure water and immediately and uniformly superposed on each other, so that the bonding was easily obtained by the hydroxyl groups adsorbed on the surface of the amorphous silicon film.

Next, if necessary, the same process as in Example 3 is performed to perform hybrid integration in which the optical element formed on the InP substrate and the electronic element formed on the Si substrate are integrally integrated. The circuit can be manufactured, and the same effect as that of the third embodiment is obtained. The bonding strength in this case was 2-5 times that of the case where a silicon oxide film was used.

(Embodiment 5) A method of manufacturing a hybrid integrated circuit according to a fifth embodiment of the present invention will be described.

Similar to the third or fourth embodiment, an electronic element or an optical element is formed at a predetermined position on the Si substrate and the InP substrate, and then a protective film is formed and the surface is cleaned, and then the bonding surface is formed. A silicon oxide film or an amorphous silicon film was formed on the InP substrate. Then, as in Example 3 or 4, the silicon oxide film or the amorphous silicon film and the surface of the Si substrate were extremely cleaned. The specific method is almost the same as in Example 3 or 4. The surface of the silicon oxide film or the amorphous silicon film was cleaned with a buffered hydrofluoric acid-based etching solution. After that, the surface of the silicon oxide film or the amorphous silicon film was thoroughly washed with pure water, and the surfaces to be bonded were overlapped.

After drying, a high DC voltage was applied to the silicon oxide film portion or the amorphous silicon film portion while heating both substrates. As a result, an electrostatic force worked and a strong direct bond was obtained. Then, if necessary, the same process as that of the third embodiment is performed, and the optical element formed on the InP substrate and the S
It becomes possible to manufacture a hybrid integrated circuit in which electronic elements formed on the i substrate are integrated, and the same effects as in Example 3 can be obtained. The bond strength in this case was even stronger than that obtained by simply heat treating.

At this time, by using a semiconductor substrate for the Si substrate and the InP substrate or providing a low resistance portion on a part of the substrate so that a high voltage is applied to the film at the junction, the silicon oxide film or the silicon oxide film used for the junction is formed. A high voltage could be effectively applied to the amorphous silicon film. In this case, the silicon oxide film originally has a high resistance, but in the case of an amorphous silicon film, it is desirable to have a resistance as high as possible.

The applied voltage is preferably 50 to 1000 V for a film thickness of 1 micron, and when the voltage is high, it was better to apply it in pulses.

(Embodiment 6) A method of manufacturing a hybrid integrated circuit according to a sixth embodiment of the present invention will be described.

In the same manner as in Example 3, the Si substrate and I
An electronic element or an optical element is formed at a predetermined position on the nP substrate, and then a protective film is formed and the surface is cleaned, and then a polycrystalline silicon film is formed on the InP substrate to be a bonding surface by plasma C
It was formed by VD or the like. The film thickness of the polycrystalline silicon formed is about 0.1 to 3 μm, which is almost the same as in the third embodiment. Then, similarly to Example 3, the polycrystalline silicon film and the surface of the Si substrate were extremely cleaned. The specific method is almost the same as that of the third embodiment. The surface of the polycrystalline silicon film was cleaned with a buffered hydrofluoric acid-based etching solution. After that, the surfaces of the polycrystalline silicon film and the Si substrate were thoroughly washed with pure water and then immediately and uniformly piled up, so that the bonding was easily obtained by the hydroxyl groups adsorbed on the surface of the polycrystalline silicon film. Then, if necessary, the same process as in Example 3 is performed to manufacture a hybrid integrated circuit in which the optical element formed on the InP substrate and the electronic element formed on the Si substrate are integrally integrated. And the same effect as in Example 3 was obtained.

In each of the embodiments of the method for manufacturing the hybrid integrated circuit described above, an example of the structure of the second embodiment has been described, but in order to obtain the structure of the first embodiment, in each embodiment of each manufacturing method, A silicon oxide film or a silicon film is simply referred to as I
It could be realized by forming it on the back surface of the nP substrate. In this case, an optical wire or the like on the InP substrate and an electronic element or the like on the Si substrate may be connected by an external wire or I
For example, a via hole is formed in the nP substrate.

In each of the above embodiments, no other film was formed on the Si substrate, but similar direct bonding is possible even if a silicon oxide film or a silicon film is formed on the Si substrate. Met.

In any of the above examples, the flatness of the surface of the film used for bonding is important in all cases.
When the conditions are not good and the surface irregularities are large, the joining becomes difficult, so sufficient attention must be paid.

Further, in any of the embodiments, first of all, since the electronic elements and the like formed on the Si substrate and the optical elements and the like formed on the InP substrate are integrated together,
It has become possible to significantly reduce the size and weight of hybrid integrated circuits.

In addition, in a large-scale integrated circuit, an optical element of high performance can be obtained on an Si substrate which can be formed with a high yield.
Since it can be formed on the P substrate, a high-performance hybrid integrated circuit can be obtained with a high yield as compared with the case where the single integrated substrate is used.

Further, in any of the embodiments, the bonding method is that the InP substrate and the Si substrate are directly bonded by the silicon-based inorganic material having a controlled film thickness, so that the flatness is extremely good and large-scale integration is possible. The required sub-micron photolithography has become possible, and the reliability against heat and vibration has been greatly improved.

[0041]

As is apparent from the above description, the present invention has the advantages that optical elements and electronic elements can be integrated at high density, low cost, high yield, and good characteristics can be obtained.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a configuration of a hybrid integrated circuit according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing the configuration of a hybrid integrated circuit according to a second embodiment of the present invention.

[Explanation of symbols]

 1 Si substrate 2 InP substrate 3 Silicon oxide film or silicon film 4 Optical element (light emitting element) 4'Optical element (light receiving element) 5 Electronic element

Front page continuation (72) Inventor Tetsuyoshi Ogura 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (12)

[Claims] 1. A hybrid integrated circuit comprising an InP substrate and a Si substrate bonded to the InP substrate by a silicon oxide film or a silicon film formed at a predetermined portion of the InP substrate. . 2. The hybrid integrated circuit according to claim 1, wherein the silicon film is an amorphous silicon film. 3. The hybrid integrated circuit according to claim 1, wherein the silicon film is a polycrystalline silicon film. 4. An InP substrate having at least an optical element such as a semiconductor laser formed thereon, and an Si substrate having at least an electronic element such as a transistor formed thereon. Or the hybrid integrated circuit according to item 3. 5. The bonded InP substrate and Si
A light emitting element is formed on one side and a light receiving element is formed on the other side at a predetermined portion of the opposing surface of the substrate, and light emitted from the light emitting element is incident on the light receiving element. The hybrid integrated circuit according to claim 4. 6. The Si substrate and the InP substrate are each subjected to a semiconductor process treatment to be performed at a temperature of a predetermined temperature or higher for strengthening a bond, and then a silicon oxide film or a silicon oxide film is formed on the whole or a part of the InP substrate. A silicon film is formed and I
The surface of the silicon oxide film or the silicon film formed on the nP substrate is bonded to a predetermined portion of the Si substrate, heat treatment is performed at the predetermined temperature to strengthen the bonding force of the portion, and then the predetermined A method for manufacturing a hybrid integrated circuit, characterized in that the semiconductor integrated circuit is integrated by performing a semiconductor process treatment to be performed at a temperature lower than the predetermined temperature on the InP substrate and the Si substrate at a temperature equal to or lower than a temperature. 7. The method of manufacturing a hybrid integrated circuit according to claim 6, wherein the Si substrate is bonded to the silicon oxide film or the silicon film via a hydroxyl group. 8. The InP substrate and the Si substrate are bonded by applying a predetermined voltage between the silicon oxide film or the silicon film while heating the InP substrate and the Si substrate. Manufacturing method of hybrid integrated circuit. 9. The method of manufacturing a hybrid integrated circuit according to claim 8, wherein the predetermined temperature for strengthening the joining force at the joining portion is in a temperature range of 100 ° C. to 700 ° C. 10. The silicon film formed on an InP substrate comprises:
10. The method for manufacturing a hybrid integrated circuit according to claim 9, wherein the hybrid integrated circuit is an amorphous silicon film. 11. The silicon film formed on an InP substrate comprises:
10. The method for manufacturing a hybrid integrated circuit according to claim 9, wherein the method is a polycrystalline silicon film. 12. The Si substrate and the InP substrate are subjected to a semiconductor process treatment to be performed at a temperature higher than a predetermined temperature for strengthening a bond, and then a silicon oxide film or a silicon oxide film is formed on the entire surface or a part of the InP substrate. A silicon film is formed, and the S
A silicon oxide film or a silicon film is formed on the entire surface or a part of the i substrate, and the surface of the silicon oxide film or the silicon film formed on the InP substrate is replaced by the silicon oxide film or the silicon oxide film formed on the Si substrate. After bonding to the surface of the silicon film and performing heat treatment at the predetermined temperature to strengthen the bonding force at the bonding portion, the predetermined temperature is set on the InP substrate and the Si substrate at a temperature not higher than the predetermined temperature. A method of manufacturing a hybrid integrated circuit, characterized by integrating by performing a semiconductor process treatment to be performed at a temperature below 100 ° C.