JPH06289431A - Formation of thin-film transistor and active matrix display element - Google Patents
Formation of thin-film transistor and active matrix display elementInfo
- Publication number
- JPH06289431A JPH06289431A JP9696993A JP9696993A JPH06289431A JP H06289431 A JPH06289431 A JP H06289431A JP 9696993 A JP9696993 A JP 9696993A JP 9696993 A JP9696993 A JP 9696993A JP H06289431 A JPH06289431 A JP H06289431A
- Authority
- JP
- Japan
- Prior art keywords
- film transistor
- thin film
- active matrix
- island
- tfts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 13
- 239000011159 matrix material Substances 0.000 title claims description 22
- 230000015572 biosynthetic process Effects 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000000137 annealing Methods 0.000 claims abstract description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 12
- 238000000206 photolithography Methods 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 10
- 239000004065 semiconductor Substances 0.000 abstract description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 8
- 238000005530 etching Methods 0.000 abstract description 3
- 229920005591 polysilicon Polymers 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 238000005755 formation reaction Methods 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、アクティブマトリクス
表示素子における薄膜トランジスタ(TFT)の配置構
成と、そのTFTの形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arrangement structure of thin film transistors (TFTs) in an active matrix display device and a method of forming the TFTs.
【0002】[0002]
【従来の技術】近年、CRTに代わるフラットパネルデ
ィスプレイへの要求が高まっており、なかでも液晶表示
素子(LCD)が最も有望視されている。最近では、カ
ラー化と高速化の要求に対応して、TFTなどを利用し
たアクティブマトリクスタイプのLCDの開発が盛んに
行われている。2. Description of the Related Art In recent years, there has been an increasing demand for a flat panel display which replaces a CRT, and among them, a liquid crystal display element (LCD) is regarded as the most promising. In recent years, active matrix type LCDs using TFTs have been actively developed in response to the demands for colorization and high speed.
【0003】TFTには半導体層として一般にアモルフ
ァスシリコン(a−Si)が用いられているが、これに
代わってポリシリコン(ポリ−Si)を用いることで高
速動作が必要な駆動回路を、画素と同一基板上に形成す
ることが可能となる。Amorphous silicon (a-Si) is generally used as a semiconductor layer in a TFT, but by using polysilicon (poly-Si) instead of the amorphous silicon (a-Si), a driving circuit that requires high-speed operation can be provided in a pixel. It is possible to form them on the same substrate.
【0004】通常のガラス基板を使用した場合、低温プ
ロセスでポリ−Siを得る手段の一つとして、レーザ光
を使ってビームアニールし、a−Siを多結晶化(ポリ
−Si化)するという方法がある。ビームアニールで
は、必要な部分だけレーザ光などを照射し、TFTを形
成しないところはSiを多結晶化しないという方法を用
いることによって製造のスループットを向上させること
ができる。When an ordinary glass substrate is used, as one means for obtaining poly-Si in a low temperature process, beam annealing is performed using laser light to polycrystallize a-Si (poly-Si). There is a way. In the beam annealing, manufacturing throughput can be improved by using a method of irradiating only a necessary portion with laser light or the like and not forming polycrystal of Si in a portion where a TFT is not formed.
【0005】走査型のビームアニール装置を用いて、画
素表示用のトランジスタだけを基板上に形成する場合に
は、画素を構成するマトリクスの行(あるいは列)の数
だけレーザ光を走査して照射すればよい。ところが、駆
動回路を同じ基板状に作り込む場合には、表示画面の外
側に構成される駆動回路は、その部分での独自の配置構
成が行われて、ビームアニールとの関係が考慮されてい
なかったために、駆動回路部をビーム照射する走査の回
数が増えてしまっていた。その結果、スループットの低
下を招いていた。When only a pixel display transistor is formed on a substrate by using a scanning type beam annealing device, laser light is scanned and irradiated by the number of rows (or columns) of a matrix forming pixels. do it. However, when the drive circuit is formed on the same substrate, the drive circuit configured outside the display screen has its own layout configuration in that part, and the relationship with the beam annealing is not taken into consideration. As a result, the number of scans for irradiating the drive circuit unit with the beam has increased. As a result, the throughput is lowered.
【0006】[0006]
【発明が解決しようとする課題】走査型のレーザアニー
ル装置を用いて、アクティブマトリクスLCD用のポリ
−Si−TFTアクティブマトリクス基板を製造する場
合に、画素表示部とは別の回路系である駆動回路部をも
ビームアニールで同様に形成しようとすると、ビーム照
射の走査回数が増えることによるスループットの低下が
発生する。本発明の課題はこのような欠点を解消しよう
とするものである。When a poly-Si-TFT active matrix substrate for an active matrix LCD is manufactured by using a scanning type laser annealing device, a driving system which is a circuit system different from the pixel display section is used. If the circuit portion is similarly formed by beam annealing, the number of times of beam irradiation scanning is increased, resulting in a decrease in throughput. The object of the present invention is to eliminate such drawbacks.
【0007】[0007]
【課題を解決するための手段】本発明は上記の課題を解
決すべくなされたものであり、同一基板上に画素表示用
のTFTと駆動回路用のTFTとが形成されたアクティ
ブマトリクス表示素子において、画素表示用のTFTと
駆動回路用のTFTとが直線状に配置せしめられたこと
を特徴とするアクティブマトリクス表示素子(1)を提
供する。SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and provides an active matrix display device in which a pixel display TFT and a drive circuit TFT are formed on the same substrate. Provided is an active matrix display element (1) characterized in that a pixel display TFT and a drive circuit TFT are arranged linearly.
【0008】また、上記のアクティブマトリクス表示素
子(1)において、直線状の配置が画素の行方向にされ
たことを特徴とするアクティブマトリクス表示素子
(2)を提供する。Further, there is provided an active matrix display element (2) characterized in that, in the above active matrix display element (1), a linear arrangement is arranged in a row direction of pixels.
【0009】また、上記のアクティブマトリクス表示素
子(1)において、直線状の配置が画素の列方向にされ
たことを特徴とするアクティブマトリクス表示素子
(3)を提供する。Further, there is provided an active matrix display element (3) characterized in that, in the above active matrix display element (1), a linear arrangement is arranged in a pixel column direction.
【0010】また、α−Siをビームアニールによって
ポリ−Si化するTFTの形成方法であって、画素表示
用の薄膜トランジスタとされる第一のα−Si島群と、
駆動回路用のTFTとされる第二のα−Si島群とを同
一基板上で予めマトリクスの行方向または列方向に沿っ
て直線状に配列するよう予定し、次いで、これらの第一
のα−Si島群と、第二のα−Si島群の両者の予定さ
れた位置上を、マトリクスの行方向または列方向に沿っ
て、直線的な一回のビーム照射で各一行または各一列を
ビーム照射し、α−Siをアニールし、ポリ−Si化
し、さらにフォトリソグラフィ工程を経てSi島を形成
することを特徴とするTFTの形成方法を提供する。A method of forming a TFT in which α-Si is converted into poly-Si by beam annealing, which comprises a first α-Si island group used as a thin film transistor for pixel display,
It is planned that the second α-Si islands, which will be TFTs for the drive circuit, be arranged linearly in advance in the row direction or the column direction of the matrix on the same substrate, and then these first α-Si islands will be arranged. -Si island group and the second α-Si island group on the predetermined positions, along the row direction or the column direction of the matrix, each one row or each column by one linear beam irradiation. Provided is a method for forming a TFT, which comprises irradiating a beam, annealing α-Si, converting it into poly-Si, and forming a Si island through a photolithography process.
【0011】画素表示用の薄膜トランジスタなどからな
る能動素子は、もともと基板の行方向および列方向にそ
れぞれ直線状に並んでいる。これに合わせて、その外側
の周辺部に位置する駆動回路用の能動素子、具体的には
TFTなどの能動層(半導体チャンネル部)が、画像表
示部の能動素子の直線状配列にさらにのるように配置設
計する。The active elements such as thin film transistors for pixel display are originally arranged linearly in the row and column directions of the substrate. In accordance with this, the active elements for the drive circuit, specifically, the active layers (semiconductor channel portions) such as TFTs, which are located in the peripheral portion on the outer side, further extend in a linear array of the active elements in the image display portion. Layout design.
【0012】図5に基板上の全体的な配置構成を示す。
図5中の矢印は、基板の列方向を示している。図5中、
中央の斜線で示す部分が画素表示部8である。また、格
子で示す四つの周辺に駆動回路部7a、7b、7c、7
dが設けられる。図5中、太い実線で囲んだ領域αと破
線で囲んだ領域βとにおける、Si島の配置構成を図1
〜図4に示し、さらに次に述べる各実施例で詳細に説明
する。なお、各図中で矢印は同じ方向を指している(図
面中で左方向)。FIG. 5 shows the overall arrangement on the substrate.
Arrows in FIG. 5 indicate the column direction of the substrates. In FIG.
The portion indicated by the diagonal line in the center is the pixel display portion 8. In addition, the four driving circuits 7a, 7b, 7c, 7 are provided around the four grids.
d is provided. In FIG. 5, the arrangement configuration of Si islands in a region α surrounded by a thick solid line and a region β surrounded by a broken line is shown in FIG.
4A to 4C, further detailed description will be given in each of the following embodiments. Note that the arrows in each drawing point in the same direction (leftward in the drawings).
【0013】[0013]
(実施例1)図1に実施例1を示す。基板上に製膜され
たa−Siを、走査型のビームアニール装置を用い、エ
キシマレーザ光や電子線や連続発振アルゴンイオンレー
ザなどのエネルギービームを照射し、アニールしてポリ
−Si化する。その後、フォトリソグラフィとエッチン
グによってTFTの半導体チャンネル部となるH字形の
Si島1からなる画像表示部の第一のSi島群と、Si
島2A、2B、2C…からなる駆動回路部の第二のSi
島群を形成する。(Embodiment 1) FIG. 1 shows Embodiment 1. The a-Si film formed on the substrate is irradiated with an energy beam such as an excimer laser beam, an electron beam, or a continuous wave argon ion laser using a scanning type beam annealing device, and annealed to form poly-Si. After that, by photolithography and etching, the first Si island group of the image display unit formed of the H-shaped Si islands 1 to be the semiconductor channel portion of the TFT, and Si
The second Si of the drive circuit section including the islands 2A, 2B, 2C, ...
Form an island group.
【0014】レーザ光の走査を行方向(ゲート・バス・
ラインと平行)に行う場合、走査ピッチは画素の行ピッ
チaで行う。このとき、ゲート側の駆動回路部の第二の
Si島群(Siがエッチングされて残る図中のH字形の
部分)が画素表示部の第一のSi島群の行方向の延長線
上に形成されるように予め配置設計する。Laser beam scanning is performed in the row direction (gate, bus,
When performed in parallel with the line), the scanning pitch is the row pitch a of the pixels. At this time, a second Si island group (H-shaped portion in the figure left by etching Si) of the drive circuit section on the gate side is formed on the extension line in the row direction of the first Si island group of the pixel display section. The layout is designed beforehand.
【0015】その後、ビーム照射して、α−Siを多結
晶化する。照射されるビームスポット軌跡10をその後
に形成されるSi島と重ねて示す。実施例1では、全て
のSi島が照射されるビームスポット軌跡10の中に含
まれる。ただし、必ずしもSi島の全体がポリ−Si化
される必要はなく、TFTの半導体チャンネル部となる
べき領域のみがポリ−Si化されればよい。そのため、
Si島の向きは任意でよい。Thereafter, beam irradiation is performed to polycrystallize α-Si. The irradiated beam spot locus 10 is shown superimposed on the Si islands to be formed thereafter. In the first embodiment, all Si islands are included in the beam spot trajectory 10 irradiated. However, the entire Si island does not necessarily need to be poly-Si, and only the region that should be the semiconductor channel portion of the TFT may be poly-Si. for that reason,
The orientation of the Si island may be arbitrary.
【0016】周辺部において、駆動用素子としてCMO
Sを用いる場合、それぞれの半導体チャンネル部を同時
に多結晶化して得ることができる。図1に示す、符号2
A、2B、2Cの各組をCMOSの対の半導体チャンネ
ル部とすることができる。以下の実施例においても、同
様のことが可能である。In the peripheral portion, a CMO is used as a driving element.
When S is used, it can be obtained by simultaneously polycrystallizing the respective semiconductor channel portions. Reference numeral 2 shown in FIG.
Each set of A, 2B, and 2C can be a semiconductor channel portion of a pair of CMOS. The same can be applied to the following embodiments.
【0017】(実施例2)図2に実施例2を示す。周辺
部において、このような配置構成も可能である。第一の
Si島群を構成するSi島1と第二のSi島群を構成す
るSi島2A、2B、2Cの向きが直交関係に位置して
いる。Si島2A、2B、2Cは、少なくともそれぞれ
の半導体チャンネル部が照射されるビームスポット軌跡
10と交差して多結晶化されている。(Second Embodiment) FIG. 2 shows a second embodiment. Such an arrangement configuration is also possible in the peripheral portion. The directions of the Si islands 1 forming the first Si island group and the Si islands 2A, 2B, 2C forming the second Si island group are located in an orthogonal relationship. The Si islands 2A, 2B, and 2C are polycrystallized by intersecting the beam spot locus 10 with which at least the respective semiconductor channel portions are irradiated.
【0018】(実施例3)同様に、Si島が完全に一列
直線状に並ぶ必要もないので、図3に示す実施例3のよ
うな構成でもよい。第二のSi島群を構成する、Si島
2A、2B、2Cはそれぞれの位置で並列に配置されて
いる。全てのH字形のSi島はビームスポット軌跡10
に覆われている。(Embodiment 3) Similarly, since it is not necessary for the Si islands to be completely aligned in a straight line, a structure like Embodiment 3 shown in FIG. 3 may be used. The Si islands 2A, 2B, and 2C that form the second Si island group are arranged in parallel at their respective positions. All H-shaped Si islands have beam spot locus 10
Is covered with.
【0019】(実施例4)ビーム走査を列方向(ソース
・バス・ラインと平行)に行う場合は、走査ピッチは画
素の列ピッチbとする。この場合は、図4に示すように
ソース側の駆動回路部の第二のSi島群(Si島2A、
2Bが、2C)が画素表示部の第一のSi島群(Si島
1)の列方向の延長線上に形成されるようにする。そし
て列方向に走査されるビームスポット軌跡11が、各S
i島を覆っている。(Embodiment 4) When beam scanning is performed in the column direction (parallel to the source bus lines), the scanning pitch is the column pitch b of pixels. In this case, as shown in FIG. 4, the second Si island group (Si island 2A,
2B, 2C) are formed on the extension lines in the column direction of the first Si island group (Si island 1) of the pixel display portion. The beam spot trajectory 11 scanned in the column direction is
i island is covered.
【0020】[0020]
【発明の効果】本発明において、駆動回路用のTFTと
画素表示用のTFTが直線状に配置されるので、TFT
の形成時にビームアニールが駆動回路と画素表示の回路
の両方のTFTのポリ−Si形成をほぼ同時に行えるこ
とになる。そのため、駆動回路のためのビームアニール
を別途行う必要がなくなって、それによりスループット
が大きく向上し、所要時間が半減以下となった。According to the present invention, since the TFT for the driving circuit and the TFT for displaying the pixel are arranged linearly, the TFT
The beam annealing at the time of formation of the TFTs enables the poly-Si formation of the TFTs of both the drive circuit and the pixel display circuit almost simultaneously. Therefore, it is not necessary to separately perform beam annealing for the drive circuit, which greatly improves the throughput and reduces the required time to half or less.
【0021】また、別個に半導体チャンネル部を形成す
るのではなく、短い時間にマトリクスの行方向または列
方向の数のビーム照射の走査で行うので、各TFTの特
性ばらつきが少なくなり、最終製品での電気的特性が向
上した。Further, since the semiconductor channel portion is not formed separately but by scanning the beam irradiation in the row direction or the column direction of the matrix in a short time, the characteristic variation of each TFT is reduced, and the final product is manufactured. Has improved the electrical characteristics.
【0022】走査型のビームアニール装置など、ビーム
走査を行ってトランジスタに何らかの処理をする方法に
おいて、製造効率の向上など同様の効果が期待される。A similar effect such as improvement in manufacturing efficiency is expected in a method of performing beam scanning to perform some processing on a transistor, such as a scanning type beam annealing apparatus.
【0023】本発明は、その効果を失わない範囲で種々
の回路形成に適用できる。The present invention can be applied to various circuit formations as long as the effect is not lost.
【図1】実施例1でのSi島の配列を示す部分拡大平面
図。FIG. 1 is a partially enlarged plan view showing an arrangement of Si islands in a first embodiment.
【図2】実施例2でのSi島の配列を示す部分拡大平面
図。FIG. 2 is a partially enlarged plan view showing an arrangement of Si islands in a second embodiment.
【図3】実施例3でのSi島の配列を示す部分拡大平面
図。FIG. 3 is a partially enlarged plan view showing an arrangement of Si islands in a third embodiment.
【図4】実施例4でのSi島の配列(列方向)を示す部
分拡大平面図。FIG. 4 is a partially enlarged plan view showing the arrangement (column direction) of Si islands in the fourth embodiment.
【図5】LCD用のアクティブマトリクス基板を模式的
に表した平面図。FIG. 5 is a plan view schematically showing an active matrix substrate for LCD.
1、2A、2B、2C:Si島 10、11:ビームスポット軌跡 1, 2A, 2B, 2C: Si island 10, 11: Beam spot locus
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/336 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H01L 21/336
Claims (4)
タと駆動回路用の薄膜トランジスタとが形成されたアク
ティブマトリクス表示素子において、 画素表示用の薄膜トランジスタと駆動回路用の薄膜トラ
ンジスタとが直線状に配置せしめられたことを特徴とす
るアクティブマトリクス表示素子。1. In an active matrix display device in which a thin film transistor for pixel display and a thin film transistor for drive circuit are formed on the same substrate, the thin film transistor for pixel display and the thin film transistor for drive circuit are linearly arranged. An active matrix display device characterized by the above.
において、直線状の配置が画素の行方向にされたことを
特徴とするアクティブマトリクス表示素子。2. The active matrix display element according to claim 1, wherein the linear arrangement is arranged in the row direction of the pixels.
において、直線状の配置が画素の列方向にされたことを
特徴とするアクティブマトリクス表示素子。3. The active matrix display element according to claim 1, wherein a linear arrangement is arranged in a pixel column direction.
Si化する薄膜トランジスタの形成方法であって、 画素表示用の薄膜トランジスタとされる第一のα−Si
島群と、駆動回路用の薄膜トランジスタとされる第二の
α−Si島群とを同一基板上で予めマトリクスの行方向
または列方向に沿って直線状に配列するよう予定し、 次いで、これらの第一のα−Si島群と、第二のα−S
i島群の両者の予定された位置上を、 マトリクスの行方向または列方向に沿って、直線的な一
回のビーム照射で各一行または各一列をビーム照射し、
α−Siをアニールし、ポリ−Si化し、 さらにフォトリソグラフィ工程を経てSi島を形成する
ことを特徴とする薄膜トランジスタの形成方法。4. Poly-α-Si is formed by beam annealing.
A method of forming a thin film transistor for converting to Si, comprising a first α-Si used as a thin film transistor for pixel display.
It is planned that the island group and the second α-Si island group used as the thin film transistor for the driving circuit are arranged in advance linearly along the row direction or the column direction of the matrix on the same substrate, and then these First α-Si island group and second α-S
Beam each row or each column by a single linear beam irradiation on the predetermined positions of both of the i island groups along the row direction or the column direction of the matrix,
A method for forming a thin film transistor, which comprises annealing α-Si to form poly-Si, and further forming a Si island through a photolithography process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9696993A JPH06289431A (en) | 1993-03-31 | 1993-03-31 | Formation of thin-film transistor and active matrix display element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9696993A JPH06289431A (en) | 1993-03-31 | 1993-03-31 | Formation of thin-film transistor and active matrix display element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06289431A true JPH06289431A (en) | 1994-10-18 |
Family
ID=14179063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9696993A Pending JPH06289431A (en) | 1993-03-31 | 1993-03-31 | Formation of thin-film transistor and active matrix display element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06289431A (en) |
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| WO2000002251A1 (en) * | 1998-07-06 | 2000-01-13 | Matsushita Electric Industrial Co., Ltd. | Thin film transistor and liquid crystal display |
| WO2003009351A1 (en) * | 2001-07-18 | 2003-01-30 | Advanced Lcd Technologies Development Center Co., Ltd. | Thin-film semiconductor device and its production method |
| JP2003186421A (en) * | 2001-09-10 | 2003-07-04 | Semiconductor Energy Lab Co Ltd | Light emission device and manufacturing method for semiconductor device |
| US6613619B2 (en) | 1994-12-16 | 2003-09-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for producing the same |
| JP2003332235A (en) * | 2002-05-17 | 2003-11-21 | Fujitsu Ltd | Semiconductor crystallization method and apparatus |
| JP2005164741A (en) * | 2003-11-28 | 2005-06-23 | Toshiba Matsushita Display Technology Co Ltd | Active matrix type display device and manufacturing method therefor |
| US7001461B2 (en) | 2002-09-09 | 2006-02-21 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallization apparatus, crystallization method, and phase shifter |
| KR100597511B1 (en) * | 1998-03-26 | 2006-07-10 | 산요덴키가부시키가이샤 | Driver circuit of display device |
| US7109073B2 (en) | 2001-08-17 | 2006-09-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating semiconductor device |
| US7112517B2 (en) | 2001-09-10 | 2006-09-26 | Semiconductor Energy Laboratory Co., Ltd. | Laser treatment device, laser treatment method, and semiconductor device fabrication method |
| US7145623B2 (en) | 2002-02-06 | 2006-12-05 | Sharp Kabushiki Kaisha | Flat panel display having concentrated switching element arrangement and method of manufacturing the same |
| JP2007521517A (en) * | 2003-12-24 | 2007-08-02 | トムソン ライセンシング | Image display screen and control method thereof |
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| US7317205B2 (en) | 2001-09-10 | 2008-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of manufacturing a semiconductor device |
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| US7422987B2 (en) | 2001-08-30 | 2008-09-09 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
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-
1993
- 1993-03-31 JP JP9696993A patent/JPH06289431A/en active Pending
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| KR100757763B1 (en) * | 2001-06-26 | 2007-09-12 | 샤프 가부시키가이샤 | Polysilicon film forming method |
| WO2003009351A1 (en) * | 2001-07-18 | 2003-01-30 | Advanced Lcd Technologies Development Center Co., Ltd. | Thin-film semiconductor device and its production method |
| JP2003031497A (en) * | 2001-07-18 | 2003-01-31 | Advanced Lcd Technologies Development Center Co Ltd | Thin film semiconductor device, substrate thereof, and method of manufacturing the same |
| KR100792323B1 (en) * | 2001-07-18 | 2008-01-07 | 가부시키가이샤 에키쇼센탄 기쥬쓰 가이하쓰센타 | Thin film semiconductor device and manufacturing method thereof |
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| US7145623B2 (en) | 2002-02-06 | 2006-12-05 | Sharp Kabushiki Kaisha | Flat panel display having concentrated switching element arrangement and method of manufacturing the same |
| US7541230B2 (en) | 2002-05-17 | 2009-06-02 | Sharp Kabushiki Kaisha | Method and apparatus for crystallizing semiconductor with laser beams |
| US7660042B2 (en) | 2002-05-17 | 2010-02-09 | Sharp Kabushiki Kaisha | Apparatus for crystallizing semiconductor with laser beams |
| US7927935B2 (en) | 2002-05-17 | 2011-04-19 | Sharp Kabushiki Kaisha | Method for crystallizing semiconductor with laser beams |
| JP2003332235A (en) * | 2002-05-17 | 2003-11-21 | Fujitsu Ltd | Semiconductor crystallization method and apparatus |
| US7528023B2 (en) | 2002-05-17 | 2009-05-05 | Sharp Kabushiki Kaisha | Apparatus for crystallizing semiconductor with laser beams |
| KR100848098B1 (en) * | 2002-06-24 | 2008-07-24 | 삼성전자주식회사 | Thin film transistor substrate and its manufacturing method |
| US7001461B2 (en) | 2002-09-09 | 2006-02-21 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallization apparatus, crystallization method, and phase shifter |
| US7413608B2 (en) | 2002-09-09 | 2008-08-19 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallization apparatus, crystallization method, and phase shifter |
| US7505204B2 (en) | 2002-09-09 | 2009-03-17 | Advanced Lcd Technologies Development Center Co., Ltd. | Crystallization apparatus, crystallization method, and phase shifter |
| JP2005164741A (en) * | 2003-11-28 | 2005-06-23 | Toshiba Matsushita Display Technology Co Ltd | Active matrix type display device and manufacturing method therefor |
| JP2007521517A (en) * | 2003-12-24 | 2007-08-02 | トムソン ライセンシング | Image display screen and control method thereof |
| JP2014078010A (en) * | 2013-10-29 | 2014-05-01 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
| TWI676214B (en) * | 2017-04-27 | 2019-11-01 | 財團法人大邱慶北科學技術院 | Repairing method of characteristics of transistors by local heat treatment |
| CN112785962A (en) * | 2021-03-11 | 2021-05-11 | 厦门天马微电子有限公司 | Display panel and display device |
| CN112785962B (en) * | 2021-03-11 | 2024-03-08 | 厦门天马微电子有限公司 | Display panel and display device |
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