JPH06276779A - Dc-motor driving device and dc-motor driving - Google Patents

Abstract

PURPOSE:To prevent the narrowing of load torque even if the VDRV of a motor driving power supply is changed. CONSTITUTION:A microcomputer 39 combines the phase controlled variable and the frequency controlled variable and computes the composite controlled variable. The composite controlled variable is multiplied by the variable, which is proportional to a power supply voltage, and the corrected composite controlled valuable is computed. A control signal is ouputted into a driver 37 of a DC motor 31 according to the corrected composite controlled variable.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC motor driving device and a DC motor driving method for controlling the rotation speed of a DC motor.

[0002]

2. Description of the Related Art A PLL system is widely known as a method for controlling the rotation speed of a DC motor. This PLL
It is known that the method is carried out by a hardware server or software.

[0003]

The method of controlling the rotation of the DC motor by the hardware servo is rarely used recently because of its cost and performance unevenness such as rotation unevenness. Instead, software servos have been adopted.

Further, in the software servo, when the motor drive power supply voltage VDRV changes as shown in FIG. 9, the motor output shaft torque also changes. In FIG. 9, a solid line a indicates a case where the motor drive power supply voltage VDRV is the rated voltage, a one-dot broken line b indicates a case where the motor drive power supply VDRV is 10% higher than the rated voltage, and a broken line c indicates a motor drive power supply. V
Motor speed when DRV is 10% lower than the rated voltage-
The torque characteristic is.

As described above, when the motor drive power source VDRV changes, the torque of the motor output shaft also changes. For example,
When the drive power supply VDRV changes by ± 10%, the minimum load torque outside the control speed N is T ₁ , and the maximum load torque is T.
_2, and the load torque range has a problem that narrow.

The present invention has been made in view of the above points, and an object thereof is to provide a DC motor drive device and a DC motor in which the load torque range is not narrowed even if the motor drive power supply VDRV changes. It is to provide a method for driving a motor.

[0007]

According to a first aspect of the present invention, there is provided a DC motor driving device, wherein a voltage detecting means for detecting a power source voltage for driving the DC motor and a frequency corresponding to the number of revolutions of the DC motor. Frequency generating means for outputting a signal, a driver for controlling electric power supplied to the DC motor, position detecting means for detecting the position of the DC motor, and DC motor detected by the position detecting means. Phase switching means for performing phase switching based on the position of the frequency control means, frequency control amount calculating means and phase control amount calculating means for calculating the frequency control amount and the phase control amount based on the frequency signal generated from the frequency generating means, The combined control amount calculation means for calculating the combined control amount by combining the phase control amount calculated by the phase control amount calculation means and the frequency control amount calculated by the frequency control amount calculation means, and the voltage control means for detecting the combined control amount. And a variable setting means for setting a variable that is inversely proportional to the power supply voltage, and the combined control amount calculated by the combined control amount calculation means is multiplied by the variable set by the variable setting means to calculate a corrected combined control amount. It is characterized in that the control signal is output to the driver according to the correction control amount calculation means and the correction synthesis control amount calculated by the correction control amount calculation means.

A DC motor drive device according to claim 2 is
Phase switching means for performing phase switching based on the position of the DC motor, frequency control amount calculating means for calculating the frequency control amount and the phase control amount based on the frequency signal corresponding to the rotation speed of the DC motor, A phase control amount calculation means, a combined control amount calculation means for calculating a combined control amount by combining the phase control amount calculated by the phase control amount calculation means and the frequency control amount calculated by the frequency control amount calculation means, A variable setting means for setting a variable inversely proportional to the power supply voltage detected by the voltage detecting means, and a synthetic control amount calculated by the synthetic control amount calculating means multiplied by a variable set by the variable setting means. A correction control amount calculation means for calculating the correction synthesis control amount and a means for controlling the rotation of the DC motor according to the correction synthesis control amount calculated by the correction control amount calculation means are provided.

[0009]

Function: The power supply voltage for driving the DC motor is detected and taken into the microcomputer, and then D is supplied in the microcomputer.
When the power supply voltage for driving the C motor increases, the on-duty of the drive pulse is controlled to decrease.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A DC motor driving method according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a DC motor driving device of the present invention, FIG. 2 is a block diagram showing the configuration of the dedicated LSI of FIG. 1, and FIG. 3 is a diagram showing a relationship of a variable .alpha. 4 is a flow chart showing a motor driving method according to an embodiment of the present invention,
5 is a diagram showing the relationship between the period difference ΔT and the frequency control amount Vf, FIG. 6 is a diagram showing a virtual reference signal, FIG. 7 is a diagram showing the relationship between the phase difference ΔΦ and the phase control amount Vp, and FIG. 8 is a PWM. It is a figure which shows an output waveform.

In FIG. 1, 31 is a DC motor, and 32 is a frequency generator that outputs a frequency signal (hereinafter referred to as FG pulse) according to the rotation speed of the motor. The rotational position of the DC motor 31 is detected by, for example, a position sensor (not shown) including a hall element, and the position signal is amplified by the amplifier 33 and then input to the dedicated LSI 34.
The FG pulse output from the frequency generator 32 is amplified by the amplifier 35 and then input to the dedicated LSI 34.

The detailed structure of the dedicated LSI 34 will be described later with reference to FIG. A phase ON / OFF signal is output from the dedicated LSI 34 to the pre-driver 36. The pre-driver 36 amplifies the phase on / off signal and outputs it to the driver 37. The driver 37 amplifies the input signal and outputs it to the motor 31. This driver 37
Is supplied with a motor drive power supply voltage VDRV. This motor drive power supply voltage VDRV is divided by a voltage dividing circuit 38 and then input to a microcomputer 39. here,
39r is a register for holding the data held in the latch circuit 45. The current flowing through the driver 37 is detected by a sensor (not shown), and the detected current is input to the dedicated LSI via the comparator 40.

Next, the structure of the dedicated LSI 34 will be described with reference to FIG. In FIG. 2, reference numeral 41 is an oscillator circuit that outputs the reference clock signal CK. This oscillator circuit 4
The reference frequency signal output from 1 is output to the counter 42. The counter 42 counts up the reference clock signal CK from "0" to "FFFFFH" and returns to "0" again.

The FG pulse output from the amplifier 35 is waveform-shaped by the waveform shaping circuit 43 and then output to the timing generation circuit 44. The reference clock signal CK described above is input to the timing signal generation circuit 44, and the FG interrupt signal INT is supplied to the microcomputer.
Data to the latch 39 and the latch circuit 45. The latch circuit 45 latches the count value counted by the counter 42 at the timing when the interrupt signal INT is input.

Microcomputer 39 and dedicated LSI 3
The latch circuit 45 and the PWM circuit 46 in 4 are connected by the data bus DB. The reference clock signal CK output from the oscillation circuit 41 described above is input to the PWM circuit 46. Reference numeral 46r is a register for storing the combined control amount To 'corresponding to the on-duty period of the PWM signal output from the microcomputer 39 to the PWM circuit 46.

The output of the PWM circuit 46 is output to the phase on / off circuit and the current limiting circuit 47. Reference numeral 48 is a phase switching circuit to which the above-mentioned position signal is input. The phase switching circuit 48 converts the input position signal into a phase switching signal and outputs it to the phase on / off circuit and the current limiting circuit 47. The phase on / off and current limiting circuit 47 outputs a phase on / off signal to the pre-driver 36.

Next, the operation of the embodiment of the present invention constructed as above will be described. First, when the motor 31 rotates, the FG pulse output from the frequency generator 32 is amplified by the amplifier 35 and then input to the dedicated LSI 34. That is, the signal is output to the latch circuit 45 and the microcomputer 39 as the interrupt signal INT via the waveform shaping circuit 43 and the timing generation circuit 44 of the dedicated LSI 34. As a result, the count value of the counter 42 is held in the latch circuit 45, and the interrupt program shown in FIG. 4 is executed under the control of the microcomputer 39.

First, processing is performed to save the count value of the counter 42 held in the latch circuit 45 when the previous interrupt signal INT held in the register 39r was input to the microcomputer 39 (step S).
1). Next, the count value of the counter 42 currently held in the latch circuit 45 is read into the register 39r (step S2).

The motor drive power supply voltage VDRV is divided by the voltage dividing circuit 38 and then taken into the microcomputer 39, and the A / D built in the microcomputer 39.
The A / D input value of the motor drive power supply voltage VDRV is read by converting it into a digital value by the converter (step S3).

Then, the cycle of the FG pulse is obtained by obtaining the difference between the count value held in the previous latch circuit 45 and the count value held in the current latch circuit 45, and the calculated FG pulse is temporarily calculated. Set the reference cycle to "1.
If it is 0000H ", the period difference ΔT from the reference period is calculated, and the frequency control amount Vf is calculated from the relationship shown in FIG. 5 according to the calculated ΔT (step S5).

By the way, the counter 42 displays "10000".
Imagine a reference signal operating at a time for counting H "(0 to FFFFH), that is, a reference period T of an FG pulse. For example, assuming that the reference signal is a rectangular wave with a duty of 50%, the counter 42 Will be inverted every time it counts "8000H".
Focusing on the lower 16 bits of 2, the virtual reference signal can be set as shown in FIG. Therefore, the maximum count value “FFFFH” of the lower 16 bits of the counter and F
The phase difference ΔΦn between the virtual reference signal and the FGG pulse can be obtained by obtaining the difference ΔPn from the value ΔDn (L) of the lower 16 bits of the counter 42 latched by the latch circuit 45 by the G pulse. Where counter 4
When the value “2” of 2 is used as a reference, ΔDn (L) becomes the phase difference ΔPn.

Then, referring to the relationship of FIG. 7, the phase difference ΔΦ
The phase control amount Vp for n is calculated (step S
5). Here, the count value of the phase difference ΔΦn is 0 to FFFF
H means a phase difference of 0 to 2π. The frequency control amount Vf and the phase control amount Vp calculated as described above are expressed by the equation (1).
The combined control amount Vo is calculated based on (step S
6). Vo = Vref (1 + Gf + Gp)-(Gf · Vf + Gp · Vp) (1) where Gf and Gp are constants.

When the PWM output is defined by the active low, as shown in FIG. 8, when the sawtooth wave and the amplitude of Vo are set to "0" to "FFH", the PWM output pulse width To is expressed by It is calculated from (2) (step S7). To = FFH-Vo (2) That is, the output pulse width To is Vo as shown in equation (2).
The larger the value of, that is, the smaller Vf and Vp in the equation (1), the smaller the output pulse width To becomes. Next, the variable .alpha. Is calculated by referring to the relationship shown in FIG. 3 from the A / D input value of the motor drive power supply voltage VDRV (step S8). Then, the combined control amount To 'considering the fluctuation of the motor drive power supply voltage VDRV is calculated based on the following equation (3) (step S9). To ′ = αTo (3) Then, the combined control amount To ′ is output to the register 46r of the PWM circuit 46 (step S10).

Hereinafter, the combined control amount T by the PWM circuit 46
A PWM signal for outputting an ON signal by o'is output to the phase ON / OFF circuit and the current limiting circuit 47, and the frequency control amount V
The rotation of the motor 31 is controlled according to f, the phase control amount Vp, and the motor drive power supply voltage VDRV.

By the way, the microcomputer 39 outputs the combined control amount To 'to the PWM circuit 46, stores the count value in the register 39r, restores the register, and returns from the interrupt processing to the main routine. .

As described above, the combined control amount To 'is calculated by multiplying the combined control amount To by the variable α, and the variable α is set so as to be inversely proportional to the magnitude of the motor drive power supply voltage VDRV. Therefore, the motor drive power supply voltage VDRV
The load torque width does not become narrower even if is increased or decreased.

[0027]

As described above in detail, according to the present invention, the electric power supplied to the DC motor is increased or decreased so as to be inversely proportional to the motor drive power supply voltage VDRV. It is possible to provide a DC motor drive device and a DC motor drive method in which the load torque is not narrowed even if VDRV changes.

[Brief description of drawings]

FIG. 1 is a DC to which a DC motor driving method of the present invention is applied.
FIG. 3 is a block diagram of a motor drive device.

FIG. 2 is a block diagram showing the configuration of a dedicated LSI.

FIG. 3 is a diagram showing a relationship of a variable α with respect to a motor drive power supply voltage.

FIG. 4 is a flowchart showing a motor driving method according to an embodiment of the present invention.

FIG. 5 is a diagram showing a relationship between a period difference ΔT and a frequency control amount Vf according to the embodiment.

FIG. 6 is a diagram showing a virtual reference signal according to the embodiment.

FIG. 7 is a diagram showing a relationship between a phase difference ΔΦn and a phase control amount Vp according to the embodiment.

FIG. 8 is a diagram showing a PWM output waveform according to the embodiment.

FIG. 9 is a diagram showing the relationship between the rotational speed and torque of a conventional DC motor.

[Explanation of symbols]

31 ... DC motor, 32 ... Frequency generator, 33, 35 ...
Amplifier, 36 ... Pre-driver, 37 ... Driver, 38 ...
Voltage dividing circuit, 40 ... Comparator, 41 ... Oscillation circuit, 42
... counter, 43 ... waveform shaping circuit, 44 ... timing generating circuit, 45 ... latch circuit, 46 ... PMN circuit, 47 ...
Phase on / off circuit and current limiting circuit, 48 ... Phase conversion circuit.

Claims (2)

[Claims] 1. A voltage detecting means for detecting a power supply voltage for driving a DC motor, a frequency generating means for outputting a frequency signal according to the number of revolutions of the DC motor, and a voltage supplying means for supplying to the DC motor. A driver for controlling electric power, position detecting means for detecting the position of the DC motor, phase switching means for performing phase switching based on the position of the DC motor detected by the position detecting means, and the frequency. Frequency control amount calculation means and phase control amount calculation means for calculating the frequency control amount and the phase control amount based on the frequency signal generated from the generation means, and the phase control amount and the frequency control calculated by the phase control amount calculation means. The combined control amount calculating means for combining the frequency control amounts calculated by the amount calculating means to calculate the combined control amount, and a variable setting for setting a variable inversely proportional to the power supply voltage detected by the voltage detecting means. Means, a correction control amount calculation means for calculating a correction synthesis control amount by multiplying the synthesis control amount calculated by the synthesis control amount calculation means by a variable set by the variable setting means, and the correction control amount calculation means A DC motor drive device which outputs a control signal to the driver in accordance with the corrected combined control amount calculated in step 1. 2. A phase switching means for performing phase switching based on the position of a DC motor, and a frequency for calculating a frequency control amount and a phase control amount based on a frequency signal corresponding to the rotation speed of the DC motor. Control amount calculation means and phase control amount calculation means, combination for calculating the combined control amount by combining the phase control amount calculated by the phase control amount calculation means and the frequency control amount calculated by the frequency control amount calculation means Control amount calculation means, variable setting means for setting a variable that is inversely proportional to the power supply voltage detected by the voltage detection means, and the combined control amount calculated by the combined control amount calculation means set by the variable setting means A correction control amount calculating means for multiplying a variable to calculate a correction synthesis control amount, and a means for controlling the rotation of the DC motor according to the correction synthesis control amount calculated by the correction control amount calculating means. Motor control method - DC motor, characterized in that the.