JPH06267913A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] [Objective] After the wafer process is completed, when the back surface is ground to reduce the thermal resistance, the work strain layer reaches the outer circumference of the substrate, which solves the problem of being easily chipped by an external force. [Structure] The chamfer dimension is increased on both sides or only on the back surface side so that the ground surface intersects the chamfered portion so that the work strain layer does not reach the outer periphery. Alternatively, after grinding, the work strain layer on the outer peripheral portion is removed by etching or polishing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a step of reducing the thermal resistance by grinding the back surface of a semiconductor substrate which has undergone a wafer process.

[0002]

2. Description of the Related Art When manufacturing a semiconductor device such as a transistor or an IC, a semiconductor substrate is subjected to a wafer process such as thin film formation on the surface, oxidation, doping, annealing, resist treatment, exposure, etching or cleaning, and drying. In order to prevent damage, a thick semiconductor substrate is processed, and after the wafer process is finished, the back surface is ground to reduce the thickness of the semiconductor substrate and reduce the thermal resistance. Further, the outer peripheral portion of the semiconductor substrate is chamfered in order to prevent damage during handling. For example, as shown in FIG. 2, the outer peripheral portion of the p-type substrate 11 has L ₁ , L _{2 of} about 100 μm.
After processing the chamfered portion 2 having the chamfered dimension, the n ⁺ region 12 is formed by selective impurity diffusion, the n layer 13 is epitaxially grown, and the chamfered portion 2 is formed on the outer peripheral portion to a total thickness of 500.
A μm silicon substrate 1 is obtained. As a result, n ⁺ region 12 becomes a buried layer. Then, the p ⁺ region 14 is formed by selective impurity diffusion from the surface of the epitaxial layer 13, the wiring 16 is brought into contact with the opening of the oxide film 15 on the surface, and the surface is covered with the protective film 17. Although only a part has been described above, after forming the element in this way, the portion below the dotted line 18 is ground by about 150 μm and the silicon substrate 1 is cut by about 350 μm.
Thin to the thickness of.

[0003]

However, when grinding is carried out in this way, as shown in FIG.
When the processing strained layer 4 having the above thickness is generated and a force is applied to the outer peripheral portion of the substrate 1, the outer peripheral portion 5 of the processing strained layer 4 is easily cracked. An object of the present invention is to solve the above-mentioned problems and to provide a method for manufacturing a semiconductor device in which cracks do not occur at the outer peripheral portion of the ground surface.

[0004]

In order to achieve the above-mentioned object, the present invention is to perform a wafer process on one surface side of a semiconductor substrate having a chamfered outer peripheral portion and then grind the other surface side. In the method of manufacturing a semiconductor device including the step of obtaining a semiconductor substrate having a predetermined thickness, the chamfered portion is formed so that the end of the ground surface intersects the chamfered surface. The chamfered dimensions on both sides may be the same, and the chamfered dimension on the side to be ground may be larger than that on the other side. Alternatively, as another invention, the work strain layer on the outer peripheral portion of the ground surface is removed after grinding. It is also effective to remove the work strained layer chemically or mechanically.

[0005]

If the chamfered portion is formed so that the ground surface intersects the chamfered surface, the outer peripheral portion of the ground surface exists inside the outer peripheral portion of the semiconductor substrate, so that force is applied to the outer peripheral portion of the substrate. Also does not come into contact with the work strain layer generated by grinding, and cracks are less likely to occur. Alternatively, if the work strain layer generated on the ground surface is removed at the outer peripheral portion, it will not come into contact with the work strain layer even if a force is applied to the outer peripheral portion of the substrate as in the above case.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The substrate thinning process in the method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings in which the same parts as those in FIGS. In the first embodiment shown in FIG. 1, the chamfered portions L ₁ and L ₂ of the chamfered portion 2 of the silicon substrate 1 are both about 180 μm, and after finishing the wafer process, the ground surface is ground by 150 μm. 3 is formed. At this time, the chamfered portion 2 remains by L ₃ > 50 μm, and the work strain layer 4 does not reach the outer peripheral surface 5 of the substrate 1.

In the second embodiment shown in FIG. 4, L₁A 10
0 μm, L₂Was 180 μm. Also in this case 150 μm
The ground surface 3 produced by cutting intersects the chamfered portion 2, and the chamfered portion is L
₃> 50 μm remains, but chamfered dimension L of substrate 1 after grinding
₁= 100 μm, L ₁= 180 μm implementation of Figure 1
The effective area of the substrate is larger than that of the example. No. shown in FIG.
In the third embodiment, the chamfered silicon substrate is the same as the conventional one.
After grinding and thinning No. 1, the outer peripheral part of the lower surface of the substrate is chemically etched.
L in the thickness direction_Four> 10 μm, L in radial direction_Five> 50μ
etching the silicon to form the etching surface 6,
The work strain layer 4 on the outer peripheral portion of the substrate 1 is removed. As a result, the substrate
There is no work strain layer in the outer peripheral portion of No. 1.

In the fourth embodiment shown in FIG. 6, instead of chemical etching, a polishing cloth 7 impregnated with an abrasive is applied, and the support base of the substrate 1 or the support of the polishing cloth 7 is used as the center of the substrate. Substrate 1 rotated around and shown shaded in FIG.
Width L ₆ outer peripheral portion is polished, the processing strain layer portion of the polishing surface 8 of
Remove> 50 μm. In both the fourth embodiment and the third embodiment, as in the second embodiment, it is not necessary to increase the chamfered dimension L ₁ of the chamfered portion 2 remaining on the substrate 1, and the effective area of the substrate is wide. .

[0009]

According to the present invention, when the back surface of a semiconductor substrate is ground in order to reduce the thermal resistance after the wafer process is finished, the grinding should intersect the chamfered portion or the outer peripheral portion of the ground surface. By chemically or mechanically removing the processed strained layer, the processed strained layer generated on the ground surface is exposed to the outer periphery of the substrate and its strength is reduced. it can.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part of a semiconductor substrate in a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view of an essential part of a semiconductor substrate at the end of a wafer process in a conventional semiconductor device manufacturing method.

3 is a sectional view of the semiconductor substrate of FIG. 2 after grinding.

FIG. 4 is a sectional view of an essential part of a semiconductor substrate in a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view of a main portion of a semiconductor substrate in a method of manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view of an essential part of a semiconductor substrate in a method of manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a plan view of the semiconductor substrate of the embodiment shown in FIG. 5 after polishing.

[Explanation of symbols]

 1 Silicon substrate 2 Chamfered part 3 Grinding surface 4 Processing strain layer 5 Substrate outer peripheral surface 6 Etching surface 7 Polishing cloth 8 Polishing surface

Claims (6)

[Claims] 1. A semiconductor device having a step of performing a wafer process on one surface side of a semiconductor substrate having a chamfered portion on an outer peripheral portion and then grinding the other surface side to obtain a semiconductor substrate having a predetermined thickness. In the manufacturing method, the chamfered portion is formed such that an end of the ground surface intersects with the chamfered surface. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the chamfered dimensions on both sides are the same. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the chamfered dimension on the side to be ground is larger than that on the other side. 4. A semiconductor device having a step of performing a wafer process on one surface side of a semiconductor substrate having a chamfered portion formed on an outer peripheral portion and then grinding the other surface side to obtain a semiconductor substrate having a predetermined thickness. A method of manufacturing a semiconductor device, comprising: after the grinding, removing the work strain layer on the outer peripheral portion of the ground surface. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the work strained layer is chemically removed. 6. The method of manufacturing a semiconductor device according to claim 4, wherein the work strained layer is mechanically removed.