JPH0626049B2 - Servo circuit in recording / reproducing apparatus - Google Patents

Description

The present invention relates to a recording / reproducing apparatus for recording and reproducing information on a tape by a rotating drum having a magnetic head such as a digital audio tape recorder. The present invention relates to an improvement of a servo circuit for controlling the rotation speed of a capstan shaft so that a head can be accurately traced and stable reproduction can be performed.

[Conventional technology]

A conventional servo circuit for controlling the rotation speed of the automatic capstan shaft will be described with reference to FIGS. 3 to 11.

Figure 3 shows a digital audio tape recorder (hereinafter D
In the block diagram showing the outline of DAT capable of variable speed reproduction, 1 is recorded on the tape T.
A rotary drum 2 having a magnetic head for A track 1a for reproducing information of A track in a frame and a magnetic head for B track 1b for reproducing information of B track, and 2 is a drum motor for driving the rotary drum 1 in engraving. 3 is a pulse generator that detects the rotational phase of the drum motor 2 to detect the rotational positions of the magnetic heads 1a and 1b. 4 is a frequency generator that detects the rotational frequency of the drum motor 2. 5 is the pulse generator. 3 and the output of the frequency generator 4 from the drum motor 2
A drum servo circuit for rotating the
6 is a capstan motor for rotating the capstan shaft, 7 is a frequency generator that detects the rotation frequency of the capstan motor 6, and 8 is the frequency from the frequency generator 7 that is reproduced at 1 × speed from the system controller 15 (steady-state). Reproduction), an even speed reproduction or an odd speed reproduction signal, and a frequency dividing circuit for dividing the frequency by a frequency dividing ratio according to a speed instruction signal. Reference numeral 9 denotes a frequency divided by the frequency dividing circuit 8 from the frequency generator 7. A frequency / voltage converter 10 for converting the voltage into a voltage according to the frequency is an addition for adding a tracking error signal from an automatic tracking circuit (hereinafter referred to as an ATF circuit) 14 described later and a signal from the frequency / voltage converter 9. And 11 is a drive for controlling the capstan motor 6 by the output from the adder 10 at a rotation speed corresponding to each of the multiple speeds. Reference numeral 12 is a head switching pulse generation circuit for outputting a pulse signal indicating which one of the magnetic heads 1a and 1b is transmitting the reproduction output by the output from the pulse generator 3. Reference numeral 13 is one of the magnetic heads 1a and 1b. A reproduction amplifier that amplifies the reproduction signal,
Reference numeral 14 is an AT for sending a tracking error signal and an ATF lock signal from the pulse signal from the head switching pulse generation circuit 12 and the RF signal from the reproduction amplifier 13.
The F circuit will be described in detail later. Reference numeral 15 denotes a system controller which outputs a 1x speed signal, an odd speed signal or an even speed signal to the ATF circuit 14 and a speed instruction signal to the frequency dividing circuit 8 based on the speed command selected by the operator.

Thus, the rotary drum 1 is controlled at a predetermined rotation speed via the drum servo circuit 5 by the detection outputs from the pulse generator 3 and the frequency generator 4.

On the other hand, since the running of the tape T is controlled by the capstan shaft, the signals reproduced by the magnetic heads 1a and 1b are input to the ATF circuit 14 via the reproduction amplifier 13. Further, since the head switching pulse generation circuit 12 outputs a signal indicating which of the magnetic heads 1a and 1b is reproducing by the signal detected by the pulse generator 3, the ATF circuit 14 detects the tracking deviation from the ATF signal. At this time, the ATF circuit 14 detects a tracking error signal based on the double speed signal input from the system controller 15. Further, the signal from the frequency generator 7 that detects the rotation frequency of the capstan motor 6 is divided by the frequency dividing circuit 8 at a frequency division ratio according to the speed instruction signal, and then the frequency / voltage converter 9
Is converted into a voltage signal by the adder 10, and the voltage signal and the tracking error signal are added by the adder 10,
The output controls the capstan motor 6 according to the double speed set via the drive circuit 11, and reproduction is performed under accurate tracking.

Next, details of the ATF circuit 14 of FIG. 3 will be described with reference to FIG.

Reference numeral 21 is a low-pass filter for extracting a pilot signal from the RF signal amplified by the regenerative amplifier 13 shown in FIG. 3, 22 is an envelope detector for detecting the envelope of the pilot signal from the low-pass filter 21,
23 is a time point when the first sampling pulse SP ₁ from the sampling pulse generating circuit 30 described later is input,
A first sample and hold circuit for holding the output from the envelope detector 22, and 24 is a value obtained by subtracting the output from the envelope detector 22 from the hold output from the first sample and hold circuit 23. , 25 is a subtracter for holding the output from the subtractor 24 at the time when the second sampling pulse SP ₂ from the AND circuit 31 described later is input, and the adder of FIG. It is a second sample and hold circuit that outputs a tracking error signal to the circuit 10.

26 is a bandpass filter for extracting a sync signal from the RF signal from the regenerative amplifier 13, 27 is a waveform shaping circuit for waveform shaping the sync signal from the bandpass filter 26, and 28 is a signal from the waveform shaping 27. An AND circuit to which a signal from a window signal generating circuit 34 described later is input, 29 is a sync signal f from the AND circuit 28 in the ATF format shown in FIG.
A sync pattern detection circuit for detecting either ₂ or f ₃ ,
Reference numeral 30 denotes a sync signal detected by the sync pattern detection circuit 29, and the first pulse signal P ₁ and the pulse signal P ₁
After a fixed time from the above, the pulse signal is sent to the second pulse signal P _2, and the pulse signals P ₁ and P ₂ become the sampling pulse signals SP ₁ and SP ₂ described above. That is, the pulse signal P ₁ becomes the first sampling pulse SP ₁ for the first sample and hold circuit 23 described above, and the pulse signal P ₂ becomes the _second sampling pulse SP ₁ via the AND circuit 31.
Sampling pulse S of the sample and hold circuit 25 of
It becomes P ₂ .

The AND circuit 31 outputs the output from the switch 32 which is switched by the 1 × speed signal from the system controller 15 shown in FIG. 3 and the second output from the pulse generating circuit 30.
Pulse signal P ₂ is input. In addition, switch 3
The switching state of 2 shows the case of the 1 × speed mode.

Reference numeral 33 denotes a reset signal generation circuit for transmitting a reset signal immediately before the window signal generation circuit 34, which will be described later, outputs the window signal in response to the head switching pulse from the head switching pulse generation circuit 12 shown in FIG.
A window signal generating circuit 34 generates a window signal in response to a head switching pulse from the head switching pulse generating circuit 12, and the window signal is output to the AND circuit 28. Reference numeral 35 denotes a sync wave number counter for counting the number of detection pulse waves generated by the sync pattern detection circuit 29, and the count value is reset for each reset signal from the reset signal generation circuit 33. Reference numeral 36 denotes a sync length determination circuit for determining whether the sync signal input from the sync band pass filter 26 is a 1 block signal or a 0.5 block signal based on the count value from the sync wave number counter 35, and determines a 1 block signal. To the frame simultaneous protection circuit 37,
Further, when it is determined that the signal is 0.5 block signal or more (including 1 block signal), the frame simultaneous protection circuit 37 and the AND circuit 3
The output is sent to 8 and. 37 is detected for a frame structure defined by a track pattern described later based on the 0.5 block signal from the sync length determining circuit 36, the 1 block signal and the head switching signal from the head switching pulse generating circuit 12. The frame simultaneous protection circuit which determines that the sync lengths match and controls the generation of the sample pulse at the 1 × speed, and the output thereof is supplied to the AND circuit 38 via the switch 32.

39 is the head switching pulse generation circuit 12 described above.
A pulse signal is transmitted only when the first ATF1 of each of the A track and the B track is transmitted.
TF1 signal generation circuit, 40 is the ATF1 signal generation circuit 3
9 and the pulse signal from the head switching pulse generation circuit 12, when the even speed signal is input from the system controller 15, only the first ATF1 of the A track is selected and output, and the system controller This is an area selection circuit that selects and outputs the first ATF 1 of each track when an odd-numbered speed signal is input from 15.

Reference numeral 41 is an ATF lock signal generation circuit composed of two comparators 41a and 41b for sending an ATF lock signal from the hold voltage from the second sample and hold circuit 25 and an AND circuit 41c.

Next, the track pattern recorded on the tape T shown in FIG. 5 will be described.

ATF1 and A on the front and back of each track
The TF2 has a low-frequency signal f ₁ with a small azimuth effect as a tracking pilot signal, which detects the level of crosstalk from both adjacent tracks at the time of reproduction and detects the crosstalk component of both adjacent tracks. It is used to obtain the level difference as a tracking error signal. A low-frequency signal of 130 KHz is used as the pilot signal f ₁ .

A sync signal for determining the position where the pilot signal f ₁ is recorded is recorded in ATF1 and ATF2. Since the on-track and the adjacent track cannot be distinguished from each other when the sync signal has crosstalk, a sync signal having a frequency having an azimuth effect and having a pattern not existing in the PCM signal is selected. Assuming that the head corresponding to + azimuth is 1a and the head corresponding to −azimuth is 1b, the sync signals are different from each other in order to distinguish the 1a head and the 1b head. A sync 1 signal f ₂ of 522 KHz and a sync 2 signal f ₃ of frequency 784 KHz are recorded at predetermined positions for the 1b head.

In the DAT, the erasing head is not provided, and the rewriting of the signal is performed by so-called overwriting in which overwriting is performed on the previous recording. Therefore, the erase signal f ₄ having a frequency of 1.56 MHz is recorded at a predetermined position for erasing the pilot signal f ₁ , sync 1 signal f ₂ and sync 2 signal f ₃ of the previous recording.

The positions of the ATF pilot signals are different on the on-track and on both adjacent tracks, and the levels of the on-track pilot signal and the levels of the pilot signals on both adjacent tracks are temporally different, and three types of levels are sampled respectively. Are arranged so that they can.

ATF1, the ATF region of ATF2 are respectively assigned five blocks, pilot signal _{f 1} is recorded in two blocks of them. The sync signals f ₂ and f ₃ are recorded using one block or 0.5 blocks from the center of the position where the pilot signal f ₁ is recorded on _one adjacent track. Pilot signal f of the other adjacent track
₁ is recorded so that the center of the sync signal recorded on the track is located two blocks after the beginning. The sync signal of 1 block is 0.5
The sync signal of the block is assigned to each even frame.

As described above, in the ATF, the sync signal frequency is different between the 1a head and the 1b head, and the sync signal recording length is different between the odd frame and the even frame. Therefore,
Different ATFs are given to all four consecutive tracks, so that they can be distinguished. ATF as described above
The pattern is a 4-track complete type, which is repeated every 4 tracks.

Next, in the case of performing the variable speed reproduction, the area selection circuit 40 selects the first ATF1 of the A track in the even speed reproduction, and A and B in the odd speed reproduction.
It will be explained with reference to FIGS. 6 to 8 whether the first ATF 1 of each of the trucks should be selected and the capstan motor 6 should be controlled accordingly.

FIG. 6 (a) shows heads 1a, 1b and 1 for 1 × speed reproduction.
A trace state of two tracks A and B forming a frame is shown, and hatched portions are ATF1 and ATF2.

As can be seen from the figure, the head 1a is the ATF of the track A.
1 and ATF2 signals are reproduced, and the head 1b is track B
The ATF1 and ATF2 signals are reproduced. Therefore, the reproduction signal level of the track A from the head 1a is shown in FIG. 6 (b).
As shown in FIG. 6, a high level reproduction signal is obtained, and the reproduction signal level of the track B from the head 1b is a high level reproduction signal as shown in FIG. 6 (c). Therefore, the rotation speed of the capstan motor 6 is controlled by the ATF1 and ATF2 of each track from the heads 1a and 1b, for a total of four ATFs.
The tracking error voltage obtained by

Further, FIG. 7 (a) shows the head 1a in the case of even speed reproduction,
1b shows a trace state of four tracks A and B of an even frame and an odd frame, and a hatched portion is AT.
F1 and ATF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the even-numbered frame tracks.
Since a part is missing, the reproduction signal level becomes as shown in FIG. 7 (b). Therefore, the high level reproduction signal is only the ATF1 of the track A in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b because a part of the ATF1 in the track B in the even frame track, a part of the ATF1 in the track B in the odd frame track and a track in the odd frame track. It becomes a part of ATF2 in B. Therefore, the reproduction signal level of the track B from the head 1b becomes a low level reproduction signal as a whole as shown in FIG. 7 (c). Therefore, as the ATF for controlling the rotation speed of the capstan motor 6 in the even speed reproduction,
This is performed by the tracking error voltage obtained by the ATF1 of the track A reproduced by the head 1a.

Further, FIG. 8 (a) shows the head 1 in the case of odd speed reproduction.
a, 1b and four tracks A and B of an even frame and an odd frame are shown.
TF1 and ATF2.

In this case, the ATF signal on the track A can be reproduced by the head 1a in the ATF1 and ATF2 on the track A in the corner frame track.
Since a part is missing, the reproduction signal level becomes as shown in FIG. 8 (b). Therefore, the high level reproduction signal is only the ATF1 of the A track in the even frame track. On the other hand, the ATF signal on the track B can be reproduced by the head 1b in the ATF1 and ATF2 on the track B in the odd-numbered frame tracks.
Part is missing, so the playback signal level is shown in Fig. 8 (c).
It becomes as shown in. Therefore, the high level reproduction signal is only the ATF1 of the B track in the odd frame track. Therefore, as the ATF for controlling the rotation speed of the capstan motor 6 in the odd speed reproduction, the ATF1 of the track A in the even frame track reproduced by the head 1a and the ATF1 of the track B in the odd frame track reproduced by the head 1b are used. The tracking error voltage obtained by

It should be noted that although the even-numbered speed reproduction in the above description is the 2x speed reproduction, the same applies to the 4x speed, 6x speed ... reproduction, and only one area is selected from the four ATF areas in one frame. It suffices to obtain the tracking error voltage by the ATF and apply the tracking servo to the capstan motor 6.

The same is true for odd-numbered speed reproduction,
7x speed ... At the time, A-track ATF1 and B-track ATF are selected from the four ATF areas in one frame.
1 A Track ATF2 and B Track ATF2
It suffices to select the two areas, and obtain the tracking error voltage by the ATF to apply the tracking servo to the capstan motor 6.

Next, the operation of the block diagram of FIG.
This will be described with reference to FIGS.

From the RF signal as shown in FIG. 11 (a) from the regenerative amplifier 13, the sync signal as shown in FIGS. 9 (a) and 10 (c) is passed through the bandpass filter 26 and the lowpass filter 21.
It is obtained by selecting a pilot signal as shown in FIG. This pilot signal is supplied to the envelope detector 22.
An envelope as shown in FIG. 9 (c) is detected by the detector, and the envelope signal is output to the first sample / hold circuit 23 and the subtractor 24 in the next stage.

On the other hand, the sync signal is processed by the waveform shaping circuit 27 in FIG. 10 (d).
After the waveform is shaped as described above, it is output to one input terminal of the AND circuit 28. Further, a window signal as shown in FIG. 10 (b) from a window signal generating circuit 34 for generating a window signal by a head switching signal from the head switching pulse generating circuit 12 is inputted to the other input terminal of the AND circuit 28. ing. Therefore, AND circuit 2
Reference numeral 8 outputs a sync signal whose waveform has been shaped when the window is open.

The sync signal from the AND circuit 28 is converted by the sync pattern detection circuit 29 into the sync signal A shown in FIG.
Detecting f ₂ or f ₃ on the TF track pattern, the first
A detection pulse as shown in FIG. 0 (e) is transmitted. Then, when this detection pulse is input to the pulse generation circuit 30, the pulse generation circuit 30 immediately outputs the _first pulse signal P ₁ as shown in FIG. )
As described above, the second pulse signal P ₂ is transmitted. The first pulse signal P ₁ is the sampling pulse S as shown in FIG. 9 (d).
Since it becomes P ₁ and is input to the first sample and hold circuit 23, the first sample and hold circuit 23
At this time, the level of the envelope output from the envelope detector 22 is held. Then, the difference between the held output and the output from the envelope detector 22 is calculated and output by the subtractor 24. The second pulse signal from the pulse generation circuit 30 is output to one input terminal of the AND circuit 31.

On the other hand, the detection pulse from the sync pattern detection circuit 29 is input to the sync wave number counter 35. Since the sync wave number counter 35 is cleared by the reset signal from the reset signal generating circuit 33 as shown in FIG. 10 (a) before the window signal is switched, the sync wave number is counted simultaneously with the input of the detection pulse. Since the count number of the detection pulse from the sync pattern detection circuit 29 is different between the 1-block signal and the 0.5-block signal, the sync length depends on the count value from the sync-wave counter 35. Judgment is made by the judgment circuit 36, and as shown in FIGS.
A signal of 5 blocks or more and a signal of 1 block are discriminated and both signals are output to the frame simultaneous protection circuit 37, and a signal of 0.5 block or more is output to one input terminal of the AND circuit 38.

On the other hand, from the signal from the head switching pulse generation circuit 12 as shown in FIG.
Thus, the pulse signal as shown in FIG. 11 (c) is transmitted at the timing synchronized with the ATF1 in each track A, B as shown in FIG. 11 (a). Then, in the area selection circuit 40, from the signal from the head switching pulse generation circuit 12 and the signal from the ATF1 signal generation circuit 39, in the case of even speed reproduction in the variable speed reproduction mode, an even speed signal is input from the system controller 15. Therefore, a signal as shown in FIG. 11 (d) (a signal synchronized with ATF1 of track A) is transmitted, and in the case of odd speed reproduction, the first signal is transmitted.
A signal as shown in FIG. 1 (e) (a signal synchronized with each ATF1 of tracks A and B) is transmitted and input to the other input end of the AND circuit 38.

At this time, in the variable speed reproduction mode, since the 1x speed signal is not input to the switch 32 from the system controller 15, the contact of the switch 32 is switched contrary to the illustration. Therefore, the sync signal is output from the AND circuit 38.
When the output of 0.5 block signal or more (including 1 block signal) is output from the sync length determination circuit 36 and the selected ATF1 signal is output from the area selection circuit 40, the switch 32 is used to switch the output of FIG. The gate signal as shown in j) is output to the AND circuit 31. Therefore, the AND circuit 31 outputs the second pulse signal P ₂ from the pulse generation circuit 30.
Is output, the sampling signal SP ₂ is output to the second sampling circuit 25. As a result, the second sampling circuit 25 holds the output signal as shown in FIG. 9 (g) from the subtractor 24 when the sampling signal SP ₂ is input. Then, the held output is sent to the adder 10 as a tracking error signal and also to the ATF lock signal generation circuit 41.

This ATF lock signal generation circuit 41 compares the output voltage from the second sample hold circuit 25 with each comparator 41.
a and 41b are compared with the reference comparison voltages Vref ₁ and Vref ₂ ,
If the output voltage from the sampling and holding circuit 25 is within the preset voltage range, the comparator 41
Since the outputs are sent from a and 41b, the AND circuit 41
An ATF lock signal is sent to the system controller 15 from c.

That is, as shown in FIG. 12, if the deviation amount of the heads 1a and 1b with respect to the tracks A and B is small, the reference comparison voltage Vr
ef _1, second sample-and-hold circuit in the range of Vref ₂ 2
Since the tracking error voltage from 5 enters, the system controller 15 can monitor that the ATF lock signal is transmitted and the tracking servo of the capstan motor 6 is operating normally.

[Problems to be solved by the invention]

By the way, in the above-mentioned conventional example, since the ATF lock signal generation circuit 41 compares the levels of the tracking error voltage from the second sample and hold circuit 25 in an analog manner, the overwritten tape is reproduced. In this case, the remaining pilot signal and the overwritten pilot signal interfere with each other and the tracking error voltage fluctuates greatly, which causes a problem that the ATF lock signal cannot be accurately generated. Since it is a circuit, it was difficult to incorporate it in a digital IC and it was difficult to make it into an IC.

[Object of the Invention]

The present invention is intended to solve the above-mentioned problems, and the number of sample pulses generated to obtain a tracking error voltage is counted for a certain period of time and compared with a predetermined threshold to increase the level of the tracking error voltage. An object of the present invention is to provide a servo circuit in a recording / reproducing apparatus that outputs an ATF lock signal stably even when it fluctuates and that can be easily converted into a digital IC.

[Outline of Invention]

In order to achieve the above-mentioned object, the present invention provides an AT
The gist is that the ATF lock signal is output stably even when the level of the tracking error voltage fluctuates greatly by counting the sampling pulses output from the F circuit and comparing them with a predetermined threshold value. is there.

Example of Invention

An embodiment of the present invention will be described with reference to the block diagram of FIG. The same reference numerals as those in FIG. 4 of the conventional example described above indicate the same circuits, and the description thereof is omitted.

The difference between the present invention and the conventional example is that the ATF lock signal generation circuits 41 and 42 are different. That is, the ATF lock signal generating circuit 41 in FIG. 4 processes the tracking error voltage from the second sample hold circuit 25 in an analog manner.
2 is to process digitally.

Therefore, in the embodiment of the present invention, the pulse generation circuit 42a which operates by the switching pulse from the head switching pulse generation circuit 12 and the even-times speed signal, odd-times speed signal, and 1-times speed signal from the system controller 15, respectively. sampling pulse counter 42c and the decoder 42 to count the decoder 42b which can switch the threshold depending on the more signals, the number of pulses of the sampling pulse SP ₂ of the aND circuit 31
The D-type flip-flop 42d is configured such that the output from b is input to the data terminal and the latch pulse from the pulse generating circuit 42a is input to the clock terminal.

Next, the operation will be described with reference to FIG.

A pulse generating circuit 42a is generated by a switching pulse signal as shown in FIG. 2 (b) generated for each frame of an RF signal as shown in FIG. 2 (a) reproduced by the heads 1a, 1b.
Since the reset pulse signal as shown in FIG. 2 (e) is sent from the sampling pulse counter 42c, the sampling pulse counter 42c is once reset. When such a sampling pulse SP ₂ of FIG. 2 the AND circuit 31 (c) is output, together with the sampling pulse counter 42c counts the sampling pulses, the result of such count value of the second view (f) It outputs to the decoder 42b. Since the decoder 42b is set by the output from the system controller 15 to the threshold value corresponding to the 1x speed signal, the even speed signal or the odd speed signal, the sampling pulse counter 42c.
When the count value exceeds the set threshold value, the output is sent to the data terminal of the D-type flip-flop 42d. On the other hand, the pulse generation circuit 42a sends a latch pulse as shown in FIG. 2 (d) which falls every four frames to the clock terminal of the D-type flip-flop 42d. Therefore, the D-type flip-flop 42d outputs the ATF lock signal.

Then, when the reset pulse is output from the pulse generation circuit 42a at regular intervals, the sampling pulse counter 42c starts counting the sampling pulse SP ₂ again. Hereinafter, although the above-mentioned operation is repeated, if the tracking shifts in the tracking operation, the sync signal detection rate (the generation rate of the sampling pulse S ₂ ) becomes small as shown in FIG. 13, and the sampling pulse SP ₂ is sampled. Since the count number of the pulse counter 42c becomes small, the threshold value set in the decoder 42b cannot be exceeded, so that the output from the decoder 42b becomes low level. Therefore, the ATF lock signal from the D flip-flop 42d disappears from the next cycle, and the ATF lock signal to the system controller 15 disappears.

〔The invention's effect〕

As described above, according to the present invention, the signal for monitoring the operation of the tracking servo circuit by the ATF is generated based on the detection state of the sync signal by counting the sampling pulses output from the ATF circuit. Therefore, even if the level of the tracking error voltage fluctuates greatly during playback of the overwritten tape, the operation of the tracking servo circuit can be stably monitored, and the signal for monitoring the operation of the tracking servo circuit is a sampling pulse. Can be created by a digital circuit by counting and comparing, and therefore, an effect such that an IC can be easily achieved can be obtained.

Further, according to the present invention, since the threshold value setting circuit for setting the threshold value according to the reproduction speed is provided and the threshold value to be the judgment reference is switched according to the reproduction speed, not only the normal 1 × speed reproduction but also the even speed Alternatively, the locked / unlocked state of the ATF servo can be reliably determined even during so-called variable speed reproduction of odd-numbered speeds.

[Brief description of drawings]

FIG. 1 is a block diagram of an ATF circuit showing an embodiment of the present invention, FIG. 2 is a timing chart diagram of the same, FIG. 3 is a block diagram showing the entire configuration, and FIG. 4 is a block of the ATF circuit of the same. FIG. 5, FIG. 5 is a diagram showing an ATF track pattern, FIG. 6 is a diagram showing an ATF detection state at 1 × speed reproduction, FIG. 7 is a diagram showing an ATF detection state at even speed reproduction, and FIG. 8 is an odd number. FIG. 9 to FIG. 11 are timing charts in the circuit of FIG. 4, FIG. 12 is a diagram showing a tracking error voltage with respect to a track deviation amount, and FIG. 13 is a track deviation. It is a figure which shows the sink detection rate with respect to amount. 6 ... Capstan motor, 12 ... Head switching pulse generation circuit, 13 is RF signal reproduction amplifier, 14 ...
… ATF circuit, 15… System controller, 42…
... ATF lock signal generation circuit, 42a ... pulse generation circuit, 42b ... decoder, 42c ... sampling counter, 42d ... D-type flip-flop.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masafumi Nakamura 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Home Appliances Research Laboratory, Hitachi, Ltd. (56) Reference JP-A-61-264544 (JP, A) JP-A-SHO 62-157359 (JP, A) JP-A-63-214946 (JP, A)

Claims (1)

[Claims] 1. A sync signal and a pilot signal are reproduced from an ATF signal, and a tracking error voltage is generated based on a crosstalk level difference between pilot signals of adjacent tracks based on a detection position of the sync signal. In a servo circuit in a recording / reproducing apparatus that performs tracking servo by a tracking error voltage, a counting circuit that counts the number of detection pulses of a sync signal during a certain period, a threshold setting circuit that sets a threshold value according to a reproduction speed, A servo circuit in a recording / reproducing apparatus, comprising: an operation state generation circuit that compares the number of detected pulses of a sync signal with the threshold value of the threshold value setting circuit and generates a signal indicating the operation state of the tracking servo.