JPH06258653A - Liquid crystal display - Google Patents

Abstract

(57) [Abstract] [Purpose] To reduce or eliminate the liquid crystal panel drive circuit board. [Structure] By using the tape automated bonding method (TAB), the output terminals (TTM) of a plurality of tape carrier packages (TPC) mounted with a liquid crystal driving LSI (CH1) are connected to a liquid crystal panel (PNL). In the mounted liquid crystal display device, the input terminals (TTB) of the adjacent tape carrier packages (TPC) are connected to each other to supply a required power source and signals to the liquid crystal driving LSI (CH).
Supply to 1). [Effect] A drive circuit board for mounting and wiring a liquid crystal drive LSI is not required, and the liquid crystal display device can be made thin and lightweight, and the cost can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device,
In particular, the present invention relates to an active matrix type liquid crystal display device using thin film transistors and the like.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device is provided with a non-linear element (switching element) corresponding to each of a plurality of pixel electrodes arranged in a matrix. Since the liquid crystal in each pixel is theoretically always driven (duty ratio 1.0), the active system has better contrast than the so-called simple matrix system, which employs the time-division driving system, and especially the color liquid crystal display device. Then it is becoming an indispensable technology. A typical example of the switching element is a thin film transistor (TFT).

FIG. 6 is an exploded perspective view showing each component of the liquid crystal display module MDL. In the figure, SHD is a frame-shaped shield case (metal frame) made of a metal plate, LC
W its display window, PNL is a liquid crystal display panel, SPB is a light diffusion plate, MFR is an intermediate frame, BL is a backlight, B
LS is a backlight support and LCA is a lower case, and the modules MDL are assembled by stacking the respective members in a vertical arrangement relationship as shown in the figure.

The module MDL is a shield case SH.
The whole is fixed by the claw CL and the hook FK provided on D. The intermediate frame MFR is formed in a frame shape so that an opening corresponding to the display window LCW is provided, and the frame portion has the shape and thickness of the liquid crystal display passivation PNL, the diffusion plate SPB, the backlight support BLS, and various circuit components. Corresponding unevenness and an opening for heat dissipation are provided.

The lower case LCA also serves as a reflector of backlight light, and a reflection mountain RM is formed corresponding to the fluorescent tube BL so as to reflect light efficiently. FIG. 7 is a top view showing a state in which a video signal drive circuit and a vertical scanning circuit are connected to the display panel PNL. CHI is the display panel P
Drive IC chips for driving the NL (three lower IC chips on the vertical scanning circuit side, and six left and right driver IC chips on the video signal driving circuit side).

The TCP is a tape carrier package in which a driving IC chip CHI is mounted by a tape automated bonding method (TAB) as described later with reference to FIGS. 8 and 9, and the PCB1 is the TCP or the capacitor CDS.
Etc. are mounted on the drive circuit board, which is divided into three. Further, FGP is a frame ground pad, and a spring-like fragment FG cut and provided in the shield case SHD is soldered. FC is the lower drive circuit board P
CB1 is a flat cable that electrically connects the left drive circuit board PCB1 and the lower drive circuit board PCB1 and the right drive circuit board PCB1. As the flat cable FC, as shown in the figure, a plurality of lead wires (phosphor bronze material plated with Sn) sandwiched between a striped polyethylene layer and a polyvinyl alcohol layer are used.

FIG. 8 is a diagram showing a sectional structure of a tape carrier package TCP in which an integrated circuit chip CHI which constitutes a scanning signal driving circuit or a video signal driving circuit is mounted on a flexible wiring board, and FIG. 9 shows it as a liquid crystal display panel. of,
In this example, it is a cross-sectional view of an essential part showing a state of being connected to a video signal circuit terminal DTM. In the figure, TTB is the input terminal / wiring part of the integrated circuit CHI, and TTM is the integrated circuit C.
HI output terminal / wiring part, made of Cu,
Bonding pads PAD of the integrated circuit CHI are connected to the inner end portions (commonly called inner leads) by a so-called face-down bonding method. Terminal T
Outer end portions (commonly called outer leads) of TB and TTM respectively correspond to the input and output of the semiconductor integrated circuit chip CHI, and are attached to the CRT / TFT conversion circuit / power supply circuit SUP by an anisotropic conductive film ACF by soldering or the like. It is connected to the liquid crystal display panel PNL. The package TCP is connected to the panel so that the tip of the package TCP covers the protective film PSV1 exposing the connection terminal DTM on the panel PNL side. Therefore, the external connection terminal DTM (GTM) is connected to the protective film PSV1.
Since it is covered with at least one of the package TCP, it is resistant to electric contact.

BF1 is a base film made of polyimide or the like, and SRS is a solder resist film for masking the solder so that it will not stick to an unnecessary place during soldering. The gap between the upper and lower glass substrates outside the seal pattern SL is protected by an epoxy resin EPX or the like after cleaning, and a silicone resin SIL is further filled between the package TCP and the upper substrate SUB2 for multiple protection.

An active matrix type liquid crystal display device using thin film transistors is disclosed in, for example, Japanese Patent Laid-Open No. 63-309921, Nikkei Electronics,
Pages 193-210 “12.5-inch active matrix color liquid crystal display with redundant configuration” (December 15, 1986)
Published by Nikkei McGraw-Hill Inc.).

[0010]

As described above, in the conventional liquid crystal display device, the liquid crystal panel PNL and the drive circuit board PCB1 are connected by the package TCP.
FIG. 10 is a (a) main part view in which the liquid crystal panel PNL and the drive circuit board PCB1 are connected by the package TCP, and (b) a partial view in which the main part is enlarged.

As shown in the figure, while connecting the output terminal TTM of the package TCP to the liquid crystal panel PNL,
The input terminals TTB are connected to the wiring pattern of the drive circuit board PCB1 to connect the packages TCP. Therefore, even if the thickness of the PNL portion is thinned, the thickness of the assembled liquid crystal module MDL is limited to the thickness that is the thickness of the drive circuit board PCB1.

When connecting the input and output terminals using the package TCP, the terminals of the package TCP and the terminals of the liquid crystal panel PNL, and the terminals of the package TCP and the terminals of the drive circuit board PCB1 are aligned. However, there is a problem in that the work becomes complicated because it is necessary to perform. An object of the present invention is to solve the above-mentioned problems of the prior art, to facilitate the connection work between the terminals of the liquid crystal panel PNL and the terminals of the package TCP, to reduce the thickness of the liquid crystal module, and to easily reduce the thickness of the liquid crystal module. To provide.

[0013]

In order to achieve the above object, the present invention provides an output terminal TT at a terminal of a liquid crystal panel PNL.
It is characterized in that the drive circuit board PCB1 is not required in the configuration in which the terminals (input terminals) of the adjacent package TCPs are connected while being overlapped with each other while connecting M.

That is, according to the present invention, the output terminals (TTM) of a plurality of tape carrier packages (TPC) mounted with the liquid crystal driving LSI (CH1) are mounted on the liquid crystal panel (by the tape automated bonding method (TAB)). In the liquid crystal display device mounted by connecting to PNL),
It is characterized in that the input terminals (TTB) of the adjacent tape carrier packages (TPC) are connected to each other to supply required power and signals to the liquid crystal driving LSI (CH1).

Not only the drive circuit board PCB1 but also
The drive circuit board PCB2 can be omitted by connecting it in the same manner.

[0016]

By connecting the input terminals (TTB) of the tape carrier package (TPC) to each other and supplying the required power and signals to the liquid crystal drive LSI (CH1), the drive circuit board PCB1 in the prior art is not required. Therefore, the liquid crystal display device can be made thin and lightweight, and the cost can be reduced.

[0017]

The invention, further objects of the invention and further features of the invention will be apparent from the following description with reference to the drawings. 1A and 1B are (a) an essential part view of a connecting portion between a package TPC and a liquid crystal panel for explaining one embodiment of a liquid crystal display device according to the present invention, and (b) an enlarged partial view of the essential part.

As shown in the figure, the output terminal TTM of the package TCP is connected to the terminal of the liquid crystal panel PNL, and the input terminal TTB of this package TCP is connected to the input terminal of the adjacent package TCP. .
Therefore, it is not necessary to use the conventional drive circuit board PCB1 for the connection between the input terminals TTB of the package TCP, or the drive circuit board PCB1 can be reduced, and the liquid crystal module MDL can be thinned and the components can be reduced. The number of points can be reduced, the work process can be simplified, and the cost can be reduced.

FIG. 2 is an exploded perspective view for explaining a main part of the liquid crystal panel PNL of one embodiment of the liquid crystal display device according to the present invention. This drawing is a configuration diagram in the case where a drive circuit board provided at the peripheral edge in the longitudinal direction of the liquid crystal panel PNL is omitted, and the liquid crystal panel PNL at the peripheral edge in the longitudinal direction of the liquid crystal panel PNL.
By connecting the connection terminals of the above-mentioned and the integrated circuit CHI for driving between the packages TCP1, the driving circuit board PCB1 described in the above-mentioned prior art can be eliminated.

In the same figure, it goes without saying that the drive circuit board PCB1 attached to one end of the liquid crystal panel in the lateral direction can be eliminated by connecting the drive circuit boards PCB2 to each other. FIG. 3 is a developed perspective view for explaining the entire structure of one embodiment of the liquid crystal display device according to the present invention, and the same reference numerals as those in FIG.

As shown in the figure, the liquid crystal module MD
As the liquid crystal panel PNL constituting L, the one having the structure shown in FIG. 2 is used. According to this embodiment, it is not necessary to use the conventional drive circuit board PCB1 for the connection between the input terminals TTB of the package TCP, or the drive circuit board PCB1 can be omitted, and the liquid crystal module MDL can be made thin. The number of parts can be reduced, the working process can be simplified, and the cost can be reduced.

A circuit portion of an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described below with reference to FIGS. In the drawings described below and each of the drawings described above, components having the same function are designated by the same reference numeral, and repeated description thereof will be omitted. FIG. 4 is a plan view showing one pixel and its periphery of an active matrix type color liquid crystal display device to which the present invention is applied.

As shown in the figure, each pixel has two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL.
And an adjacent two video signal lines (drain signal line or vertical signal line) DL are intersected with each other (in a region surrounded by four signal lines). Each pixel includes a thin film transistor TFT, a transparent pixel electrode ITO1 and a storage capacitor element Cadd. The scanning signal lines GL extend in the left-right direction in the figure, and a plurality of scanning signal lines GL are arranged in the vertical direction. Video signal line DL
Extend in the up-down direction and are arranged in the left-right direction.

The thin film transistor TFT has a gate electrode G
When a positive bias is applied to T, the channel resistance between the source and the drain decreases, and when the bias is zero, the channel resistance increases. A plurality of (two) thin film transistors TFT1 and TFT2 are redundantly provided in each pixel. Thin film transistor TFT1, TFT
Each of the two is substantially the same size (the channel length and the channel width are the same), and the gate electrode GT, the gate insulating film GI, the i type (intrinsic, intrinsic, and the conductivity type determining impurity are not doped) It has an i-type semiconductor layer AS made of crystalline silicon (Si), a pair of source electrodes SD1 and a drain electrode SD2. It should be understood that the source and drain are originally determined by the bias polarity between them, and the polarity is inverted during operation in the circuit of this liquid crystal display device, so it should be understood that the source and drain are switched during operation. However, in the following description, for convenience, one is fixed as the source and the other is fixed as the drain.

The gate electrode GT has a shape protruding vertically from the scanning signal line GL (branched into a T shape). The gate electrode GT is a thin film transistor TF
It projects so as to exceed the active regions of T1 and TFT2. The gate electrodes GT of the thin film transistors TFT1 and TFT2 are integrally formed (as a common gate electrode) and are formed continuously with the scanning signal line GL. In this example, the gate electrode GT is a single-layer second layer.
It is formed of a conductive film g2. An aluminum (Al) film formed by sputtering, for example, is used as the second conductive film g2, and an Al anodic oxide film AOF is provided thereon.

The gate electrode GT is formed to be larger than the i-type semiconductor layer AS (when viewed from below) so as to completely cover the i-type semiconductor layer AS, and is devised so that the i-type semiconductor layer AS is not exposed to external light or backlight light. . The scanning signal line GL is composed of the second conductive film g2. The second conductive film g2 of the scanning signal line GL is formed in the same manufacturing process as the second conductive film g2 of the gate electrode GT, and is integrally formed. Also, an Al anodic oxide film AOF is provided on the scanning signal line GL.

The insulating film GI is a thin film transistor TFT.
1. In the TFT 2, it is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT. The insulating film GI includes the gate electrode GT and the scanning signal line GL.
Is formed in the upper layer. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected.
With a thickness of 200 to 2700Å (in this embodiment, 2000
Å) formed. As shown in FIG. 7, the gate insulating film GI is formed so as to surround the entire matrix portion AR,
The peripheral portion is removed to expose the external connection terminals DTM and GTM. The insulating film GI also contributes to the electrical insulation between the scanning signal line GL and the video signal line DL.

In this example, the i-type semiconductor layer AS is formed so as to be an independent island in each of the thin film transistors TFT1 and TFT2.
It is formed to have a thickness of Å (in this embodiment, a film thickness of about 2000 Å). The layer d0 is a phosphorus (P) -doped N (+)-type amorphous silicon semiconductor layer for ohmic contact, the i-type semiconductor layer AS exists on the lower side, and the conductive layer d2 (d3) exists on the upper side. It is left only where you do.

The i-type semiconductor layer AS is also provided between both the intersections (crossover portions) of the scanning signal lines GL and the video signal lines DL. The i-type semiconductor layer AS at the intersection reduces the short circuit between the scanning signal line GL and the video signal line DL at the intersection. The transparent pixel electrode ITO1 constitutes one of the pixel electrodes of the liquid crystal display section. The transparent pixel electrode ITO1 is connected to both the source electrode SD1 of the thin film transistor TFT1 and the source electrode SD1 of the thin film transistor TFT2. Therefore, the thin film transistors TFT1 and TFT2
Even if a defect occurs in one of them, if the defect causes a side effect, cut an appropriate portion with laser light or the like, otherwise, if the other thin film transistor is operating normally, leave it as it is. good. Transparent pixel electrode ITO
1 is composed of the first conductive film d1.
The conductive film d1 is made of a transparent conductive film (Indium-Tin-Oxide ITO: Nesa film) formed by sputtering.
With a thickness of 00 to 2000 Å (in this embodiment, 1400 Å
Film thickness).

Each of the source electrode SD1 and the drain electrode SD2 is composed of a second conductive film d2 in contact with the N (+) type semiconductor layer d0 and a third conductive film d3 formed thereon. The second conductive film d2 is a chromium (Cr) film formed by sputtering and is formed to a thickness of 500 to 1000Å (in this embodiment, about 600Å). If the Cr film is formed thicker, the stress increases.
It is formed within a range not exceeding the film thickness of 0Å. Cr film is N
It is used for the purpose of improving adhesion to the (+) type semiconductor layer d0 and preventing Al of the third conductive film d3 from diffusing into the N (+) type semiconductor layer d0 (so-called barrier layer). Second
As the conductive film d2, in addition to the Cr film, refractory metal (Mo, T
i, Ta, W) film, refractory metal silicide (MoSi)
, TiSi 2, TaSi 2, WSi 3) films may be used.

The third conductive film d3 is formed by sputtering Al to a thickness of 3000 to 5000Å (400 in this embodiment).
0 Å) formed. The Al film has less stress than the Cr film and can be formed to have a large film thickness, and the source electrode SD1, the drain electrode SD2 and the video signal line DL can be formed.
Of the gate electrode GT and the i-type semiconductor layer AS are ensured (step coverage is improved).

After patterning the second conductive film d2 and the third conductive film d3 with the same mask pattern, an N (+) type film is formed by using the same mask or by using the second conductive film d2 and the third conductive film d3 as masks. The semiconductor layer d0 is removed. That is,
The N (+) type semiconductor layer d0 remaining on the i type semiconductor layer AS
The portions other than the second conductive film d2 and the third conductive film d3 are removed by self-alignment. At this time, the N (+) type semiconductor layer d
Since 0 is etched so that the entire thickness thereof is removed, the surface portion of the i-type semiconductor layer AS is also slightly etched, but the degree may be controlled by the etching time.

The video signal line DL has a second conductive film d2 and a third conductive film d2 in the same layer as the source electrode SD1 and the drain electrode SD2.
It is composed of three. A protective film PSV1 is provided on the thin film transistor TFT and the transparent pixel electrode ITO1. The protective film PSV1 is mainly formed to protect the thin film transistor TFT from moisture and the like, and a film having high transparency and good moisture resistance is used. Protective film PSV1
Is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and has a film thickness of about 1 μm.

The protective film PSV1 is formed so as to surround the entire matrix portion AR, and the peripheral portion has external connection terminals DTM,
Removed to expose GTM. Protective film PSV1
Regarding the thickness relationship between the gate insulating film GI and the gate insulating film GI, the former is made thicker in consideration of the protection effect, and the latter is made thin in the transconductance gm of the transistor. Upper transparent glass substrate SUB
On the second side, external light or backlight is exposed to the i-type semiconductor layer A.
A light shielding film BM is provided so as not to enter S. Figure 4
The closed polygonal contour line of the light-shielding film BM shown in (3) indicates an opening inside which the light-shielding film BM is not formed. The light-shielding film BM is formed of, for example, an aluminum film or a chromium film having a high light-shielding property, and in this embodiment, the chromium film is formed by sputtering to a thickness of about 1300Å.

Therefore, the thin film transistors TFT1 and TF
The i-type semiconductor layer AS of T2 is sandwiched by the upper and lower light-shielding films BM and the large gate electrode GT,
External natural light or backlight does not hit. The light-shielding film BM is formed in a lattice shape around each pixel (so-called black matrix), and the effective display area of one pixel is partitioned by this lattice. Therefore, the outline of each pixel is the light-shielding film BM.
Improves clarity and contrast. That is, the light blocking film BM has two functions of blocking the i-type semiconductor layer AS and serving as a black matrix.

Since the edge portion of the transparent pixel electrode ITO1 on the base side in the rubbing direction (the lower right portion in FIG. 2) is also shielded by the light shielding film BM, even if a domain occurs in the above portion, the domain cannot be seen. The display characteristics do not deteriorate. The light-shielding film BM is also formed in a frame shape in the peripheral portion, and its pattern has a plurality of openings in a dot shape.
It is formed continuously with the pattern of the matrix portion shown in FIG.

On the other hand, the light-shielding film BM is kept inside by about 0.3 to 1.0 mm from the edge of the substrate SUB2.
It is formed so as to avoid the cutting region of UB2. The color filter FIL is formed in a stripe shape by repeating red, green, and blue at a position facing the pixel. Color filter FIL
Is formed so as to cover all of the transparent pixel electrode ITO1, and the light-shielding film BM is formed inside the peripheral portion of the transparent pixel electrode ITO1 so as to overlap the edge portions of the color filter FIL and the transparent pixel electrode ITO1.

The color filter FIL can be formed as follows. First, a dyeing base material such as an acrylic resin is formed on the surface of the upper transparent glass substrate SUB2, and the dyeing base material other than the red filter forming region is removed by a photolithography technique. After that, the dyed substrate is dyed with a red dye and a fixing process is performed to form a red filter R. Next, the green filter G and the blue filter B are sequentially formed by performing the same process.

The protective film PSV2 is provided to prevent the dye of the color filter FIL from leaking to the liquid crystal LC. The protective film PSV2 is formed of a transparent resin material such as acrylic resin or epoxy resin. The common transparent pixel electrode ITO2 faces the transparent pixel electrode ITO1 provided for each pixel on the lower transparent glass substrate SUB1 side,
The optical state of the liquid crystal LC changes in response to a potential difference (electric field) between each pixel electrode ITO1 and the common transparent pixel electrode ITO2. A common voltage Vcom is applied to the common transparent pixel electrode ITO2. In the present embodiment, the common voltage Vcom is set to an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the video signal line DL, but it is used in the video signal drive circuit. When it is desired to reduce the power supply voltage of the circuit to about half, an AC voltage may be applied.

The transparent pixel electrode ITO1 is formed so as to overlap the adjacent scanning signal line GL at the end opposite to the end connected to the thin film transistor TFT. In this superposition, the transparent pixel electrode ITO1 is connected to one electrode P
A storage capacitance element (electrostatic capacitance element) Cadd having L2 and the adjacent scanning signal line GL as the other electrode PL1 is configured.
The dielectric film of the storage capacitor element Cadd is composed of an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodized film AOF.

The storage capacitor element Cadd is formed in a portion where the width of the second conductive film g2 of the scanning signal line GL is widened. The second conductive film g2 at the portion intersecting the video signal line DL is thinned in order to reduce the probability of short circuit with the video signal line DL. Even if the transparent pixel electrode ITO1 is broken at the step portion of the electrode PL1 of the storage capacitor Cadd, the defect is caused by the island region formed by the second conductive film d2 and the third conductive film d3 formed so as to cross the step. Is compensated.

FIG. 5 is a connection diagram of an equivalent circuit of the display matrix section and its peripheral circuits, and AR is a matrix array in which a plurality of pixels are arranged two-dimensionally. In the figure, X means a video signal line DL, and subscripts G, B and R are added corresponding to green, blue and red pixels, respectively. Y means the scanning signal line GL, and the subscripts 1, 2, 3, ..., End
Are added according to the order of scanning timing.

The video signal lines X (subscripts omitted) are alternately connected to the upper (or odd) video signal drive circuit He and the lower (or even) video signal drive circuit Ho. The scanning signal line Y (subscript omitted) is connected to the vertical scanning circuit V.
SUP is a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source and information for a CRT (cathode ray tube) from a host (upper processing unit) and information for a TFT liquid crystal display device. It is a circuit including a circuit to be replaced.

The storage capacitor element Cadd functions to reduce the influence of the gate potential change ΔVg on the midpoint potential (pixel electrode potential) Vlc when the thin film transistor TFT switches. This situation is expressed by the following equation. ΔVlc = {Cgs / (Cgs + Cadd + Cpix)} × ΔVg where Cgs is the gate electrode G of the thin film transistor TFT
Parasitic capacitance formed between T and source electrode SD1, C
pix is a capacitance formed between the transparent pixel electrode ITO1 (PIX) and the common transparent pixel electrode ITO2 (COM), ΔV
lc represents a change amount of the pixel electrode potential due to ΔVg. This variation ΔVlc causes a direct current component applied to the liquid crystal LC, but the value can be reduced as the holding capacitance Cadd is increased. Further, the storage capacitor element Cadd also has the function of prolonging the discharge time, and thus the thin film transistor TFT
Accumulates video information for a long time after is turned off. The reduction of the direct current component applied to the liquid crystal LC improves the life of the liquid crystal LC,
It is possible to reduce so-called burn-in in which the previous image remains when the liquid crystal display screen is switched.

As described above, since the gate electrode GT is made large so as to completely cover the i-type semiconductor layer AS, the overlap area with the source electrode SD1 and the drain electrode SD2 is increased, and thus the parasitic capacitance Cgs is increased. The reverse effect is that the midpoint potential Vlc is easily affected by the gate (scanning) signal Vg. However, this demerit can be eliminated by providing the storage capacitor element Cadd.

The holding capacitance of the holding capacitance element Cadd is 4 to 8 times (4.C
pix <Cadd <8 · Cpix), 8 to 3 for parasitic capacitance Cgs
Set to a value about twice (8 · Cgs <Cadd <32 · Cgs). The first-stage scanning signal line GL (Y) used only as the storage capacitor electrode line is the common transparent pixel electrode ITO2 (Vcom).
To the same potential as. In the example of FIG. 7, the scanning signal line at the first stage is short-circuited to the common electrode COM through the terminal GT0, the lead wire INT, the terminal DT0 and the external wiring. Alternatively, the first-stage storage capacitor electrode line Y is connected to the final-stage scanning signal line Yend, and V
It may be connected to a DC potential point (AC ground point) other than com, or may be connected to receive one extra scanning pulse Y from the vertical scanning circuit V.

[0047]

As described above, according to the present invention,
Input terminal (TT) of tape carrier package (TPC)
B) By connecting each other and supplying a required power source and a signal to the liquid crystal driving LSI (CH1), the driving circuit board PCB1 in the prior art described above is unnecessary,
The liquid crystal display device can be made thin and lightweight, and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a (a) main part view of a connection part between a package TPC and a liquid crystal panel for explaining one embodiment of a liquid crystal display device according to the present invention, and (b) a partial enlarged view of the main part.

FIG. 2 is an exploded perspective view illustrating a main part of a liquid crystal panel PNL of one embodiment of a liquid crystal display device according to the present invention.

FIG. 3 is a developed perspective view illustrating the entire configuration of one embodiment of the liquid crystal display device according to the present invention.

FIG. 4 is a plan view showing one pixel and its periphery of an active matrix type color liquid crystal display device to which the present invention is applied.

FIG. 5 is a connection diagram of an equivalent circuit of the display matrix portion and its peripheral circuit, and AR is a matrix array in which a plurality of pixels are arranged two-dimensionally.

FIG. 6 is an exploded perspective view showing each component of the liquid crystal display module MDL.

FIG. 7 is a top view showing a state in which a video signal drive circuit and a vertical scanning circuit are connected to the display panel PNL.

FIG. 8 is a diagram showing a cross-sectional structure of a tape carrier package TCP in which an integrated circuit chip CHI forming a scanning signal driving circuit or a video signal driving circuit is mounted on a flexible wiring board.

FIG. 9 is a cross-sectional view of essential parts showing a state in which the tape carrier package TCP is connected to a liquid crystal display panel, in this example, a video signal circuit terminal DTM.

10A and 10B are (a) an essential part view in which a liquid crystal panel PNL and a drive circuit board PCB1 are connected by a package TCP, and (b) an enlarged partial view of the essential part.

[Explanation of symbols]

 PNL liquid crystal panel CH1 drive IC TTB input terminal TTM output terminal SUB transparent glass substrate GL scanning signal line DL video signal line GI insulating film GT gate electrode AS i-type semiconductor layer SD source or drain electrode PSV protective film BM light-shielding film LC liquid crystal TFT Thin film transistor ITO Transparent pixel electrode g, d Conductive film Cadd Storage capacitor element AOF Anodic oxide film AO Anodizing mask GTM Gate terminal DTM Drain terminal SHD Shield case PNL Liquid crystal display panel SPB Light diffusion plate, MFR Intermediate frame BL backlight BLS Backlight support body,

Claims (1)

[Claims] 1. A liquid crystal display device in which output terminals of a plurality of tape carrier packages each having a liquid crystal driving LSI mounted thereon are connected to a liquid crystal panel and mounted by a tape automated bonding method. The input terminals are connected to each other to supply the required power and signals to the liquid crystal driving LSI.
A liquid crystal display device characterized by being supplied to.