JPH06242862A - Battery drop informing device - Google Patents

Abstract

(57) [Abstract] [Purpose] Recognize the low battery of the power supply battery from the delayed state of the clock without the need for a hard circuit. [Structure] This POS system has a master device M having a reference timepiece function and slave devices S1, S2 ... Having a battery-powered timepiece function. Each slave device S1
... compares the timekeeping information obtained by the reference timepiece function with the timekeeping function obtained by the battery-powered timepiece function to obtain the time difference. When the time difference thus obtained exceeds the preset time difference, each slave device S1 ...

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION This invention is based on the POS (point
Low battery notification device for systems of sale, etc.

[0002]

2. Description of the Related Art Conventionally, in an electronic cash register (ECR) which constitutes a POS system, AC is usually used.
Although it is driven by a power source, when the AC power source is turned off, the power source is switched to the backup secondary battery, and the power source voltage is supplied to the volatile memory, the clock function, and the like. Here, the deterioration of the secondary battery for backup and the recognition of the voltage drop are performed by a battery drop detection circuit which is hardware.

[0003]

However, recognizing the voltage drop by the hard circuit has the drawbacks of high cost and poor versatility. An object of the present invention is to make it possible to recognize a low battery of a power supply battery from a time delay state of a clock without requiring a hard circuit.

[0004]

The means of the present invention are as follows. Data transmission / reception between an electronic device such as a master device having a reference clock function for measuring a reference time and an electronic device such as a slave device having a battery-powered clock function that is driven by a battery for at least a predetermined period. In the data transmitting / receiving system for performing the time difference calculation, the time difference calculating means 1 (see the functional block diagram of FIG. 1, the same applies hereinafter) uses the timekeeping information obtained by the reference timepiece function and the timekeeping information obtained by the battery-powered timepiece function. To obtain the time difference. The discriminating means 2 discriminates whether or not the time difference calculated by the time difference calculating means 1 exceeds a preset time difference limit.
When the determination means 2 determines that the time limit difference is exceeded, the notification means 3 notifies that effect.

[0005]

The operation of the means of the present invention is as follows. Now, for example, in a POS system in which a plurality of slave devices are connected to a master device, the time difference calculation means 1 obtains the timekeeping information obtained by the reference clock function and the battery-powered clock function at regular time intervals, for example. The time difference is calculated by comparing the time information thus obtained. Then, the determination means 2 determines whether or not the calculated time difference exceeds the preset time difference. When it is determined that the time limit difference has been exceeded, the notification means 3 gives a notification to that effect. Therefore, it is possible to recognize the low battery of the power supply battery from the delayed state of the clock without requiring a hard circuit.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment will be described below with reference to FIGS. FIG. 2 is a system configuration diagram showing a POS system. This POS system has a configuration having a plurality of ECRs, one of which functions as a master device and the other ECRs function as slave devices, and the master device M and each slave device S1
S2, S3, and S4 are connected to each other via a private line. Here, the master device M and the slave devices S1, S2, ... Are basically configured in the same manner, but the master device M is provided with a high precision timepiece BT. Is usually driven by an AC power source, and is driven by a backup battery (not shown) in case of power failure.

FIG. 3 is a block diagram showing the configuration of each slave device S1 .... The CPU 11 controls the overall operation of this ECR according to various programs in the ROM 12, and an operating clock is supplied from the oscillator 13. The CPU 11 is connected to an input unit 14, a display unit 15, a printing unit 16, a drawer 17, a transmission control unit 18, and a clock device 19 as peripheral devices.
1 controls their input / output operations.

The input unit 14 has a numeric keypad AK, a function key BK, a MAC (memory all clear) key CK, and a mode switch MS, which are usually provided, and the mode switch MS is "P (set)" according to its switching position. ",
“REG”, “OFF”, “X”
(Inspection) ”and“ Z (settlement) ”modes are switched.
Here, in the registration mode, the sales data input from the input unit 14 is taken into the CPU 11 via the input control unit 20, and then given to the display drive unit 21 and the print control unit 22 and displayed and output from the display unit 15. Alternatively, it is printed out from the printing unit 16 and further registered in various totalizers (not shown) in the RAM 23.

The timepiece device 19 is operated by the AC power source when the AC power source is on, and is operated by the backup battery (secondary battery) 24 when the AC power source is off. Similarly to the RAM 23, the battery voltage is supplied from the backup battery 24 when the AC power is off. The RAM 23 is, in addition to various totalizers, a time difference memory 23 as a memory unique to this embodiment.
-1, and has a limit delay number memory 23-2. The limit time difference memory 23-1 stores the limit value of the time difference between the reference time (correct time) transmitted from the master device M and the time obtained by the own clock device 19,
If there is a time difference larger than this limit time difference, the time delay of the timepiece device 19 is considered to be due to the voltage drop of the backup battery 24. The limit delay number memory 23-2 stores the limit value of the number of times that the time difference between the time obtained by the own timepiece device 19 and the reference time transmitted from the master device M becomes larger than the limit time difference. It is an integer set arbitrarily.

Next, the operation of this embodiment will be described. FIG. 4 is a flow chart showing the operation of each slave device S1 ..., The master device M is the reference timepiece device BT at regular time intervals.
The accurate time (reference time) obtained in
Send to 1 ... Now, when the slave device receives the reference time transmitted from the master device M (step A1), this reference time and its own clock device 19 are received.
The time obtained by the above is compared (step A2), and if there is a time difference between them, the time is automatically adjusted by setting an accurate time in the timepiece device 19 (step A3).

Next, in step A4, "conditional expression 1"
Check the existence of. Here, "conditional expression 1" is: | exact time from master device M-timed time obtained by self-timer device 19 >> limit time difference memory 23-1
If the time difference between the accurate time and the self-timed time is larger than the set value of the limit time difference memory 23-1, the process proceeds to step A5 and the delay number counter (not shown) The counter value is updated by adding "1" to the value of "1", but if the time difference is less than or equal to the limit time difference, the delay counter is cleared (step A8). Therefore, the delay counter counts the number of times exceeding the time difference limit.

If the time difference is exceeded, the delay counter is updated as described above, and then it is checked whether "conditional expression 2" is satisfied (step A6). Here, “conditional expression 2” is: delay number counter ≧ limit delay number, and the delay number counter is the limit delay number memory 23-
If it becomes larger than the set value of 2, proceed to step A7,
Error notification is given. In this way, when the time difference is continuously exceeded several times, it means that the backup battery 24 has deteriorated or the AC power supply has been on for a short period of time.
This is the case when the operating time of R is short and the charge amount is small. In such a case, while notifying the display unit 15 of an error, the delay count value is converted into a voltage drop value, subtracted from the full voltage value of the backup battery 24, and displayed as the current voltage (see FIG. 2).

Next, step A7 or step A8
Then, the process proceeds to step A9 to check whether or not the process is executed. If the execution of an arbitrary process is instructed, the process proceeds to step A10, and the process according to the type is executed. If the execution of the process is not instructed, the process proceeds to step A11, and the accurate time is transmitted from the master device M. It is checked whether or not a fixed time has passed since the reception of. Now, when the passage of a certain time is detected, the process returns to step A1 and the above-described operation is repeated.

FIG. 5 is a flow chart showing the operation at the time of initial setting in each slave device S1 .... That is,
Since the accuracy of the clock device 19 and the backup battery 24 vary in each slave device S1, the limit time difference set in the limit time difference memory 23-1 of itself is operated by the operation of the MAC key CK at the time of initial setting. I am trying to set it automatically. First, when the MAC key CK is operated, normal MAC processing is performed and various memory contents are cleared (step B1).

Next, the master device M is requested to obtain a clock count value for a predetermined time (step B2). Now, when the master device M counts 1000 pulses for one second, "1000 pulses" is requested as a clock count value, and the process proceeds to step B2 until it is detected that this count value data is received in step B3. Return and continue requesting clock counts. Here, when the clock count value is received, the process proceeds to step B4, and the number of clocks is counted until a predetermined time has elapsed (step B5). As a result, for example,
It is assumed that the master device M measures 1000 pulses per second, whereas its own slave device measures 950 pulses per second. Master device M obtained by this
The limit time difference is calculated based on the clock count value "1000 pulses" of the above and the clock count value "950" of its own slave device (step B6). In this case, 1000 pulse-950 pulse / 1.0 second × predetermined time is calculated, and the time difference is calculated from this value and set in the limit time difference memory 23-1 (step B7). As described above, in this embodiment, the voltage drop of the backup battery 24 can be determined from the delay of the timepiece device 19 of its own with respect to the reference time.

In the above embodiment, the calculation of the time difference from the reference time and the comparison with the limit time difference are performed in each slave device, but may be performed in the master device.

[0017]

According to the present invention, since it is possible to recognize a low battery of the power supply battery from the time delay state of the clock without requiring a hard circuit, it is extremely advantageous in terms of cost and excellent in versatility. Will be things.

[Brief description of drawings]

FIG. 1 is a functional block diagram of the present invention.

FIG. 2 is a system configuration diagram showing a POS system according to an embodiment.

FIG. 3 is a block configuration diagram showing a configuration of a slave device.

FIG. 4 is a flowchart showing the operation of a slave device.

FIG. 5 is a flowchart showing an operation during MAC processing in the slave device.

[Explanation of symbols]

 11 CPU 12 ROM 15 Display Unit 18 Transmission Control Unit 19 Clock Device M Master Device S1, S2, S3 Slave Device BT Reference Clock Device

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Claims (1)

[Claims] 1. Data for transmitting and receiving data between an electronic device having a reference clock function for measuring a reference time and an electronic device having a battery-driven clock function driven by a battery for at least a predetermined period. In the transmission / reception system, time difference calculation means for comparing the time information obtained by the reference clock function with time information obtained by the battery-operated timepiece function to obtain the time difference, and the time difference calculated by the time difference calculation means. A judgment means for judging whether or not the time limit exceeds a preset time difference, and a notification means for notifying the fact that the time difference has been exceeded by the judgment means. A low battery notification device featuring.