JPH06216096A - Semiconductor device, manufacture thereof, polishing method, polishing apparatus and recovering method of polished surface of the same apparatus - Google Patents

Abstract

PURPOSE:To accurately control the polishing amount of a material to be polished by using polishing agent to be used in a polishing flattening step of a semiconductor device in which a ratio of elements except a main ingredient is a specific value or less. CONSTITUTION:An end of a polishing agent supply tube 503 is disposed at a center of a polishing cloth 504 on a turntable 502. The turntable 502 is rotated at 100rpm around an axis passing a center, and polishing agent is supplied from the end on the cloth 504. The agent in which a ratio of elements except the main ingredient is substantially 100ppm or less is used. The agent is obtained by suspending powder containing cerium oxide formed by pulverizing bastnasite and burning it, a mean particle size of 1.2mum and a maximum particle size of 4.0mum. Its composition contains 50wt.% of the cerium oxide and about 37wt.% of oxide of other rare earth metal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, a method for manufacturing the same, a polishing method, a polishing apparatus and a method for reclaiming a polished surface of the polishing apparatus.

[0002]

2. Description of the Related Art Conventionally, colloidal silica has been generally used as an abrasive in a polishing process for flattening an insulating film in a semiconductor device manufacturing process.

The silica particles of colloidal silica are usually those obtained by using sodium silicate as a raw material and growing this into silica particles of several tens nm in an aqueous solution.

When it is used as an abrasive, it is usually suspended in water, and KOH or NaOH is used for the two purposes of adjusting the hydrogen ion concentration for evenly dispersing silica particles and increasing the polishing rate. Has been added.

[0005] For example, as such an abrasive, the Fujimi Abrasive Industry Co., Ltd. (Fujimi Corporation)
There is a product called compol-80 of n). When a silicon oxide film or the like is polished with an abrasive containing an alkali metal in this way, the alkali metal in the abrasive will cause the silicon oxide film or the semiconductor element There is a problem that the reliability of the semiconductor device is remarkably deteriorated by diffusing into the semiconductor device and changing the threshold voltage of the MOS device.

Therefore, prior to the polishing step, it is necessary to take precautionary measures such as forming a protective film in advance under the film to be polished to prevent the diffusion of impurities into the semiconductor element, which complicates the semiconductor process. It was

A conventional manufacturing method will be described below with reference to sectional views of a semiconductor device in each manufacturing process.

In FIG. 1A, 1 is a substrate of a semiconductor device and 2 is a fine pattern such as electrodes.

To form a protective film on a fine pattern, as shown in FIG. 1B, first, the protective film 3 is formed on the entire surface of the semiconductor device.
Is formed, then the resist 4 is applied thereon, and the resist 4 is patterned by the lithography method.

Further, when the protective film is selectively removed by using the resist as a mask and the resist is peeled off, the protective film is patterned as shown in FIG. 1 (c).

When the insulating film 5 is formed as shown in FIG. 1D, and then the surface is polished and flattened by a polishing method, the flat surface shown in FIG. 1E is obtained.

However, the steps of FIGS. 1 (a), 1 (b) and 1 (c) are additionally required for forming the protective film, and the process is complicated.

As another colloidal silica-based abrasive,
Silica particles were grown by thermal decomposition of tetrachlorosilicic acid or hydrolysis of organic silane, and the hydrogen ion concentration was adjusted with ammonia or amine. Although there are polishing agents that do not contain alkali metals, such polishing agents have a problem that the polishing rate for a silicon oxide film or the like is extremely slow and that they cannot be used for polishing a silicon oxide film or the like.

Conventionally, in the surface polishing of glass for photomasks, the glass surface is polished with aluminum oxide suspension as the primary polishing, and the suspension containing cerium oxide particles having an average particle diameter of several μm is used as the final polishing. The method of polishing is adopted.

However, usually, in the manufacturing process of a semiconductor device, the amount of polishing of the insulating film is at most about several μm, and such polishing in two or more stages is not preferable.

Further, in a semiconductor device manufacturing process, an insulating film is usually coated on the surface of a substrate on which a step layer (conductive layer) having a thickness of several hundreds to several thousands nm is formed.

At this time, the step shape in the step layer is reflected on the surface shape of the insulating film.

Further, the surface step of the insulating film must be flattened by polishing. However, in reality, with cerium oxide particles having an average particle size of several μm, a step of several hundred nm to several thousand nm is flattened. Whether it can be polished, whether it can be polished without causing scratches on the surface of the insulating film, and whether there is alkali metal contamination on the insulating film as when colloidal silica is used. Is not known at all, and no consideration has been given to applying the above method for polishing photomask glass to a polishing step in the manufacturing process of a semiconductor device.

As described above, in the conventional semiconductor device manufacturing process and the like, the conventional polishing process using colloidal silica as the polishing agent has problems such as contamination with alkali metal and a slow polishing rate.

In addition, there is a method of using a suspension containing cerium oxide particles in the surface polishing of the glass for a mophoto mask, but there is no scratch on the surface of the insulating film, and it is from several hundred nm to several thousand nm. It is not known at all whether or not polishing can be performed while flattening the steps of the above, and whether or not there is alkali metal contamination, and it is completely impossible to apply the above method to the polishing process in the manufacturing process of semiconductor devices. Was not considered.

A conventional typical flattening technique by polishing will be described with reference to process sectional views of FIGS. 2A to 2C. First, as shown in FIG. An SiO ₂ film 12 is formed on the SiO ₂ film 11, and then a metal wiring 13 having a thickness of 1.1 μm is formed on the SiO ₂ film 12.

Next, as shown in FIG. 2 (b), Si is formed on the entire surface.
The O ₂ film 14 is deposited. At this time, irregularities are formed on the surface of the SiO ₂ film 14 corresponding to the pattern of the metal wiring 13.
Next, the surface of the SiO ₂ film 14 is polished to remove the SiO ₂ film 14
To remove the irregularities on the surface. The SiO ₂ film 14 is polished by using the polishing apparatus shown in FIG.

That is, the Si substrate 1 configured as shown in FIG. 2B is set on the holder 501, and the Si substrate 1 is set.
Is rotated on the turntable 502. An abrasive supply pipe 503 is provided on the turntable 502, so that the abrasive 505 can be continuously supplied during polishing.

A non-woven cloth for polishing, that is, a polishing cloth 504 is provided between the polishing surface of the Si substrate 1 and the turntable 502. The polishing cloth 504 and the particles of the polishing agent are used to remove the surface of the substrate. The unevenness is scraped.

In this case, the load 501 is 40 k
The load of fg is applied and it is rotating at a speed of 100 rpm. The turntable 100 is 100 rp
It is rotating at a speed of m.

However, in this type of method, as shown in FIG.
As shown in (c), the original irregularities on the surface of the SiO ₂ film 14 are alleviated, but the SiO ₂ film 1 between the metal wirings 43 is removed.
4 is slightly depressed, so-called dishing occurs.

FIG. 4 shows the result of detailed examination of this situation. In this evaluation, the width of the metal wiring 13 is 500 μm and the pitch between the metal wirings 43 is 1000 μm. In the figure, the horizontal axis represents the polishing time (seconds) in the step of FIG. The vertical axis represents the distance from the surface of the SiO ₂ film 12 to the surface of the SiO ₂ film 14.

Before polishing, the surface of the SiO ₂ film 12 where the metal wiring 13 is present (projection) is removed from the surface of the SiO ₂ film 14.
The difference between the distance to the surface of the (solid line in the figure), and the distance from the surface of the SiO ₂ film 12 without the metal wires 13 parts (recesses) to the surface of the SiO ₂ film 14 (dotted line in the figure), It is 1.1 μm, which is the same as the film thickness of the metal wiring 13.

[0029] the polishing progresses, because the polishing rate of the SiO ₂ film 14 of the convex portions is higher than that of the recess, SiO the protrusions ₂
The difference between the distance between the film 12 and the SiO ₂ film 14 and that at the convex portion becomes smaller. Here, higher reason than that the polishing rate of the SiO ₂ film 14 of the convex portion is concave, SiO convex portion ₂
This is because the load is concentrated on the film 14.

However, the SiO ₂ film 1 on the convex portion
The speed at which the difference between the distance between the 2 · SiO ₂ films 14 and that at the recesses shrinks is very slow, and when polishing is performed for about 70 seconds and the SiO ₂ film 14 at the protrusions is removed by polishing by about 1.0 μm, The SiO ₂ film 14 in the concave portion is also removed by polishing by about 0.65 μm, and as a result, the SiO ₂ film 12 in the convex portion is removed.
The difference between the distance between the SiO ₂ films 14 and that in the recess is about 0.35 μm.

In order to completely flatten the surface of the SiO ₂ film 14 by this method, the polishing amount may be increased. That is, the SiO ₂ film 14 may be thickly formed and polished.

However, in this method, the polishing time becomes very long, and such a long polishing time causes an increase in production cost. Further, since the variation of the polishing rate within the surface of the substrate to be polished increases in proportion to the polishing amount, it is not desirable to increase the polishing amount as described above.

[0033] To prevent the dishing of the concave portion due to the above method, for example, by providing a film such as a silicon nitride as a polishing stopper recess, to suppress polishing of the SiO ₂ film 14 of the concave portion, the convex portion SiO ₂ The speed at which the difference between the film thickness of the film 14 and that of the recess is reduced may be increased.

This method will be described with reference to process sectional views of FIGS. 5A to 5D. First, as shown in FIG. An SiO ₂ film 12 and a metal wiring 13 (thickness 1.1 μm) are formed.

Next, as shown in FIG. 5B, the metal wiring 1
A SiO ₂ film 14 is deposited on the entire surface so that 3 is hidden.

Next, as shown in FIG. 5C, after depositing a silicon nitride film 15 on the SiO ₂ film 14, the silicon nitride film 15 is patterned to form a recessed SiO ₂ film having no metal wiring 13. The silicon nitride film 15 is selectively left only on the surface 14.

After that, the surface of the SiO ₂ film 64 is polished by using the polishing apparatus shown in FIG. 3 as in the previous method.

According to this method, as shown in FIG. 5D, it is possible to alleviate the original unevenness of the surface of the SiO ₂ film 14 and prevent the dishing of the recess. However, the SiO ₂ film 14 between the metal wirings 13 slightly protrudes, and the shape of the SiO ₂ film 64 after polishing has a shape that is the reverse of the shape before and after polishing.

FIG. 6 shows the result of detailed examination of this situation. In this evaluation, the width of the metal wiring 13 is 500 μm and the pitch between the metal wirings 13 is 1000 μm. In the figure, the horizontal axis represents the polishing time (second) in the step of FIG. The vertical axis represents the distance from the surface of the SiO ₂ film 12 to the surface of the SiO ₂ film 14.

Before polishing, the surface of the SiO ₂ film 12 where the metal wiring 13 is present (projection) is removed from the surface of the SiO ₂ film 13.
To the surface (solid line in the figure) and the distance from the surface of the SiO ₂ film 12 in the portion where there is no metal wiring 13 (recess) to the surface of the SiO ₂ film 14 (dotted line in the figure) are both metal. It is 1.1 μm, which is the same as the film thickness of the wiring 13.

When polishing is started, the SiO ₂ film 14 on the convex portion is
Since the polishing speed of S is higher than that of the concave,
The difference between the distance between the iO ₂ film 12 and the SiO ₂ film 14 and that in the concave portion decreases. Here, the SiO of the convex portion
_The reason why the polishing speed of the _two films 14 is higher than that of the concave portions is that when a material having irregularities is polished, the load is concentrated on the convex portions.

[0042] Further, in this method, since the provided silicon nitride film 15 as a stopper film in the recess, the polishing rate of the SiO ₂ film 14 of the recess is very slow compared to that of the convex portion, the convex portion SiO ₂ The polishing speed of the film 14 reduces the difference between the distance between the SiO ₂ film 12 and the SiO ₂ film 14 in the convex portion and that in the concave portion.

Then, about 70 seconds after the start of polishing, the difference between the distance between the SiO ₂ film 12 and the SiO ₂ film 14 in the recess and that in the recess becomes almost zero, and the surface of the SiO ₂ film 14 becomes flat. . However, even if the surface of the SiO ₂ film 14 becomes flat, polishing continues after that, so that the portion not covered with the silicon nitride film 15, that is, the convex SiO ₂ film 14 is polished and becomes thin. Go.

As a result, the distance between the SiO ₂ film 12 and the SiO ₂ film 14 in the convex portion becomes smaller than that in the concave portion, and the shape of the SiO ₂ film 14 after polishing is the reverse of the shape before polishing to the unevenness. It will be what you did.

[0045] To prevent the reversal of such a shape of the SiO ₂ film 14, when the surface of the SiO ₂ film 14 becomes flat, so that the silicon nitride film 14 disappears, the thickness of the silicon nitride film 15 However, there is a problem that the optimum film thickness range is narrow and it is not practical. Furthermore, this method is an essential step. The step of forming a stopper film such as the silicon nitride film 15 and patterning it is also complicated and costly.

As described above, the conventional method of flattening the insulating film by polishing has a problem that it is difficult to achieve complete flattening due to the generation of dishing in the recess.

Therefore, in order to suppress the occurrence of dishing, a method has been attempted in which a stopper film such as a silicon nitride film is selectively provided in the recess and polishing is performed.

However, in this method, since the dishing of the convex insulating film without the stopper film occurs immediately after the flattening of the insulating film is achieved by polishing, complete planarization is achieved also in this case. There was a problem that it was difficult.

7 (a) and 7 (b) are views showing a flattening step in another conventional method for manufacturing a semiconductor device.

As shown in FIG. 7A, a fine pattern 32 such as a multilayer wiring, a semiconductor polycrystal layer, a capacitor and an electrode is selectively formed on a semiconductor substrate or a base substrate 1, and a recess 33 is formed between the patterns. , 34 are formed.

The recess 33 is a recess formed between adjacent fine patterns, and the recess 34 is a recess having an opening width larger than that of the recess 33.

An insulating film 35 is formed on the semiconductor substrate 1 having the fine pattern 32. Further, a resist 36 is applied to this insulating film 35.

Recesses 33 formed between adjacent fine patterns
The film thickness of the resist 36 applied above is relatively smaller than the film thickness of the resist 36 applied above the recess 34 having an opening width larger than that of the recess 33.

Next, as shown in FIG. 7B, the surface of the resist 36 is subjected to, for example, RIE (Reactive Ion).
Etching is performed to etch back to expose the insulating film 35. Here, 35a is an insulating film 35 formed above the recess 33 formed between the adjacent fine patterns, and 35b is an insulating film 35 formed above the recess 34.

The surface shape of the insulating film 35 is such that the etching of the insulating film 35 at the portion above the concave portion 33 where the film thickness of the resist 36 is thin progresses rapidly, so that the insulating film 35 as a whole has a surface. A considerable unevenness, that is, a height difference will occur.

Further, FIGS. 7A and 7B are views showing another flattening step of the semiconductor device, particularly the flattening before the multi-layer step.

As shown in FIG. 8A, a polysilicon refractory metal silicide layer 42 as a capacitor or an electrode is selectively formed on the semiconductor substrate 1. Here, there are a recess 43 in a narrow space and a recess 44 in a wide space between the polysilicon refractory metal silicide layers 42.

Further, an insulating film 45 is formed on the semiconductor substrate 41 having the polysilicon refractory metal silicide layer 42. For example, this insulating film 45 is formed of BPSG (Boro).
nPhosphaous Silicon Glass
s) It is a film.

Next, as shown in FIG. 8B, this BPS
The G film is reflowed with a phosphorus diffusion melt. Then,
The surface height of the BPSG film 45 of the recess 44 in the portion having a large space between the polysilicon refractory metal silicide layers 42 is lower than that of the BPSG film 45 of the recess 43 in the portion having a narrow space, and the insulating film 45 as a whole has a surface. A considerable unevenness, that is, a height difference will occur.

In a manufacturing method including such a flattening step, it is very common to provide a bump step structure such as an electrode, a capacitor, and a wiring, and a recess step structure such as a trench and a contact hole on a semiconductor substrate. An insulating film is provided on the step structure, and the step is flattened by etching back or reflowing the insulating film.

However, in this method such as etch back or reflow, since the width of the recess is various,
The height of the insulating film surface cannot be made completely equal.
That is, the insulating film cannot be completely flattened.

The unevenness left on the surface has various adverse effects on the subsequent steps.

For example, a wiring material is formed on a film having unevenness on the surface, and the wiring material is patterned. Then, when the pattern is exposed, the focus does not match, and as a result, the formation of the formed wiring is disturbed, and the patterning cannot be performed accurately.

In the recent sub-micron device, the degree of integration is increased, and the height difference between the central portion and the peripheral portion is widened within the chip, and the wiring width is also very narrow. In such a situation, the unevenness of the removed surface not only disturbs the pattern shape but also adversely affects the electrical characteristics.

Further, since RIE is used as the etch back, the loading effect of the etching rate and the shape which is peculiar to the anisotropic etching due to the difference in the size of the opening and the pattern occupancy occurs, and the controllability of the etching is lacking.

As a result of these, there is a problem that a disconnection of the wiring or a defect such as a short circuit between the wirings occurs and the yield or reliability of the wiring is lowered.

FIGS. 9A to 9C are sectional views showing another conventional polishing step for flattening the insulating film.

First, as shown in FIG. 9A, a SiO ₂ film 52 is deposited on the Si semiconductor substrate 1. After this, this Si
The lower wiring 53 is formed on the O ₂ film 52.

Next, as shown in FIG. 9B, the lower layer wiring 5
3 (c) after depositing the SiO ₂ film 54 on the entire surface of 3 and the like.
As shown in, a part of the SiO ₂ film 54 is removed by a polishing method.

Here, in the polishing step, the irregularities on the surface of the SiO ₂ film 54 shown in FIG. 9B are removed to remove the SiO ₂ film 54.
It is for flattening the surface.

However, as shown in FIG. 9 (c),
Although it is relatively easy to flatten the portion of SiO ₂ film 54 surface, it is not easy to flatten throughout the SiO ₂ film 54 surface. This is because the amount of abrasion of the SiO ₂ film 54 differs depending on the position within the surface of the Si substrate 51.
In this case, it is not easy to control the amount of shaving.

Therefore, a method of controlling the shaving amount by using a silicon nitride film or the like as a polishing stopper can be considered. This method is shown in FIGS. 10 (a) to 10 (d).

This method, as shown in FIG.
First, the SiO ₂ film 62 is deposited on the Si substrate 1. After that, the lower wiring 63 is formed on the SiO ₂ film 62.

Next, as shown in FIG. 10B, after depositing a silicon nitride film 64 as a stopper on the lower layer wiring 63, as shown in FIG. 10C, the silicon nitride film 64 is deposited.
A SiO ₂ film 65 is deposited on top. And FIG. 10 (d)
As shown in, a part of the SiO ₂ film 65 is removed by a polishing method.

However, as shown in FIG. 10D, the degree of polishing varies depending on the position within the surface of the Si substrate 52. While the polishing is stopped at the silicon nitride film 64 as a stopper in some places, even the silicon nitride film 64 disappears due to the polishing at some positions in the surface of the Si substrate 52, and the lower wiring 63 is also polished in some places. It has occurred.

11 (a) to 11 (c) and 12 (a) to 12 (e) relate to the conventional manufacturing process of a thin film semiconductor device, respectively, and a silicon substrate is polished by polishing. It shows a step of forming a thin film.

As shown in FIG. 11A, first, the SiO ₂ film 72 is formed on the Si substrate 1.

Next, as shown in FIG. 11B, another Si substrate 73 is attached onto the Si substrate 1 via the SiO ₂ film 72, and then the Si substrate 73 is attached as shown in FIG. 11C. Thinned by polishing.

At this time, the film thickness of the silicon thin film 73 is as shown in FIG.
As shown in FIG. 1 (c), it greatly differs depending on the position in the surface of the Si substrate 1, and the silicon thin film 73 disappears depending on the position.

Therefore, in this case, a method of controlling the shaving amount by using a SiO ₂ film or the like as a stopper for polishing can be considered. The method is shown in FIGS.
2 (e).

As shown in FIG. 12A, first, a SiO ₂ film 82 is formed on the Si substrate 1.

Next, as shown in FIG. 12B, the SiO ₂ film 8 is formed on the Si substrate 1 by using another Si substrate 83 as a stopper.
Stick through 2 Thereafter, as shown in FIG. 12C, a hole reaching the surface of the SiO ₂ film 82 is opened in the Si substrate 83. Following this, as shown in FIG.
After selectively depositing a SiO ₂ film 82 having a desired thickness on the opening, as shown in FIG. 12E, a part of the Si substrate 83 is removed by a polishing method.

In this case, as shown in FIG. 12E, the degree of polishing differs depending on the in-plane position of the Si substrate 1. S
Polishing has stopped at the io ₂ film 84, but S
Depending on the in-plane position of the i substrate 1, the SiO ₂ film 84 disappears due to polishing, and as a result, the silicon thin film 83 disappears.

As described above, the conventional semiconductor device manufacturing method has the following problems.

That is, one major problem is that it is difficult to control the polishing amount. The control of the polishing amount as used herein is the control of the absolute polishing rate and the control of the in-plane uniformity of the polishing rate, and if these two cannot be controlled, it cannot be a practical technique. . Therefore, as a method for controlling the polishing amount, a method using a silicon nitride film or a SiO ₂ film as a polishing stopper has been considered.

However, a silicon nitride film or SiO ₂
When the film is used as a stopper for polishing, it is not possible to obtain a sufficient polishing rate selection ratio between the object to be polished and the stopper, which makes it difficult to practically manufacture. Further, the selection ratio of the polishing rate between the object to be polished and the stopper greatly differs depending on the type of polishing agent. For example,
If the abrasive contains a large amount of sodium hydroxide,
The polishing rate of the O ₂ film becomes faster. Therefore, there is a problem in that the stopper material must be selected depending on the type of abrasive.

As described above, in the polishing step in the conventional semiconductor manufacturing method, it is difficult to control the polishing amount, and there is a problem that it cannot be put to practical use.

In the polishing process in the conventional method for manufacturing a semiconductor device, the polishing amount is controlled by polishing the test piece before polishing the product and polishing the product based on the polishing rate obtained from the test piece. The method of setting and polishing is adopted.

However, the polishing rate changes with time as shown in FIG. 18, and the polishing rate obtained with the test piece is not always the same as the polishing rate when the product is being polished.

Such a change in the polishing rate with time greatly changes depending on the amount and state of the polishing agent held on the polishing cloth, and is extremely difficult to control.

Therefore, in order to bring the polishing rate obtained with the test piece close to the polishing rate when the product is being polished, the number of test pieces is increased. This has led to an increase in production costs such as soaring material costs for pieces and a decrease in the operating rate of production equipment, which is an obstacle to putting the polishing process into practical use.

Another method is to control the amount of polishing by repeatedly polishing the product in a small amount in advance, measuring the amount of scraping, and polishing the product again.

However, with this method, although the cost of the test piece is not so great, it takes time and labor, and the operating rate of the production equipment is also low.

Further, the polishing amount in the manufacturing process of the semiconductor device is at most about 1 μm, and with such a small polishing amount, the accuracy of controlling the polishing amount is not so good in the above method.

In the conventional method of manufacturing a semiconductor device,
Thus, there is a problem that it is difficult to control the polishing amount.

Therefore, a method of confirming the polishing rate with a test piece and a method of polishing the product in several steps while confirming the scraping amount of one product are taken, but it takes time and the production cost is also increased. To rise. Moreover, the precision of control is not sufficient.

Furthermore, in the conventional polishing method,
USP.Pat.No.5,036,015 `` Method of Endpoint detection
during chemical / Mechanicul Planarization of Semi
As seen in "condnctor Wafers", the turntable of the planarizer is driven by an electric motor, and the change in friction between the wafer held by the holding device and the polishing cloth on the turntable flows through the electric motor. Detected as a change in current value.

When the silicon oxide film is flattened, a hard material layer is provided under the silicon oxide film in advance, and the polishing surface completes the removal of the silicon oxide film by polishing, and reaches the hard material layer to cause friction. The flattening is considered to have ended when the value of the value has increased significantly.

The problems of this conventional method are shown in FIGS.
This will be described with reference to FIG.

FIG. 14 shows an outline of a conventional polishing apparatus, in which a polishing cloth 504 of a turntable 502 and a holder 50 are provided.
The change in friction between the semiconductor wafers 1 held by the motors 1 and 1 is connected to the motors 511 and 512, respectively.
The change is detected as a change in current detected by 3, 514.

The current flowing through the motors 511 and 512 changes in a quadratic function as shown in FIG. 15 with respect to the voltage of the drive power supplies 515 and 516, and the change in the drive voltage affects the detection amount.

Further, as shown in FIG. 16, it is difficult to properly indicate the friction state because the motor current is the no-load current Io even in the no-load state where polishing is not performed.

Further, in the polishing apparatus, as shown in FIG. 14, the respective shafts 517, 5 of the turntable 502 and the holding apparatus by the harmonics of the motors 511, 512, etc.
18 shafts 517, 518 to prevent pulsation
The belts 519 and 520 are connected to each other to prevent the mechanical pulsation from adversely affecting the polishing surface.
Between the shaft 20 and the shafts 517 and 518, slippage is likely to occur during driving, and due to this slippage, the load state on the motors 511 and 512 fluctuates, and the current value hardly reflects the polishing state.

Incidentally, in another conventional polishing method, the polishing rate is calculated from the rotation speed of the turntable and the load applied to the object to be polished, and the polishing time is set from this polishing rate and the required polishing amount. ing.

That is, a nonwoven fabric is provided as a polishing cloth on a turntable rotatably formed by a drive motor, and a holding portion for holding an object to be polished is provided above the nonwoven fabric. This holding portion is rotatably formed by a drive motor.

In the above structure, first, the semiconductor substrate, ie, the semiconductor wafer, which is the object to be polished, is attached to the holding portion at a position facing the upper surface of the table. In this wafer, wiring is provided on a silicon substrate via a first insulating film, and a second insulating film is provided on the wiring and the first insulating film.

Next, the holding portion and the table are rotated by a drive motor at predetermined rotational speeds. After this, an abrasive is supplied onto the non-woven fabric rotating with the table.

Next, the holding part is moved downward, and the wafer is brought into contact with the nonwoven fabric. At this time, a predetermined load is applied to the wafer.

After that, the holding part is moved in a direction parallel to the surface of the table, and the wafer is polished for a predetermined time. As a result, the second insulating film 2 on the wafer is flattened by removing irregularities.

Next, the wafer is exchanged in the holding section. After that, the steps as described above are repeated.

After using the polishing apparatus for a predetermined time, the non-woven fabric is dressed with a brush in order to improve the condition of the non-woven fabric. Next, after the steps as described above, that is, polishing and dressing are repeated,
The non-woven fabric is replaced.

In the conventional polishing method, the polishing rate is calculated from the set polishing conditions, that is, the rotation speed and the load, and the polishing time is set from the polishing rate and the required polishing amount.

That is, the polishing rate is calculated to be constant unless the rotational speed and the load are changed.

However, even if the settings of the rotation speed and the load are not changed, the friction between the wafer and the non-woven fabric during polishing changes with the passage of polishing time,
The polishing rate also changes.

FIG. 17 is a diagram showing the relationship between the total use time of a nonwoven fabric and the polishing rate. The stage where the total use time of the non-woven fabric is within 50 minutes is the initial stage of use, and the stage where the total use time of the non-woven fabric is 50 minutes or more is the operating stage.

According to FIG. 17, even in the operation stage, the polishing rate changes as the total use time of the nonwoven fabric elapses.

The reason for this is that as the total use time of the non-woven fabric increases, the non-woven fabric is clogged with the abrasive,
It is conceivable that the surface condition of the non-woven fabric changes due to the non-woven fabric itself being abraded, that is, the non-woven fabric being worn.

That is, the function of supplying and discharging the abrasive on the surface of the non-woven fabric is lowered, and the polishing efficiency of the object to be polished is changed.

That is, the surface texture of the non-woven fabric has an infinite number of interfiber spaces as shown in FIG. 13, and the abrasive particles 505 are held in this space. Then, during polishing, the held polishing agent is discharged or supplied to the wafer. However, this supply / discharge function is deteriorated due to abrasion of the nonwoven fabric. Therefore, the polishing rate changes with time.

Further, when the surface condition of the non-woven fabric is further deteriorated, scratches may occur on the polishing surface of the object to be polished, or the flatness of the polishing surface may deteriorate.

As for the clogging of the non-woven fabric with the abrasive, dressing the non-woven fabric with a brush or the like at an appropriate time can be considered. Dressing is effective against abrasion of the non-woven fabric, but if the dressing does not recover or regenerate, it is the life of the non-woven fabric.
It is necessary to replace the non-woven fabric at an appropriate time.

However, in the conventional polishing method, the dressing timing is determined based on the experience of the operator, and the nonwoven fabric replacement timing is calculated by measuring the polishing amount per unit time to calculate the polishing rate. Judging from this polishing rate.

Therefore, the timing of dressing and the timing of replacement of the non-woven fabric were not appropriate. As a result,
It is not possible to maintain a constant polishing rate for the object to be polished,
The amount of polishing on the object to be polished could not be controlled accurately.

[0124]

As described above, in the conventional method of manufacturing a semiconductor device, in order to prevent impurities such as alkali metal from diffusing into the inside of the semiconductor device from the polishing particles, before the polishing step, It is necessary to take precautionary measures such as forming a protective film under the film to be polished to prevent the diffusion of impurities into the semiconductor element in advance, which complicates the semiconductor process, or causes insulation that is formed during the manufacturing process. There is a problem that the pattern shape is disturbed due to the unevenness of the film surface, a defect such as a disconnection of the wiring or a short circuit between the wiring occurs, and the yield and reliability of the wiring are reduced.

In the conventional polishing method, the polishing amount is controlled by polishing the test piece in advance, and the polishing time of the product is set based on the obtained polishing rate. The dressing timing is determined based on the experience of the operator, and the non-woven fabric replacement timing is calculated by measuring the polishing amount per unit time and calculating the polishing rate. Therefore, the timing of dressing and the time of replacing the non-woven fabric were not appropriate. As a result, the polishing rate on the object to be polished could not be kept constant, and the amount of polishing on the object to be polished could not be controlled accurately.

The present invention is a semiconductor device which can be easily obtained without contamination by impurities or which minimizes the disturbance of the pattern shape due to the unevenness of the film surface, its manufacturing method, and the amount of polishing on the object to be polished is accurately controlled. It is an object of the present invention to provide a polishing apparatus and a polishing method to be obtained, and a method for reclaiming a polishing surface that can maintain the quality of the polishing surface.

[0127]

According to the first aspect of the present invention, the ratio of each element other than the main component is approximately 1 as the polishing agent used in the polishing and flattening step of the semiconductor device.
It is characterized by using a material having a concentration of 00 ppm or less.

In the second aspect of the present invention, the steps of forming a conductive film on a semiconductor substrate, selectively removing the conductive film to form a recess, and forming a recess on the conductive film having the recess are performed. A step of forming an insulating film at least above the height of the recess, and by polishing the insulating film with a polishing agent containing cerium oxide using the conductive film as a stopper to remove the conductive film and the insulating film. And a polishing step for smoothing the surface of.

In the third aspect of the present invention, a step of selectively forming a wiring portion on a semiconductor substrate, a step of forming an insulating film on the semiconductor substrate having the wiring portion, and a step of forming an insulating film on the insulating film are performed. A step of forming a conductive film; a step of selectively removing the insulating film and the conductive film to form a recess for exposing the wiring portion; and a height of at least the recess on the conductive film having the recess. By the step of forming a wiring material as described above, and by polishing the wiring material with a polishing agent containing cerium oxide using the conductive film as a stopper,
And a polishing step for smoothing the surfaces of the insulating film and the wiring material.

In a fourth aspect of the present invention, the step of forming a first insulating film on a semiconductor substrate, the step of selectively forming a wiring portion on the first insulating film, and the first A step of forming an amorphous silicon film, which is to be a second insulating film, on the wiring part having an insulating film; and a step of forming a third insulating film on the amorphous silicon film at least at a height of the wiring part or more And smoothing the surface of the third insulating film and the amorphous silicon film by polishing and removing the third insulating film with the amorphous silicon film as a stopper by using a polishing agent containing cerium oxide. It comprises a polishing step and a step of modifying the amorphous silicon film into a second insulating film.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device for polishing a layer to be processed formed on a semiconductor substrate, the friction between the layer to be processed and a surface plate holding an abrasive is polished. Measure the inside, calculate the polishing rate of the layer to be processed based on this friction, integrate this polishing rate over time to obtain the polishing amount, and finish the polishing when this polishing amount reaches a predetermined amount It is characterized by

According to a sixth aspect of the present invention, in a method of manufacturing a semiconductor device for polishing a layer to be processed formed on a semiconductor substrate, work performed between the layer to be processed and a surface plate holding an abrasive. It is characterized in that the amounts are integrated and the polishing is terminated when the integrated work amount reaches a predetermined amount.

In the seventh aspect of the present invention, the friction between the means for polishing the layer to be processed formed on the semiconductor substrate and the surface plate holding the abrasive and the polishing agent is measured during polishing. And a means for determining a polishing amount.

In the eighth aspect of the present invention, the work done between the means for polishing the layer to be processed formed on the semiconductor substrate and the surface plate holding the polishing agent and the polishing agent is measured. And a means for integrating.

The ninth aspect of the present invention is characterized by comprising means for polishing and flattening a semiconductor wafer, and means for detecting the absolute value of the polishing load amount on the wafer polishing surface.

In the tenth aspect of the present invention, the polishing surface is provided on the table, and the object to be polished having the surface to be polished is held by the holding portion provided at a position facing the polishing surface. When polishing the object to be polished by sliding the polishing surface and the surface to be polished by applying pressure between the polishing surface and the table, a first friction between the polishing surface and the surface to be polished. And a second means for measuring a second friction between the polished surface and the surface to be polished after a lapse of a predetermined time, and a value of a ratio of the first friction and the second friction. Is calculated, and second means for determining the time to perform the process for regeneration on the polished surface from the value of the ratio.

In the eleventh aspect of the present invention, a polishing surface is provided on the table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface. When polishing the object to be polished by sliding the polishing surface and the surface to be polished by applying pressure between the polishing surface and the table, a first friction between the polishing surface and the surface to be polished. And a second means for measuring a second friction between the polished surface and the surface to be polished after a lapse of a predetermined time, and a value of a ratio of the first friction and the second friction. And a second means for determining the time to replace the polishing surface from the value of the ratio.

In the twelfth aspect of the present invention, a polishing surface is provided on the table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface. When polishing the object to be polished by sliding the polishing surface and the surface to be polished by applying pressure between the polishing surface and the table, a first friction between the polishing surface and the surface to be polished. And a second means for measuring a second friction between the polished surface and the surface to be polished after a lapse of a predetermined time, and a value of a ratio of the first friction and the second friction. Calculating means, second means for deciding the time to perform processing for regeneration on the polishing surface from the value of the ratio, and second means for deciding the time to replace the polishing surface from the value of the ratio. 3 means are provided.

According to a thirteenth aspect of the present invention, a step is provided in which a polishing surface is provided on a table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, A step of rotating the table and the holding part, and supplying an abrasive to the polishing surface, and applying pressure between the holding part and the table to slide the polishing surface and the surface to be polished. Thereby polishing the object to be polished, measuring a first friction between the surface to be polished and the surface to be polished, and a second step between the surface to be polished and the surface to be polished after a predetermined time has elapsed. Measuring the friction of the first friction and the second friction and calculating the value of the ratio between the first friction and the second friction; the time of performing the regeneration treatment on the polishing surface and the polishing surface from the value of the ratio. To determine at least one of the time to replace Characterized by including the.

In the fifteenth aspect of the present invention, a polishing surface is provided on the table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface. Between the polishing surface and the polishing surface when polishing the workpiece under the first polishing condition by applying pressure between the polishing table and the table and sliding the polishing surface and the polishing surface. While measuring the first friction of
Means for measuring the second friction between the polished surface and the surface to be polished after a lapse of a predetermined time, and the value of the ratio between the first friction and the second friction are calculated, and the value of this ratio is calculated. To a second polishing condition that provides the same polishing amount as the first friction amount.

In a sixteenth aspect of the present invention, a step of providing a polishing surface on a table and holding an object to be polished having a surface to be polished in a holding portion provided at a position facing the polishing surface,
A step of rotating the table and the holding part, and supplying an abrasive to the polishing surface and applying pressure between the holding part and the table to slide the polishing surface and the surface to be polished. Thereby polishing the object to be polished under the first polishing condition, measuring the first friction between the polishing surface and the polishing surface, and after polishing a predetermined time, the polishing surface and the object to be polished. A step of measuring a second friction between the polishing surfaces, a step of calculating a value of a ratio of the first friction and the second friction, and an amount of polishing by the first friction based on the value of the ratio. And a step of calculating a second polishing condition having the same polishing amount as the above.

In the seventeenth aspect of the present invention, a polishing surface is provided on the surface plate, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, A polishing agent is supplied between a polishing surface and the surface to be polished, and pressure is applied between the polishing surface and the surface to be polished to slide the polishing surface and the surface to be polished. A polishing apparatus for polishing an object is characterized in that a surfactant is supplied to the polishing surface.

[0143]

In the first embodiment, a high-purity abrasive containing almost no impurities is used. Thereby, even if the polishing agent remains on the surface of the wafer after polishing the wafer, it is possible to prevent the semiconductor device from being contaminated by the impurities contained in the polishing agent.

In the second to fourth aspects, since the semiconductor device is not flattened by etching back, reflowing, etc., absolute flattening is possible regardless of the dimensions of the concave portions and the convex portions.

Moreover, by using the abrasive containing cerium oxide, sufficient polishing can be performed in the neutral region.
Therefore, even if a material that is susceptible to corrosion is present in the lower layer wiring, the material is not eluted.

Further, since RIE is not used as etch back, there is no etching rate or shape loading effect due to the difference in opening size or pattern occupancy peculiar to anisotropic etching, so that etching controllability is excellent. .

As described above, absolute planarization is possible regardless of the dimensions of the concave and convex portions, and a semiconductor device with high yield and high reliability can be obtained.

In the fifth to eighth aspects, the one-to-one correspondence between the friction between the layer to be processed and the surface plate holding the abrasive and the polishing rate of the layer to be processed is utilized. is doing. By doing so, the friction between the layer to be processed and the surface plate holding the abrasive was measured, the polishing rate of the layer to be processed was calculated based on this friction, and this polishing rate was integrated over time. The polishing amount is obtained, and when the polishing amount reaches a predetermined amount, the polishing is finished. As a result, the polishing amount can be accurately controlled with a simple method.

In the ninth aspect, the load due to the friction of the polishing surface is measured by measuring the amount of strain of the shaft directly connected to the polishing surface, converted into an electric signal, and the control such as stopping the motor for driving the polishing surface is performed. As a result, the complete flattening can be easily realized with higher accuracy.

In the tenth to sixteenth aspects, the present invention comprises rotating the table and the holding portion, supplying an abrasive onto the polishing surface, and sliding the polishing surface and the surface to be polished. When polishing the object to be polished, the first friction between the polishing surface and the surface to be polished is measured, and the second friction between the polishing surface and the surface to be polished after a predetermined time has passed, The value of the ratio between the first friction and the second friction is calculated. From the value of this ratio, the change in friction between the polished surface and the surface to be polished can be known, and the state of the polished surface can be detected from this change in friction. As a result, it is possible to accurately determine at least one of the time when the polishing surface is treated for regeneration and the time when the polishing surface is replaced.

When the object to be polished is polished under the first polishing condition, the first friction between the polishing surface and the surface to be polished is measured, and after a lapse of a predetermined time, the polishing surface and the surface to be polished are The second friction between them is measured, the value of the ratio between the first friction and the second friction is calculated, and the amount of polishing is the same as the amount of polishing by the first friction from the value of the ratio. 2 polishing conditions are calculated. Therefore, even if the state of the polished surface changes, the polishing amount can be kept constant by changing the setting to the second polishing condition.

In the seventeenth aspect, an abrasive is supplied between the polishing surface and the surface to be polished, and pressure is applied between the polishing surface and the surface to be polished to slide the polishing surface and the surface to be polished. Thus, in a polishing apparatus for polishing an object to be polished, a surfactant is supplied to the polishing surface in order to regenerate the polishing surface. As a result, the effect of removing the abrasive clogged on the polishing surface is enhanced,
The surface condition of the polished surface is kept constant.

[0153]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 19 is a sectional view showing the steps of flattening the interlayer insulating film according to the embodiment of the present invention.

As shown in FIG. 19A, a SiO ₂ film 202 having a thickness of 1 μm is formed on a Si substrate 201 having elements (not shown) formed on its surface. Then, a polysilicon film 203 having a thickness of 500 nm is formed on the SiO ₂ film 202.

Next, as shown in FIG. 19B, a photoresist (photosensitive resin layer) having a thickness of 1.5 μm is applied on the polysilicon film 203, and a mask pattern (not shown) is used to form a photoresist. A photoresist pattern 204 is formed by exposing and developing the photoresist layer.

Next, as shown in FIG. 19C, with the photoresist pattern 204 as a mask, the polysilicon film 203 is patterned by the RIE method using CF ₄ gas.

Next, as shown in FIG. 19 (d), the photoresist pattern 204 is formed by a down-flow type ashing treatment apparatus in which a mixed gas of CF ₄ and O ₂ is subjected to microwave discharge to ash the photoresist. Peel off.

Next, as shown in FIG. 1, a 1 μm thick SiO ₂ film 205 is formed as an interlayer insulating film on the entire surface. Here, the polysilicon wiring 20 is formed on the surface of the SiO ₂ film 205.
There was a step corresponding to 3.

Next, as shown in FIG. 19F, SiO ₂
The film 205 was polished. For polishing, an apparatus as schematically shown in FIG. 3 was used. As shown in FIG. 3, the tip of the abrasive supply pipe 503 is located at the center of the polishing cloth 504 on the turntable 502.
2 rotates in the direction of the arrow at 100 rpm around an axis passing through the center, and an abrasive is supplied onto the polishing cloth 504 from the tip. The wafer 1 is pressed against the polishing cloth 504 with a load of 40 kgf and rotated in the direction of the arrow at 100 rpm.
The abrasive is a powder of cerium oxide having an average particle size of 1.2 μm and a maximum particle size of 4.0 μm obtained by crushing and firing bastnasite and suspended in water. Cerium 50 wt%, oxides of other rare earth metals 37
It is about wt%. Table 1 shows the composition of the powder containing cerium oxide used in this example.

[0161]

[Table 1] The surface of the insulating film after being polished with an abrasive containing cerium oxide was flattened. Moreover, the surface of the insulating film was observed with a differential interference microscope, and no scratch was observed.

In the process, the average particle size is 2.5 μm and the maximum particle size is 1.
Even when a polishing agent prepared by suspending 1 wt% of powder containing 2.0 μm cerium oxide in water was used, the surface of the insulating film after polishing was flattened. When the surface of the film was observed, 4 scratches per 10 cm ² were observed.

The average particle size is 2.5 μm and the maximum particle size is 1
In the case of using a polishing agent prepared by suspending 1 wt% of a powder containing 2.0 μm of cerium oxide and pulverized and fired as described above in water, the surface of the insulating film is examined by a differential interference microscope. When observed, the number of scratches per 10 cm ² was one.

From these results, it is possible to flatten the surface of the insulating film by polishing with a polishing agent containing cerium oxide. The polishing agent containing cerium oxide has a small particle size, preferably the maximum particle size. It can be seen that scratches can be suppressed with a particle diameter of 4 μm or less, and scratches can be suppressed by softening the hardness of the particles by selecting the baking conditions even with the abrasive having the same particle size.

Next, Table 2 shows the film thickness 1 obtained by thermally oxidizing silicon.
μm silicon oxide film and 1 μm thick silicon oxide film containing phosphorus and boron in high concentration (hereinafter referred to as BPSG)
Average particle size of 2.5 μm and maximum particle size of 12.0 μm
2 shows the result of impurity analysis by atomic absorption spectrometry after polishing with 0.5 μm of an abrasive in which 1 wt% of a powder containing cerium oxide was suspended in water. For reference, Compole 8
The result when polishing with 0 is also shown.

[0166]

[Table 2] As is apparent from Table 2, when polishing with Compol 80, Ref. The value of sodium is higher by about one digit than the value of the sample without polishing (normal value described in literature).
In the SG film, the level of sodium is higher than two digits.

On the other hand, in the case of polishing with the polishing agent containing cerium oxide, the levels of sodium in both the silicon thermal oxide film and the BPSG film are Ref. The value was similar to or almost the same as the value (normal value described in the literature), but the other elements were also equal to or almost the same. For Ce, 1 × 10 ¹⁰ at
It was less than oms / cm ² . Abrasives containing cerium oxide are those obtained by crushing and firing bastnasite as described above.Although alkali metals etc. have not been removed, alkali metal contamination to the insulating layer is still not observed. It can be seen that even a polishing agent containing bastnasite as a raw material does not hinder the manufacturing of semiconductor devices.

Next, Table 3 shows that silicon is a thermally oxidized silicon oxide film, a silicon nitride film, and a BPSG film, and 1 wt% of powder containing cerium oxide having an average particle diameter of 2.5 μm and a maximum particle diameter of 12.0 μm is added to water. The polishing rate at the time of polishing using the abrasive suspended in FIG. For reference, a suspension of Compol 80 and 5 wt% of silicon particles having a particle diameter of 12 nm in water, and further 10 wt% of ammonia
Those obtained by adding 0.2 wt% of sodium hydroxide are also shown.

[0169]

[Table 3] As shown in Table 3, in the case of the thermally oxidized silicon oxide film, the polishing rate of the compol 80 is about 110 nm / min. Further, when only 5 wt% of silica particles having a particle diameter of 12 nm is suspended in water, the polishing rate is 6 nm / mi.
n is very small. To this, add sodium hydroxide to 0.2
The polishing rate is 50 nm / min with the addition of wt%, and 18 nm / min with the addition of 10 wt% of ammonia.
However, the effect of ammonia is smaller than that of sodium hydroxide. Furthermore, the polishing rates when polishing the silicon nitride film and the BPSG film with Compol 80 are 40 nm / min and 200 nm / min, respectively.
Is.

For example, when the thermally oxidized silicon oxide film of 500 nm is removed by polishing, with Compol 80, about 5 minutes, 5 wt% of silica particles having a particle diameter of 12 nm are suspended in water and 0.2 wt% of sodium hydroxide. % Is about 10 minutes, but 10% by weight of ammonia is about 30 minutes, which is not practical.

On the other hand, when 1 wt% of a powder containing cerium oxide having an average particle diameter of 2.5 μm and a maximum particle diameter of 12.0 μm is polished with an abrasive suspended in water, the silicon oxide film is polished. The speed is 1000 nm / min, the polishing speed of the silicon nitride film is 300 nm / min, and the polishing speed of the BPSG film is 1200β to 1300 nm / min, which are very fast.
It takes about 0.5 minutes and 2 minutes, respectively, to remove the 500 nm film by polishing, which is a speed effective for practical use in production.

In this example, the abrasive was a powder of cerium oxide obtained by crushing and firing bastnasite, suspended in water, and the composition was 50% by weight of cerium oxide.
Although an oxide of other rare earth metal oxide of about 37 wt% is suspended in water, the abrasive containing cerium oxide can be changed in terms of raw material, manufacturing method, concentration of suspension, and the like. Although the insulating film to be polished has been described focusing on the silicon thermal oxide film, other insulating films such as a silicon oxide film and a nitride film formed by the chemical vapor deposition method, and a conductor film on a part of the insulating film. It is also effective in the case where is formed.

According to the above embodiment, the insulating film such as the silicon oxide film or the silicon nitride film can be polished at high speed by using the polishing agent containing cerium oxide. Further, alkali metal contamination does not occur inside the insulating film during polishing. Further, it is possible to polish while flattening the steps without causing scratches on the surface of the insulating film. Therefore, it becomes easy to put the insulating film polishing process into practical use, which solves the conventional problems in the manufacture of semiconductor devices.

20 (a) to 20 (c) show another embodiment of the present invention. 20 (a) to 20 (c)
20A and 20B are cross-sectional views of the semiconductor device in the process of being manufactured.
As shown in (b), an insulating film 212 is formed on the entire main surface of the substrate including the semiconductor element 210 formed on the semiconductor substrate 201.
After the film is formed, the surface is planarized by a polishing method with a polishing apparatus as shown in FIG. 3 to obtain a flat surface as shown in FIG. As the polishing agent used in the polishing method, the main components are CeO ₂ and H ₂ O, and the impurities other than the main components are Na, Mg, Al, K, Ca, T.
The concentration of each element of i, Cr, Fe, Ni, Zr, W, Pb, Th, and U is 100 ppm or less. The concentration of each element was measured by ICP mass spectrometry.

As in the above embodiment, by using a high-purity abrasive containing almost no impurities, even if the wafer comes into contact with the abrasive during polishing or the abrasive remains on the wafer surface after polishing, It is possible to prevent the semiconductor device from being contaminated by impurities contained in the agent. Table 4 shows the contamination state when the silicon oxide film polished by the method of the present invention and the conventional method was measured by the primitive absorption spectrometry. As is clear from Table 4, according to the present invention, K, Al, Cr, and Ni are in a contamination state below the detection limit, and Na, Ca, and Fe are 2.3, 0.9, and 3.4 atoms, respectively. / Cm ² , which means that the degree of contamination is extremely low as compared with the conventional method.

As described above, in the method of the above-mentioned embodiment, there is almost no fear of contamination of the semiconductor element, so that it is not necessary to form a protective film on the semiconductor element, the manufacturing process of the semiconductor device is simplified, and the productivity is improved. improves.

[0177]

[Table 4] A flattening method of a layer-related insulating film according to another embodiment of the present invention,
Description will be given with reference to process cross-sectional views of FIGS. 21A to 21E.

First, as shown in FIG. 21A, a SiO ₂ film 202 as a base is deposited on a Si substrate 201 on which a desired semiconductor element (not shown) is formed.

Next, as shown in FIG. 21B, this Si
An Al wiring 206 having a thickness of 1.1 μm is formed on the O ₂ film 202.

Next, as shown in FIG. 21C, the SiO ₂ film 207 is formed on the entire surface of the substrate on which the Al wiring 206 is formed.
Is deposited to a thickness of about 1.2 μm.

Next, as shown in FIG. 21D, SiO ₂
On the film 207, a polysilicon film 208 (polishing auxiliary film) is deposited to a thickness of about 0.1 μm as a film having a lower polishing rate than the SiO ₂ film 207.

After that, the polysilicon film 208 and the SiO ₂ film 207 are polished using the polishing apparatus shown in FIG.
The irregularities on the surface of the iO ₂ film 207 are removed. As the abrasive, for example, a 1 wt% cerium oxide suspension is used.

By such a polishing process, FIG.
As shown in FIG. 3, the SiO ₂ film 207 was completely flattened.

FIG. 22 shows the result of a detailed examination of this situation. In this evaluation, when the width of the Al wiring 206 is 500 μm,
This is for the case where the pitch between the 1 wirings 206 is 1000 μm. In the figure, the horizontal axis represents the polishing time (seconds) in the process of FIG. The vertical axis represents the distance from the surface of the SiO ₂ film 202 to the surface of the SiO ₂ film 207.

Before polishing, the distance (solid line in the figure) from the surface of the SiO ₂ film 202 to the surface of the SiO ₂ film 207 in the portion (protrusion) where the Al wiring 206 is present and the Al wiring 2
The distance (dotted line in the figure) from the surface of the SiO ₂ film 202 in the portion where there is no 06 (recess) to the surface of the SiO ₂ film 207 is 1.1 μm, which is the same as the film thickness of the Al wiring 206.

When polishing is performed, first, the polysilicon film 208 on the convex portions is removed, and when the polishing time is about 30 seconds, the polysilicon film 208 on the convex portions is completely removed.
The SiO ₂ film 207 on the convex portion is exposed. The polysilicon film 208 on the convex portion is preferentially removed because the load applied to the convex portion is larger than that on the concave portion.

When the convex polysilicon film 208 is reduced, the convex SiO ₂ film 207 is then removed by polishing, while the concave polysilicon film 208 is gradually removed by polishing. However, since the load applied to the concave portion is smaller than that of the convex portion, the Si
While the O ₂ film 207 is removed by polishing, the polysilicon film 208 remains in the recess.

As the convex SiO ₂ film 207 is removed by polishing, the irregularities on the surface of the SiO ₂ film 207 are alleviated. Then, when the polishing time was about 100 seconds, the polysilicon film 208 in the recess disappeared almost completely, and the surface of the SiO ₂ film 207 became almost completely flat. Therefore, flattening of the SiO ₂ film 207 is achieved with the minimum necessary amount of scraping without causing dishing.

After the polishing time of about 100 seconds, the flattened SiO ₂ film 207 is polished, so that the unevenness does not appear again.

As described above, according to the flattening method by polishing of this embodiment, since the polysilicon film 208 having a slower polishing rate is provided on the SiO ₂ film 207, the polishing is required. SiO ₂ film 20 with a minimum amount of shaving
7 can be flattened. Further, even if polishing is further continued after the flattening of the SiO ₂ film 207 is achieved, the SiO ₂ film 2
No unevenness is formed on 07.

Further, in this embodiment, the polysilicon film 20 is used.
Although the film thickness of 8 is set to 0.1 μm, the polysilicon film 208 of the concave portion is polished corresponding to the polysilicon film 208 of the convex portion, so that the margin of the film thickness of the polysilicon film 208 is wide. . Actually, the film thickness is 0.08 μm, 0.1
Similar results were obtained using a 5 μm polysilicon film.

As described above, according to the flattening method of this embodiment, the thickness margin of the polysilicon film 208 is large, and moreover,
Since a complicated and costly process of forming a stopper film such as a silicon nitride film and patterning the stopper film as in the conventional case is not necessary, it is highly practical.

Further, according to the research conducted by the present inventors, it was found that the SiO ₂ film as the film to be processed exhibits the same temporal change regardless of the wiring width / pitch interval.

23 to 27, the wiring width / pitch interval is 2, 50, 100, 200, 500, respectively.
For the case of, SiO ₂ as a base of the raised portion
The distance from the surface of the film to the surface of the SiO ₂ film as the film to be processed and the distance from the surface of the SiO ₂ film as the base in the recess to the surface of the SiO ₂ film as the film to be processed are shown.

From these FIGS. 23 to 27, the SiO ₂ film as the film to be processed in the recesses is not polished at the initial stage of polishing regardless of the wiring width / pitch interval, and the recesses and protrusions are formed after a certain time from the start of polishing. As a film to be processed
It can be seen that the O ₂ film is polished at almost the same rate.

According to the research conducted by the present inventors, FIG.
In the case of the structure as shown in (d), the thickness x of the Al wiring 206 (which is not always the Al wiring, that is, the underlying film which causes the uneven portion of the film to be processed) is 0.5 ≦ x ≦ 1. Within the range of 5, the thickness and polishing rate of the polysilicon film 208 (which is not always a polysilicon film, that is, a film having a slower polishing rate than the film to be processed) are A and a, respectively, and SiO
_When the polishing rate of the _two films 207 (not necessarily the SiO ₂ film, that is, the film to be processed) is b, 100a ≦ b · B ≦
It was found that good results were obtained under the condition of 250a.

That is, the thickness of the base film is 0.5 ≦ x ≦
It has been found that in the case of the range of 1.5, if the polishing is performed under the above conditions, the film to be processed can be completely flattened regardless of the film thickness of the film to be processed.

In the case of the present invention, the film having a low polishing rate on the film to be processed (polishing auxiliary film) must have a polishing rate lower than that of the film to be processed. It needs to be noted.

That is, even if the load of the load body is set to W so that the polishing speed of the film to be processed is faster than that of the auxiliary film for polishing, if the load changes to the smaller one during polishing, the film to be processed becomes smaller. The polishing rate of a may be slower than that of the auxiliary polishing film b. Therefore, it is important that the polishing rate of the film to be processed a is always higher than that of the auxiliary polishing film b regardless of the value of the load.

The present invention is not limited to the above embodiment. For example, in the above-described embodiment, the case where the SiO ₂ film is used as the film to be processed and the polysilicon film is used as the film whose polishing rate is slower than that of the film to be processed has been described, but these films may be other films. Furthermore, the abrasive is not limited to cerium oxide.

In Table 5, an abrasive (1 wt% cerium oxide suspension, colloidal silica in which SiO ₂ particles are dispersed), a film to be processed (undoped SiO ₂ film, SiN film,
(Polysilicon film, carbon film, SiO ₂ film containing B and P)
And the polishing rate relationship with is shown.

[0202]

[Table 5] From Table 5, when a cerium oxide suspension and a SiO ₂ film (undoped) are used as the polishing agent and the film to be processed, respectively, a silicon nitride film as well as a polysilicon film is used as a film having a slow polishing rate. It can be seen that a carbon film or the like can be used.

It is also understood that the silicon nitride film and the carbon film can be used when colloidal silica and SiO ₂ film (undoped) are used as the polishing agent and the film to be processed, respectively.

In the above embodiment, the case where the film to be processed is an insulating film has been described, but the present invention can be applied to a metal film. In this case, for example, SiO ₂ having grooves on the surface
A W film as a film to be processed and a Cu film as a film having a slow polishing rate are sequentially deposited on the entire surface of the film to polish the W film and the Cu film.
In this case, the Cu film is hard to be sufficiently polished as compared with the W film, so that the types of abrasives are in a wide range. The present invention can also be applied to semiconductor substrates other than Si substrates and semi-insulating substrates.

As described in detail above, according to this embodiment,
By forming a polishing auxiliary film having a polishing rate slower than that of the film to be processed on the film to be processed having an uneven portion, and then polishing the film to be processed and the auxiliary film for polishing, the dishing and the number of steps are increased. The film to be processed can be flattened without

Still another embodiment of the present invention will be described in detail with reference to FIGS. 28 and 29 (a) to 29 (c).

FIG. 28 is a sectional view of a semiconductor device according to an embodiment of the present invention, and FIGS. 29 (a) to 29 (c) are sectional views in the manufacturing process. .

As shown in FIG. 29A, a semiconductor substrate or a base substrate 201 is formed on the semiconductor substrate 201, for example.
The surface of is thermally oxidized to form, for example, a thermal oxide film 202. Further, a conductive film 203 made of polysilicon or the like is formed on the thermal oxide film 202. Further, a resist 204 is selectively formed on the conductive film 203, and the resist 20
4 as a mask, the thermal oxide film 202 and the conductive film 20.
3. If necessary, the semiconductor substrate 201 is selectively removed to form trenches as the recesses 215 and 216. Recess 2
Reference numeral 15 is a recess formed between adjacent fine patterns 204, and recess 216 is a recess having an opening width larger than that of recess 215. Next, as shown in FIG. 29B, well-known CVD is performed on the conductive film 203 including the recesses 215 and 216.
An insulating film is formed by the method. The insulating film 217 is formed at least above the height of the recesses 215 and 216. After that, polishing is started from the surface of the insulating film 217 by using the chemical mechanical polishing method. Specifically, the wafer is set face down, placed on a turntable bound with a buff cloth, the turntable is rotated, and the insulating film 217 is formed using an abrasive containing, for example, cerium oxide fine particles.
To polish. Alternatively, the wafer is set upward, or the wafer is housed in a carrier and double-sided polished. At this time, as shown in FIG. 29C, the conductive film 2
Since the polysilicon 03 serves as a stopper during polishing and the polishing rate is slowed by the conductive film 203, the polishing step is stopped at this point and all the recesses 215,
216 is completely flattened.

As the conductive film 203, another material such as a silicide film, C (carbon), amorphous silicon, titanium nitride, or the like may be used as long as its surface portion has an effect of acting as a stopper during polishing. It may have a laminated structure.

Further, generally, colloidal silica is widely used as an abrasive, which has a PH (hydrogen ion concentration) of 10 in order to stably disperse silica particles.
It is adjusted to be weakly alkaline in the vicinity, and if the pH changes, a sufficient polishing rate for the insulating film cannot be obtained. On the other hand, in this embodiment, since the polishing agent containing cerium oxide is used, a sufficient polishing rate for the insulating film can be obtained even in the neutral region where PH is around 7. Furthermore, if it is a polishing agent in the neutral region, even if there is a pinhole in the conductive film that acts as a stopper and there is a material such as aluminum wiring that is vulnerable to corrosion underneath, it is necessary to elute that material. Nor.

Further, Table 6 below shows the selection ratio of the polishing rate of each film to the oxide film when the polishing rate of the oxide film as the polishing product is 1.

[0212]

[Table 6] According to Table 1 above, when the insulating film is an oxide film in particular, when the oxide film is polished, a conductive film as a stopper is preferably polysilicon having a selection ratio of 5.7. Also, if the stopper is not a dielectric film, a silicon nitride film having a selection ratio of 2.6 is also suitable. However, polysilicon having a selection ratio of 5 or more is particularly desirable.

Further, when the insulating film is a silicon nitride film in particular, the selection ratio of the polishing rate of polysilicon to the silicon nitride film is about 2.2 when the polishing rate of this silicon nitride film is 1. Therefore, when polishing a silicon nitride film, polysilicon is suitable as a stopper.

The conductive film having the effect of acting as a stopper is preferably as large as the selection ratio with respect to the polishing product, and more preferably a material having a selection ratio of 5 or more.

As described above, the chemical mechanical polishing of the insulating film in the polishing agent containing cerium oxide is suitable even if the conductive film is below the thermal oxide film.

Still another embodiment of the present invention is shown in FIG.
This will be described in detail with reference to (a) to FIG. 30 (c). 30 (a) to 30 (c) are views showing a flattening process of the semiconductor device in the embodiment of the present invention.

As shown in FIG. 30A, a wiring material 222 is formed on a semiconductor substrate or a base substrate 201, and a dielectric film 203 such as polysilicon is formed on the wiring material 222.
Are laminated. Further, a resist 204 is selectively formed on the conductive film 203, and the conductive film 203 and the wiring material 222 are selectively removed using the resist 204 as a mask to form recesses 215 and 216. Recess 215
Is a recess formed between adjacent fine patterns, and the recess 216 has a larger opening width than the recess 215. Next, as shown in FIG. 30B, the recesses 215,
An insulating film 217 is formed over the conductive film 203 including 216 by a known CVD method. The insulating film 217 is formed at least above the height of the recesses 215 and 216. After that, the insulating film 2 is formed by using the chemical mechanical polishing method.
Polishing starts from the surface of 17. Specifically, the wafer is set downward, placed on a turntable bound with a buff cloth, the turntable is rotated, and the insulating film 217 is polished using an abrasive containing, for example, cerium oxide fine particles. Alternatively, set the wafer upwards,
Alternatively, the wafer is stored in a carrier and both sides are polished. At this time, as shown in FIG. 30C, the conductive film 203 is formed.
Polysilicon, which works as a stopper during polishing,
Since the polishing rate of the conductive film 203 becomes slow, the polishing step is stopped at this point and all the recesses 215, 21 are removed.
6 is completely flattened.

As described above, the chemical mechanical polishing of the insulating film in the polishing agent containing cerium oxide is suitable even when the wiring material is under the conductive film.

Another embodiment of the present invention will be described in detail with reference to FIGS. 31 (a) and 31 (b). Figure 31
(A) And 31 (b) is a figure which shows the planarization process of the semiconductor device in another Example.

As shown in FIG. 31A, the wiring portion 222 is selectively formed on the semiconductor substrate or the base substrate 201, and the insulating film heat 223 and the conductive film are formed on the semiconductor substrate 201 including the wiring portion 222. 224 are laminated. Further, the insulating film 225 and the conductive film 224 are selectively removed to form a concave portion 225, and the surface of the wiring portion 222 is exposed. Further, a wiring material 225 such as aluminum is formed on the conductive film 224 having the wiring portion 222 so as to have a depth not less than the depth of the recess 225. After that, polishing is started from the surface of the wiring member 226 by using the chemical mechanical polishing method. Specifically, set the wafer downward, place it on the turntable with the buff cloth tied, and rotate the turntable,
For example, the wiring material 226 is polished with an abrasive containing cerium oxide fine particles. Alternatively, the wafer is set upward, or the wafer is housed in a carrier and double-sided polished. At this time, as shown in FIG. 32A, the conductive film 224 functions as a stopper during polishing, and the conductive film 2
24 and the wiring material 226 are completely flattened. That is, the wiring material 226 remains only inside the recess 225, and the wiring can be formed by embedding.

The conductive film 224 is preferably polysilicon or the like having a function as a stopper.

In this embodiment, the conductive film 224 is laminated on the insulating film 223 and the conductive film 224 is polished as a stopper. However, at least the surface portion of the insulating film 223, that is, the polished portion functions as a stopper. It is not necessary to form the conductive film 224 as long as it has

As described above, the wiring material can also be polished by the chemical mechanical polishing method.

FIG. 32 shows still another embodiment of the present invention.
This will be described in detail with reference to (a) to FIG. 32 (c).

32 (a) to 32 (c) are views showing a flattening process of a semiconductor device in still another embodiment.

As shown in FIG. 32A, a convex step layer, that is, a pattern 231 such as wiring, a semiconductor polycrystal layer, a capacitor and an electrode is formed on a semiconductor substrate or a base substrate 201. Further, the semiconductor substrate 2 having the pattern 231
A first insulating film 232 is formed on 01 and planarized. The wiring portion 234 is selectively formed on the first insulating film 232. Amorphous silicon 2 to be the second insulating film 233 is formed on the first insulating film 232 including the wiring portion 234.
33A is deposited. After this, the amorphous silicon 23
The third insulating film 235 is formed on the 3A at least the wiring portion 234.
Form above the height of. After that, polishing is started from the surface of the third insulating film 235 using the chemical mechanical polishing method. Specifically, the wafer is set downward, placed on a turntable bound with a buff cloth, the turntable is rotated, and the third insulating film 235 is polished using an abrasive containing, for example, cerium oxide fine particles. . Alternatively, the wafer is set upward, or the wafer is housed in a carrier and double-sided polished. Figure 32
At this time, as shown in (b), the amorphous silicon 233A, which is to become the second insulating film 233, acts as a stopper during polishing, and the amorphous silicon 233A and the third insulating film 235 are completely flattened. However, as it is, since the amorphous silicon 233A is conductive, in order to make it amorphous, as shown in FIG.
33 to project.

The amorphous silicon can be formed at a low temperature of 400 ° C. or lower. Therefore, this second insulating film 2
Even when a wiring such as an aluminum wiring exists as the wiring portion 234 under the 33, it is possible to form a film after the wiring is formed, and is suitable for a multi-layer process in which a polysilicon film formed at a high temperature of about 800 ° C. cannot be used. ing. Also, the wiring section 2
The step of forming the second insulating film 233 as a stopper on the step 34 is simple.

Further, in the case where a polysilicon wiring or an electrode is present instead of the wiring portion 234 other than the multi-layer process,
When flattening the insulating film formed to cover the polysilicon wiring and the electrodes, it is not necessary to specifically form a stopper,
The polysilicon wiring and electrodes themselves can be used as stoppers, greatly simplifying the process.

In the flattening step of the semiconductor device in the above-mentioned embodiment, the flattening of the semiconductor device is not carried out by etching back or reflow, so that the flattening can be carried out regardless of the dimensions of the concave portion and the convex portion, and further the oxidation can Since the polishing is performed with the abrasive in the neutral region containing cerium, there is no fear of corrosion of the lower layer during polishing, and the entire surface can be planarized by starting polishing from the convex portion of the insulating film.

By forming an insulating film or the like as a stopper at an arbitrary place where polishing is desired to be stopped, the flattening can be controlled with high accuracy. Therefore, it is possible to achieve almost perfect flattening without leaving unevenness on the polished surface after flattening.
Patterning and the like in the subsequent process can be performed well. For example, in the case of patterning the wiring in the subsequent process, there is no inconvenience such as wiring thinning caused by the difference in the depth of focus during exposure due to the unevenness of the surface. In particular, when applied to the insulating film immediately above the electrode, even if the structure around the electrode becomes more complicated or the step becomes larger in the future, it is possible to eliminate the adverse effect on the subsequent process. Therefore, the interlayer wiring and the interlayer insulating film can be formed better than in the past, and it is possible to sufficiently cope with the formation of wiring in the future, which will be miniaturized.

Further, it can be applied not only to the insulating film but also to the polishing of the wiring material, and the application range is greatly expanded.

Further, effects such as a reduction in manufacturing cost and an increase in product yield can be expected.

Further, since conductive polysilicon, high resistance amorphous silicon, various silicide films, etc. can be used as the stopper, it is also a great merit that an appropriate one can be selected according to the process. .

As described above, even in the neutral region, absolute flattening is possible regardless of the dimensions of the concave and convex portions,
A semiconductor device with high yield and high reliability can be obtained.

Still another embodiment of the present invention will be described with reference to FIGS. 33 (a) to 33 (j). FIG. 33 (a)
33 (j) to 33 (j) are process sectional views showing a process of planarizing the interlayer insulating film.

First, as shown in FIG. 33A, on a Si substrate 201 on which a semiconductor element (not shown) is formed,
A SiO ₂ film 202 having a thickness of 1 μm is formed. Then, a polysilicon film 203 having a thickness of 500 nm is formed on the SiO ₂ film 202.

Next, as shown in FIG. 33 (b), a thickness 100 as a polishing stopper is formed on the polysilicon film 203.
A carbon film 244 of nm thickness is formed. This carbon film 244 is
DC targeting a graphite plate in an Ar atmosphere
It is formed using a magnetron sputtering method. The conditions for forming the carbon film 244 are a pressure of 4 mTorr, an input power of 3.5 W / cm ² , and an Ar flow rate of 40 SCCM. When the structure of the carbon film 244 was examined by X-ray diffraction, the structure was amorphous or microcrystalline. Moreover, in the measurement of the specific resistance of the film by the four-point probe method,
A value of 0.75 Ωcm was obtained.

Next, as shown in FIG. 33C, a photoresist (photosensitive resin layer) 245 having a thickness of 1.5 μm is applied on the carbon film 244. Next, after exposing the photoresist 245 using a mask pattern (not shown), development is performed to remove the exposed portion of the carbon film 244 to form a photoresist pattern 245.

Next, as shown in FIG. 33D, the carbon film is patterned by the RIE method using O ₂ gas with the photoresist pattern 245 as a mask.
Next, as shown in FIG. 33E, the polysilicon film 203 is patterned by the RIE method using CF ₄ gas.

Next, as shown in FIG. 33 (f), CF ₄
After the photoresist pattern 245 is peeled off by a down-flow type ashing apparatus for ashing the photoresist downstream of microwave discharge of a mixed gas of O and O ₂ , as shown in FIG. Then, a SiO ₂ film 246 having a thickness of 1 μm is formed as an interlayer insulating film. here,
An uneven step is formed on the surface of the SiO ₂ film 246 corresponding to the polysilicon wiring 203. In other words, valley-shaped step between the top of the SiO ₂ film 246 of the upper portion of the SiO ₂ film 246 and the adjacent polysilicon wiring 203 of the polysilicon wiring 203 is formed. This step should be flattened by the following steps.

Next, the SiO ₂ film 246 is polished. The results are shown in FIG. 33 (h). This polishing is carried out using an apparatus as shown in the schematic view of FIG.

In FIG. 3, the polishing agent is supplied to the center of the upper surface of the turntable 502 by rotating the polishing supply pipe 503. Turntable 502 is about 100 rpm
Can be rotated with. A polishing cloth 504 is formed on the upper surface of the turntable 502, and the wafer 1 to be polished is placed thereon. The wafer 1 is pressed from above by a load body 501 rotating at about 100 rpm with a load of about 40 kgf.

The abrasive is SiO ₂ particles having a particle diameter of 80 nm suspended in water. The amount of SiO ₂ particles is 20w
Further, the hydrogen ion concentration of the aqueous solution is adjusted to pH 12.0 by adding sodium hydroxide.

As shown in FIG. 33 (h), the surface of the SiO ₂ film 246 and the carbon film 244 thus polished are shown.
Was confirmed to be flat. Also, SiO
_When polishing the ₂ film 244, the polysilicon wiring 2 below the carbon film 244 is formed at any position of the 6-inch wafer.
The polishing of No. 03 was stopped, and the polishing was stopped with a part of the carbon film 244 remaining.

Thereafter, as shown in FIG. 33 (i), the carbon film 244 is peeled off by a barrel type O ₂ plasma ashing apparatus. Next, a SiO ₂ film 2 having a thickness of 1 μm is formed as an interlayer insulating film.
By forming 47, the SiO ₂ film 247 of the flat interlayer insulating film as shown in FIG. 33J is completed. Figure 3
3 (j), the SiO ₂ film 247 of the interlayer insulating film corresponds to the thickness of the carbon film 244 peeled in the step of FIG. 33 (i), unlike the conventional example shown in FIG. 9 (c). It can be seen that the 6-inch wafer is formed substantially flat except for the unevenness.

According to the structure of this embodiment, since the step of forming the carbon film 244 as the stopper is provided via the polysilicon film 203 before the polishing step, the polysilicon film 203 which is the object to be polished, The selectivity of the polishing rate between the SiO ₂ film 246 and the carbon film 244 as the stopper can be made very large, and the polishing can be stopped in the state where a part of the carbon film 244 remains. As a result, the polishing amount can be easily controlled, and the SiO _{2 of the} interlayer insulating film can be controlled.
The film 247 can be formed substantially flat over the entire wafer.

Another embodiment of the present invention will be described with reference to FIGS. 34 (a) to 34 (i). This example relates to thinning of silicon in a thin film semiconductor device.

As shown in FIG. 34A, first, an 800 nm SiO ₂ film 202 is formed on a Si substrate 201. Next, as shown in FIG. 34B, another Si substrate 2
51 on the Si substrate 201 via the SiO ₂ film 202
Heat to 00 ° C and stick.

Next, as shown in FIG. 34C, a hole reaching the surface of the SiO ₂ film 202 is opened in the Si substrate 251.

Next, as shown in FIG. 34 (d). A carbon film 244 as a stopper is formed on the surface of the Si substrate 251 by A
It is formed to have a thickness of 100 nm in a r atmosphere by using a DC magnetron sputtering method with a graphite plate as a target.

Next, as shown in FIG. 34E, a photoresist (photosensitive resin layer) having a thickness of 1.5 μm is applied on the carbon film 244, and a mask pattern (not shown) is used to form a photoresist. Expose the photoresist. Next, development is performed to remove the exposed portion of the carbon film 244, and the Si substrate 251 is removed.
A photoresist pattern 245 in which the photoresist remains is formed only in the hole portion which is opened.

Next, as shown in FIG. 34F, the carbon film 244 is patterned by the RIE method using O ₂ gas with the photoresist pattern 245 as a mask. Next, as shown in FIG. 34 (g), a photoresist pattern 245 is formed by a down-flow type ashing treatment apparatus that ashes the photoresist downstream of microwave discharge of a mixed gas of CF ₄ and O _2. Peel off.

Next, the Si substrate 245 is polished. The result is shown in FIG. This polishing is carried out using an apparatus as shown in the schematic view of FIG. Abrasive has a particle size of 80
The nm of SiO ₂ particles which was suspended in water, SiO ₂
The amount of particles is 20 wt%, and the hydrogen ion concentration of the aqueous solution is adjusted to pH 1 by adding sodium hydroxide.
Adjusted to 2.0.

As shown in FIG. 34 (h), it was confirmed that the surface of the Si substrate 251 thus polished was flat. In addition, in polishing the Si substrate 251, the carbon film 24 is formed at any position of the 6-inch wafer.
The lower SiO ₂ film 202 of No. 4 was not polished, and the polishing was stopped in the state where a part of the carbon film 244 remained. The film thickness of the Si substrate 251 was about 100 nm, which is the same as the carbon film 244.

Thereafter, as shown in FIG. 34 (i), the carbon film 244 is peeled off by a barrel type O ₂ plasma ashing apparatus, and the thinning of silicon in the thin film semiconductor element is completed.

According to the structure of this embodiment, since the step of forming the carbon film 244 as the stopper via the Si substrate 251 and the SiO ₂ film 202 is provided before the polishing step, the Si to be polished is to be polished. The selectivity of the polishing rate between the substrate 203 and the carbon film 244 as the stopper can be made very large, and the polishing can be stopped in the state where a part of the carbon film 244 remains. As a result, the amount of polishing can be easily controlled, and thinning of silicon in the thin film semiconductor element can be performed with high accuracy.

Table 7 shows polishing rates of various films when various polishing agents were used.

[0258]

[Table 7] Note that, in the above-mentioned embodiment described with reference to FIGS. 33 and 34, the SiO ₂ film and Si are described as the non-polishing film,
Further, as an abrasive, SiO ₂ particles having a particle size of 80 nm are suspended in water, and sodium hydroxide is added to adjust the pH.
The description centered on those adjusted to 12.0. However, the present invention is not limited to this, and the object to be polished may be another material as long as the selection ratio of the polishing rate between the carbon film and the object to be polished can be taken. It is also possible to use other hydrogen ion concentration or other chemicals. For example, as shown in Table 7, CeO ₂ suspension may be used as an abrasive.

As described above, according to the present invention, before the step of polishing the layer to be processed, there is a step of forming a carbon film having a very slow polishing rate as a polishing stopper. The selection ratio of the polishing rate with respect to the stopper can be made very large, and as a result, the polishing amount can be easily controlled. Furthermore, since the carbon film is very stable against various chemicals, it can be used regardless of the type of abrasive.

Therefore, a carbon film as a stopper is formed on at least a part of the lower layer, the inner layer, the upper layer, or the adjacent portion of the film to be processed as the layer to be processed, and the layer to be processed is polished. Since the selection ratio of polishing with respect to the object to be polished can be made large regardless of the type of polishing, the amount of polishing can be controlled easily, and obstacles in practical use such as chemical instability are eliminated.

Another embodiment of the present invention will be described in detail below with reference to the drawing.

FIG. 35 is a schematic view of the polishing apparatus used in the present invention.

A polishing cloth 504 is attached to the upper surface of the turntable 502, and a polishing agent 505 is supplied to the center of the polishing cloth 504 through a polishing agent supply pipe 503.

As the polishing agent, a 1 wt% cerium oxide suspension was used.

The wafer 1 to be polished has a diameter of 150 mm.
The surface of the wafer 201 is held by the load body 501 with a 1 μm SiO ₂ film as a layer to be processed by CVD (Chemi).
The film is formed by the cal vapor deposition method. Although not shown in the figure, two load bodies 501 may be provided in this apparatus to process two wafers 1 at the same time.

The turntable 502 has a motor 511.
The motor 511 is connected to an ammeter 513 for measuring the current flowing through the motor. Further, the current value measured by the ammeter 513 is converted into the work amount by the calculator 541, and when the integrated value of the work amount becomes constant, a signal for stopping the polishing is issued.

FIG. 36 shows changes in the polishing rate with time and the amount of current flowing through the motor at that time, using the apparatus shown in FIG.

The polishing rate tends to increase with time, but it is observed that it varies from place to place, and the polishing rate is 30 in total.
The polishing rate has also changed in%. It can also be seen that the amount of current flowing through the motor also changes in a manner that corresponds to the change in polishing rate.

FIG. 37 shows the results of examining the current flowing through the motor and the polishing rate.

From FIG. 37, it was confirmed that there is a one-to-one correlation between the current flowing through the motor and the polishing rate. From this, the polishing rate can be known by measuring the current flowing through the motor, and by integrating this polishing rate with time, the polishing amount up to that time can be known.

Further, FIG. 38 shows that the value of the electric current flowing through the motor is converted into friction between the layer to be processed and the surface plate on which the polishing agent is held, and is arranged.

From FIG. 38, the friction between the layer to be processed and the surface plate on which the polishing agent is held is approximately proportional to the polishing rate.

Further, FIG. 39 shows the results of examining the polishing rate when the rotational speeds of the turntable 502 and the load 501 are changed.

From FIG. 39, it was confirmed that there is a proportional relationship between the rotation speed of the turntable 502 and the load 501 and the polishing speed.

Further, as a matter of course, it has been confirmed by another experiment that there is a proportional relationship between the polishing time and the polishing amount.

Then, the work amount between the layer to be processed and the surface plate holding the polishing agent, which is obtained by multiplying the friction in FIG. 38 by the relative speed of the turntable 502 and the load body 501 and integrating over time, is It can be said that there is a proportional relationship with the polishing amount obtained by integrating the polishing rate with time.

In fact, using the apparatus shown in FIG. 35, the work done between the layer to be processed and the surface plate on which the abrasive is held is 4
It was set to 5000 J and the SiO ₂ film of 0.60 μm was tried to be removed by polishing, but 120 wafers were processed and the polishing amount was 0.59 μm to 0.62 μm, and the variation was 5% or less. .

[0278] Further, although also examined SiO ₂ film containing SiO ₂ film or a boron and phosphorus containing fluorine, in the case of SiO ₂ film containing fluorine is exactly the same result as in the above embodiment, In the case of the SiO ₂ film containing boron and phosphorus, the polishing amount per unit work is 3 times that in the above-mentioned embodiment.
A relatively quick result was obtained.

According to the constitution of the present invention, the layer S to be processed is
The work amount performed between the io ₂ film and the surface plate holding cerium oxide as the polishing agent is integrated, and when the integrated work amount reaches a predetermined amount, the polishing is terminated to obtain SiO 2. _It was possible to control the polishing amount of the _two films with high precision.

In the above embodiment, the layer to be processed is S
Although the case of using cerium oxide as the iO ₂ film and the polishing agent has been described, the material to be processed and the polishing agent may be other materials.

The structure of the polishing apparatus is not limited to that described in the embodiments.

Further, in the embodiment, the layer to be processed is SiO 2.
₂ I described the case where there is a proportional relationship between the work done between the film and the surface plate that holds the cerium oxide abrasive, but even if there is no perfect proportional relationship, the work layer and the abrasive The amount of polishing can be known during polishing if the friction between the held surface plates of 1 corresponds to the polishing rate in a one-to-one manner.

Further, as described above, even when the friction between the layer to be processed and the platen holding the polishing agent and the polishing rate are not in a proportional relation, the layer to be processed and the platen holding the polishing agent are not proportional to each other. If there is a one-to-one correlation between the friction between them or the current flowing through the motor and the polishing rate, the polishing rate can be known by measuring the current flowing through the friction or the motor. When integrated over time,
The amount of polishing up to that time can be known.

As described above, according to this embodiment, in the method of manufacturing a semiconductor device in which the layer to be processed formed on the semiconductor substrate is polished, the layer between the layer to be processed and the surface plate holding the abrasive is held. When the polishing rate of the layer to be processed is calculated based on this friction during polishing, the polishing rate up to that point can be known by integrating this polishing rate with time. The polishing amount can be controlled with high precision.

Another embodiment of the present invention will be described below with reference to FIG.
0, FIG. 41, FIG. 42, and FIG. 43.

FIG. 40 is a perspective view of the flattening apparatus of the present invention, which is supplied to the polishing surface 504 on the turntable 502. The semiconductor wafer 201 is polished by the polishing agent 505.
The shafts 517 and 518 for rotating the bottom of the turntable 502 and the wafer support 501 are attached to the shafts 517 and 51.
8 distortion is detected. Strain sensors 551 and 552 such as strain gauges are installed. Further shaft 51
7, 518 are through the belts 519, 520 and the motor 5
It is connected to 11,512. Motor 511,51
Between the polishing surface 504 and the wafer 20
The load generated by the friction of No. 1 strains the shafts 517 and 518, and the strain sensor 551 using a strain gauge or the like.
The distortion amount 552 is converted into an electric signal. As shown in FIG. 41, the load due to polishing, the distortion of the shaft, and the electric signal due to these have a linear relationship. As a result, the signals output from the strain sensors 551 and 552 adequately convey the state of the polishing surface 504 and the surface of the wafer 201. Therefore, when polishing the uneven surface formed by the wiring layer 210 and the insulating layer 212 on the surface of the wafer 201 as shown in FIG. 42, the polishing area of the insulating layer 212, which is the portion to be polished, is reliably detected in this embodiment. Then, the polished surface 1 as shown in FIG.
Information can be transmitted when 4 is completely flattened.

As another embodiment of the present invention, the strain sensor may be installed on either one of the turntable 502 side and the wafer holding device side, and the motors 511, 51.
The two may be directly connected without using the belts 519 and 520. In addition, the portion to be polished is not limited to the insulating layer 212, and the wiring layer 210 may be the portion to be polished.

The present embodiment has the following effects.

The turn table 502 of the flattening apparatus, the strain sensor 551, and the shaft for rotating the wafer supporting apparatus are attached to the strain sensor 551.
By a simple operation of just attaching 552, 1) more accurate complete flattening can be realized.

2) Since the complete flattening of the insulating layer is detected as information before the polished wiring reaches the wiring, the wiring layer is not affected and the reliability of the wiring layer is high.

3) For the same reason as the above 2), disconnection of the wiring layer can be prevented and a high yield can be obtained.

4) It is not necessary to install a hard material layer below the layer to be polished to stop polishing, an extra process is eliminated, and the productivity and cost of the semiconductor integrated circuit can be improved.

Since there is no need for a harder material layer, it is not necessary to further stack an insulating layer after planarization.

A further embodiment of the present invention will be described below with reference to the drawings.

FIG. 44 is a schematic view showing a polishing section in the polishing apparatus according to the embodiment of the present invention. The turntable 502 is a first drive motor (not shown in FIG.
1) is formed so as to be rotatable. A polishing non-woven fabric 504, which is a polishing cloth, is provided on the table 502, and an abrasive agent supply nozzle (not shown) (503 in FIG. 40) is provided on the non-woven fabric.
A holding part 501 for holding a wafer is provided above the non-woven fabric.
The friction measuring wafer 601 is held on the lower surface of the holding portion 501, that is, the surface facing the upper surface of the table 502. The holding part 501
One end of the rotation shaft is provided on the upper surface of the second drive motor (not shown in the figure).
12), the holding portion 501 is formed to be rotatable. The rotations of the table 502 and the holding unit 501 are controlled by the control unit 611 via the first and second drive motors. As shown in FIG. 45, the control unit 611 includes a polishing condition setting unit,
It is composed of an F / F ₀ (to be described later) calculation section and a polishing condition resetting section.

In the above structure, first, an object to be polished for measuring friction, for example, a semiconductor wafer 60 for friction measurement.
1 is prepared. The friction measuring wafer 601 has a silicon oxide film formed on the surface of a silicon substrate, and the silicon oxide film is not patterned and is formed sufficiently thick. The friction measuring wafer 601 is attached to the lower surface of the holding unit 501. The table 502 is rotated by the first drive motor, and the holding portion 501 is rotated by the second drive motor. The rotation speed at this time is the first rotation speed. The first rotation speed corresponds to the relative speed of the nonwoven fabric rotating together with the table 502 with respect to the friction measurement wafer 601.

Thereafter, an abrasive 505, for example, a suspension 505 of cerium oxide, is supplied from the abrasive supply nozzle onto the non-woven fabric 504 as shown. This non-woven fabric has a function of holding the suspension 505 of cerium oxide and smoothly discharging it. Next, the holding unit 501 is moved downward by a movement control unit (not shown), so that the friction measuring wafer 601 is brought into contact with the nonwoven fabric on the table 502. At this time, a first load is applied to the friction measuring wafer 601. After this,
The holder 501 is moved in a direction parallel to the upper surface of the table 502, that is, in the horizontal direction, and the friction measuring wafer 601 is polished for a first polishing time. That is, the friction measurement wafer 601 has the above first polishing condition,
That is, polishing is performed with the first load, the first polishing time, and the first rotation speed.

During the polishing, the control section 611 shown in FIG. 45.
In the polishing condition setting section, the current values flowing in the first and second drive motors are measured. This current value was measured in the operation stage. This operating stage is the one except the initial stage of using the nonwoven fabric. That is, in the initial stage of using the non-woven fabric, the abrasive 505 is significantly clogged in the non-woven fabric, so that the friction of the contact surface between the non-woven fabric and the object to be polished sharply increases, and thereafter, the change in the friction decreases. , Will be in a stable state. This state is the operating stage.

Next, there is a predetermined relationship between the current value and the friction F _{0 on} the contact surface between the non-woven fabric and the friction measuring wafer 601. From this current value, the friction F ₀ is calculated by a predetermined calculation. To be done. Next, there is a predetermined relationship between this friction F ₀ and the polishing rate at which the friction measuring wafer 601 is polished, and the polishing rate is calculated from this friction F ₀ by a predetermined calculation. That is, since a correlation as shown in FIG. 46 is established between the current value and the polishing rate, the polishing rate can be calculated from this current value.

FIG. 46 is a diagram showing the relationship between the drive motor current value and the polishing rate. A friction measuring wafer 601 having a silicon oxide film formed on its surface is prepared, and the friction measuring wafer 601 is polished as described above. At this time, the current value flowing through the first and second drive motors and the polishing rate at this current value were measured. The curve in FIG. 46 is a characteristic curve showing the relationship between the current value and the polishing rate. From this, it can be seen that there is a correlation between the current value and the polishing rate, that is, there is a one-to-one correspondence.

After that, the rotations of the table 502 and the holding member 501 are stopped, and the holding member 50 is rotated.
1, the friction measuring wafer 601 is replaced with the semiconductor device manufacturing wafer 602. Next, the second polishing conditions for polishing the silicon oxide film on the semiconductor device manufacturing wafer 602, that is, the second load, the second polishing time, and the second rotation speed are set based on the polishing rate. . Thereafter, the table 502 and the holding member 501 are rotated at a second rotation speed by the first and second drive motors, respectively, and a second load is applied to the semiconductor device manufacturing wafer 602. As a result, the semiconductor device manufacturing wafer 602 is polished for the second polishing time.

Next, by polishing a plurality of semiconductor device manufacturing wafers 602 under the second polishing conditions, the table 502 and the holding portion 501 are rotated after the nonwoven fabric has been used for a predetermined time. Be stopped. Next, in the holding part 501, the semiconductor device manufacturing wafer 602 is replaced with the friction measuring wafer 601. Thereafter, the table 502 and the holding unit 501 are rotated at the first rotation speed by the first and second drive motors, respectively, and the friction measurement wafer 60 is rotated.
A first load is applied to 1. As a result, the friction measuring wafer 601 is polished for the first polishing time.

At the time of polishing, the control unit 611 shown in FIG. 45.
In the F / F ₀ calculation unit in, the current value flowing through the first and second drive motors is measured. From this current value, the friction F at the contact surface between the friction measuring wafer 601 and the nonwoven fabric is calculated by a predetermined calculation, and the value of F / F ₀ is calculated from this friction F and the friction F ₀ .

Thereafter, when the value of F / F ₀ is larger than 0.9 and smaller than 1.1, the control unit 6 shown in FIG.
In the section 11 for resetting the polishing condition, in order to keep the polishing amount constant, the third polishing condition, that is, the third load, the third polishing condition, so that the polishing rate becomes the same as the polishing rate under the second polishing condition. Polishing time and third rotation speed are calculated from the F / F ₀ value. Next, the rotation of each of the table 502 and the holding unit 501 is stopped. Next, in the holding part 501, the wafer for friction measurement 601 is replaced with the wafer for semiconductor device manufacturing 602. On this occasion,
The third polishing conditions are reset. That is, the table 5 is driven by each of the first and second drive motors.
02 and the holding portion 501 are rotated at a third rotation speed, and a third load is applied to the semiconductor device manufacturing wafer 602. As a result, the semiconductor device manufacturing wafer 601 is polished for the third time.

When the value of F / F ₀ is 0.9 or less or 1.1 or more, a treatment for regenerating the non-woven fabric, for example, the non-woven fabric is subjected to dressing, seasoning, washing and the like. This dressing means removing excess abrasive 505 accumulated on the non-woven fabric, that is, abrasive 505 clogging the non-woven fabric with a brush. This dressing can improve the condition of the nonwoven fabric. Next, the friction measuring wafer 601 is polished under the first condition. During this polishing, the F / F ₀ calculation unit shown in FIG. 45 calculates the F / F ₀ value as described above.

Thereafter, when the value of F / F ₀ is 0.9 or less or 1.1 or more, the treatment for regenerating the non-woven fabric is performed again. When the value of F / F ₀ is larger than 0.9 and smaller than 1.1, in the polishing condition resetting portion shown in FIG. 45, in order to keep the polishing amount constant, the polishing under the second polishing condition is performed. The third polishing condition is calculated from the F / F ₀ value so that the polishing rate is the same as the polishing rate. Next, the rotation of each of the table 502 and the holding unit 501 is stopped. Next, in the holding part 501, the wafer for friction measurement 601 is replaced with the wafer for semiconductor device manufacturing 602. Then, the third polishing condition is set again.

Next, the plurality of semiconductor device manufacturing wafers 602 are polished under the third polishing condition, whereby the table 502 and the holding portion 501 are rotated after the non-woven fabric is used for a predetermined time. Be stopped. After that, in the holding portion 501, the semiconductor device manufacturing wafer 602 to the friction measuring wafer 601 are transferred.
And the friction measuring wafer 601 is polished under the first polishing condition.

During the polishing, the value of F / F ₀ is calculated as described above in the F / F ₀ calculation unit shown in FIG. After that, as described above, it is determined from the value of F / F ₀ whether the treatment for regenerating the non-woven fabric is performed or the polishing condition is reset.

Thereafter, the above steps are repeated. Further, even if a treatment for regenerating the non-woven fabric is performed, if the F / F ₀ value is 0.9 or less or 1.1 or more, it is considered that the non-woven fabric has reached the end of its life. Therefore, the nonwoven fabric is replaced.

FIG. 47 is a diagram showing the relationship between the total use time of the nonwoven fabric, the polishing rate and the polishing amount. That is, in the above example, the friction of the contact surface between the friction measuring wafer 601 and the non-woven fabric was monitored by measuring the current values flowing through the first and second drive motors during polishing. That is, the current value of the drive motor in the passage of the total use time of the nonwoven fabric was measured, the friction of the contact surface between the friction measuring wafer 601 and the nonwoven fabric was calculated from this current value, and the polishing rate was calculated from this friction. It is a thing. The solid line curve in FIG. 47 shows the relationship between the total use time of the nonwoven fabric and the polishing rate. The dotted curve is
It shows the relationship between the total use time of the non-woven fabric and the polishing amount. The stage where the total use time of the non-woven fabric is within 50 minutes is the initial stage of use, and the stage where the total use time of the non-woven fabric is 50 minutes or more is the operating stage.

On the other hand, FIG. 48 is a diagram showing the relationship between the total use time of the nonwoven fabric, the drive motor current value, and the polishing rate when the conventional polishing method is used. The dotted curve shows the relationship between the total usage time of the nonwoven fabric and the drive motor current value. The solid line curve shows the relationship between the total use time of the nonwoven fabric and the polishing rate.

From the above FIG. 47 and FIG. 48, the conventional polishing method cannot keep the polishing rate constant even after entering the operating stage. However, when the polishing method of the present invention is used, the polishing rate can be maintained during the operating stage. It can be seen that it can be held almost constant. At the same time, it can be seen that the polishing amount can be kept constant in the operation stage.

According to the above-described embodiment, the F / F ₀ computing unit of the control unit 14 periodically measures the current value flowing in the first and second drive motors, and the friction value is measured from this current value. The friction F at the contact surface between the wafer 601 and the nonwoven fabric is calculated by a predetermined calculation, and the value of F / F ₀ is calculated from this friction F. The surface condition of the nonwoven fabric can be evaluated by the value of F / F ₀ . When the surface condition is bad, that is, when the value of F / F ₀ is 0.9 or less or 1.1 or more, the nonwoven fabric is treated by regenerating the nonwoven fabric, that is, dressing, seasoning, washing and the like. In addition, the abrasive 505 that is clogged more than necessary can be removed. As a result, the surface condition of the nonwoven fabric can be improved. Thereafter, the re-seeking the value of the F / F ₀ in the surface condition, reconfigure the combined polishing conditions on the surface condition from the value of the F / F _0. Further, when the surface condition is good, that is, when the value of F / F ₀ is larger than 0.9 and smaller than 1.1, this F
The polishing conditions are reset from the value of / F ₀ . Further, since the surface condition is not good, if the surface condition is not improved even after the dressing, seasoning, washing, etc. of the nonwoven fabric, the nonwoven fabric is replaced because it has reached the end of its life. Therefore, the surface condition of the non-woven fabric can be evaluated from the value of F / F ₀ to determine an appropriate dressing time and a non-woven fabric life time. Therefore, the polishing rate of the object to be polished can be kept constant. As a result, the polishing amount on the semiconductor device manufacturing wafer can be accurately controlled.

When polishing a semiconductor device manufacturing wafer, if it is desired to finish the planarization before lower layers of different materials are exposed on the surface, the polishing method of the present invention is particularly effective.

The polishing apparatus and the polishing method of the present invention are not limited to the above-mentioned embodiment, but by knowing the relationship between the drive motor current value corresponding to friction and the polishing rate as shown in FIG. Various changes can be made to the polishing agent and the object to be polished. For example, colloidal silica can be used as the polishing agent, and polysilicon can be used as the object to be polished.

Further, the means for knowing the friction may be based on the current value of the drive motor, or may be another method.

Further, in the above embodiment, the non-woven fabric is provided on the table 502. However, another non-woven fabric may be used instead of the non-woven fabric as long as it holds the abrasive.

Further, the wafer 601 for friction measurement is regularly used.
The current values flowing through the first and second drive motors during polishing are measured, and the changes in the current values determine the time to perform the process for regenerating the non-woven fabric and the time to replace the non-woven fabric. However, without using the friction measurement wafer 601, the current values flowing through the first and second drive motors during polishing of the semiconductor device manufacturing wafer 602 are constantly measured, and It is also possible to determine when to perform the process for regenerating the nonwoven fabric and when to replace the nonwoven fabric.

As described above, according to this embodiment,
The first friction between the surface to be polished and the surface to be polished is measured, the second friction after a predetermined time has passed, and the value of the ratio between the first friction and the second friction is calculated. There is. Therefore,
It is possible to accurately control the polishing amount of the object to be polished.

An embodiment of the present invention will be described below with reference to FIGS. 49 to 51.

FIG. 49 is a schematic diagram showing polishing by the polishing apparatus. A polishing pad 504 having a polishing surface is a lathe 50.
2, a holding portion 501 for holding the wafer 201, which is the object to be polished, is provided at a position facing the polishing surface. A liquid supply nozzle 503 is provided in the vicinity of the holder 501, and the polishing agent 505 is supplied from the liquid supply nozzle 503.

In the polishing apparatus having the above structure, first, the lower surface of the holding section 501, that is, the polishing pad 50.
An object to be polished 201, for example, a wafer having a silicon oxide film on its surface is held on the surface facing the upper surface of 4. Then, a polishing agent 505, for example, a suspension of cerium oxide is supplied from the liquid supply nozzle 503 onto the polishing pad 504.
Thereafter, pressure is applied between the wafer and the polishing surface, and the wafer and the polishing surface are slid to polish the wafer.

FIG. 50 is a schematic diagram showing the reclaiming process for the polished surface in the example of the present invention. After the wafer has been polished for a predetermined time, a surfactant 701, for example, a polycarboxylic acid-based anionic surfactant is supplied from the liquid supply nozzle 503 onto the polishing pad 504 as a regeneration treatment of the polishing surface, and further physical treatment is performed. The polishing agent 505 clogging the polishing surface is removed by rubbing the surface of the polishing pad with a cleaning unit 703 having a brush 702 at the tip. Then, pure water 704 is supplied from the liquid supply nozzle 503 onto the polishing pad 504, and the surfactant 701 is removed.

After that, the above steps are repeated.

FIG. 51 is a diagram showing the change with time of the polishing rate according to the present invention. In addition to the above-mentioned method of reclaiming the polishing surface, that is, regenerating means by the conventional brush 702 or the like, by using means for supplying the surfactant 701 onto the polishing pad 504, the effect of removing the polishing agent 505 is greatly enhanced. be able to. Therefore, the change in the surface state of the polishing surface due to the clogging of the polishing agent 505, which cannot be prevented by the conventional method, can be suppressed, and thus the deterioration of the ability of the polishing surface to hold the polishing agent 505 can be suppressed. Can be suppressed. As a result, as shown in FIG. 13, it is possible to suppress the change with time in the polishing rate, which has occurred in the conventional technique.

The method for reclaiming the polished surface of the present invention is not limited to the above-mentioned embodiment, and any means for regenerating the surface may be used as long as it includes a means for using the surfactant 701. Good. That is, the means for regeneration other than the means using the surfactant 701 is not limited, the presence or absence of the means for removing the surfactant 701 with pure water shown in the above examples is not limited, and the surface activity is not limited. Agent 7
Even when 01 is removed, it is not limited to pure water 704. Further, there is no limitation on the time when the polishing surface is regenerated. For example, polishing of the object to be polished and regeneration of the polished surface may be performed simultaneously.

Further, the surfactant 701 is not limited to the polycarboxylic acid type anionic surfactant, and each of the lipophilic group, hydrophilic group and counterion constituting the surfactant 701 can be variously changed. Is. Further, the polishing agent 505 and the object to be polished 201 are not limited respectively.

As described in detail above, according to the method of the present invention, the polishing agent clogging the polishing surface can be easily removed. As a result, the deterioration of the polishing surface due to the clogging of the polishing agent can be prevented, so that the change of the polishing rate with time can be suppressed and the occurrence of scratches on the surface of the object to be polished and the deterioration of flatness can be prevented. You can Therefore, the quality of the surface to be polished can be maintained constant. Also,
Running cost can be reduced by extending the life of the polishing pad. Further, the continuous replacement of the polishing pad does not depend on the constant observation of the expert.

[0329]

As described above, according to the present invention,
It is possible to control the polishing amount of the layer to be processed with high accuracy, and thus it is possible to perform highly accurate flattening.

[Brief description of drawings]

FIG. 1 is a diagram showing a conventional manufacturing process of a semiconductor device.

FIG. 2 is a diagram showing another conventional manufacturing process.

FIG. 3 is a schematic view of a conventional polishing apparatus.

4 is a diagram showing a relationship between a polishing time and a polishing distance by the polishing apparatus of FIG.

FIG. 5 is a diagram showing another conventional manufacturing process.

FIG. 6 is a diagram showing a relationship between a polishing time and a polishing distance.

FIG. 7 is a diagram showing another conventional manufacturing process.

FIG. 8 is a diagram showing still another conventional manufacturing process.

FIG. 9 is a view showing still another conventional manufacturing process.

FIG. 10 is a view showing still another conventional manufacturing process.

FIG. 11 is a view showing still another conventional manufacturing process.

FIG. 12 is a view showing still another conventional manufacturing process.

FIG. 13 is a cross-sectional view of a polishing surface containing an abrasive.

FIG. 14 is a schematic view of a conventional polishing apparatus.

15 is a diagram showing a relationship between a power supply voltage and a motor current in the polishing apparatus of FIG.

16 is a diagram showing the relationship between load and motor current in the polishing apparatus of FIG.

FIG. 17 is a diagram showing the relationship between the total usage time of the polishing cloth and the polishing rate.

FIG. 18 is a diagram showing the relationship between polishing time and polishing rate.

FIG. 19 is a view showing a manufacturing process of the semiconductor device according to the embodiment of the invention.

FIG. 20 is a view showing a manufacturing process of another semiconductor device according to the embodiment of the invention.

FIG. 21 is a view showing a manufacturing process of another semiconductor device according to the embodiment of the invention.

FIG. 22 is a diagram showing the relationship between polishing time and polishing distance.

FIG. 23 is a diagram showing the relationship between polishing time and polishing distance.

FIG. 24 is a diagram showing the relationship between polishing time and polishing distance.

FIG. 25 is a view showing the relationship between polishing time and polishing distance.

FIG. 26 is a view showing the relationship between polishing time and polishing distance.

FIG. 27 is a diagram showing the relationship between polishing time and polishing distance.

FIG. 28 is a sectional view of a semiconductor device according to an example of the present invention.

FIG. 29 is a diagram showing the manufacturing process of the semiconductor device in FIG. 29;

FIG. 30 is a view showing a manufacturing process of a semiconductor device according to another embodiment of the present invention.

FIG. 31 is a diagram showing a manufacturing process of a semiconductor device according to another embodiment of the invention.

FIG. 32 is a view showing a manufacturing process of a semiconductor device according to another embodiment of the present invention.

FIG. 33 is a view showing a manufacturing process of a semiconductor device according to another embodiment of the present invention.

FIG. 34 is a view showing a manufacturing process of a semiconductor device according to another embodiment of the present invention.

FIG. 35 is a diagram showing a polishing apparatus according to an embodiment of the present invention.

FIG. 36 is a view showing the relationship between polishing time and polishing rate.

FIG. 37 is a diagram showing a relationship between a motor current and a polishing rate.

FIG. 38 is a view showing a relationship between friction between a turntable and a layer to be processed and a polishing rate.

FIG. 39 is a view showing the relationship between the rotation speed of the turntable and the holding unit and the polishing speed.

FIG. 40 is a diagram showing a polishing apparatus according to an embodiment of the present invention.

41 is a diagram showing a relationship between load and strain in the polishing apparatus shown in FIG.

FIG. 42 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the embodiment of the invention.

FIG. 43 is a cross-sectional view showing the manufacturing process of the semiconductor device according to the example of the invention.

FIG. 44 is a schematic view of a polishing section of a polishing apparatus according to an embodiment of the present invention.

FIG. 45 is a diagram showing a control flow of a control unit of the polishing apparatus of FIG. 44.

FIG. 46 is a diagram showing a relationship between a motor current and a polishing rate.

FIG. 47 is a diagram showing the relationship between the total use time of the polishing cloth, the polishing rate, and the polishing amount in the polishing method of the example of the present invention.

FIG. 48 is a view showing the relationship between the total use time of the polishing cloth, the motor current, and the polishing speed in the conventional polishing method.

FIG. 49 is a schematic view of a polishing apparatus in a polishing step.

FIG. 50 is a schematic view of a polishing apparatus in a process of reclaiming a polished surface.

FIG. 51 is a view showing the relationship between the total usage time of the polishing cloth and the polishing rate.

[Explanation of symbols]

1, 201 ... Si substrate, 202 ... SiO ₂ film, 203 ...
Polysilicon film, 204 ... Photoresist pattern, 2
05 ... SiO ₂ film, 206 ... Al wiring, 207 ... SiO
₂ film, 208 ... Polysilicon film, 210 ... Wiring layer, 21
5, 216 ... Recessed portion, 217 ... Insulating film, 222 ... Wiring portion,
223 ... Insulating film, 224 ... Conductive film, 225 ... Recessed part, 22
6 ... Wiring material, 231, ... Pattern, 232 ... First insulating film, 233 ... Second insulating film, 233A ... Amorphous silicon, 234 ... Wiring part, 235 ... Third insulating film, 24
4 ... Carbon film, 245 ... Photoresist pattern, 246
... SiO ₂ film, 247 ... SiO ₂ film, 251 ... Si substrate, 501 ... Holding portion, 502 ... Turntable, 503
... Abrasive supply pipe, 504 ... Polishing cloth (polishing surface), 505 ... Abrasive, 511, 512 ... Motor, 5
17, 518 ... Shafts 519, 520 ... Belt, 54
Reference numeral 1 ... Operation unit, 551, 552 ... Strain sensor, 601 ... Friction measurement wafer, 602 ... Semiconductor device manufacturing wafer, 611 ... Control unit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiromi Yajima 72 Horikawa-cho, Sachi-ku, Kawasaki-shi, Kanagawa Stock company Toshiba Horikawa-cho factory (72) Inventor Riichiro Aoki 72 Horikawa-cho, Kawasaki-shi, Kanagawa Stock Company Toshiba Horikawacho Factory

Claims (31)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a polishing agent used in a polishing and flattening step of the semiconductor device is one in which the ratio of each element other than the main component is approximately 100 ppm or less. 2. SiO ₂ and H as the main components of the polishing agent
_The method for manufacturing a semiconductor device according to claim 1, wherein the method is ₂ O or CeO ₂ and H ₂ O. 3. As elements other than the main component, Na, Mg,
Al, K, Ca, Ti, Cr, Fe, Ni, Zr, W,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the element is Pb, Th, U or a compound of each element. 4. A step of forming a conductive film on a semiconductor substrate, a step of selectively removing the conductive film to form a recess, and a conductive film having the recess having a height of at least the height of the recess or more. And a step of forming an insulating film on the conductive film, and polishing the insulating film by using an abrasive containing cerium oxide as a stopper to smooth the surface of the conductive film and the insulating film. A method of manufacturing a semiconductor device, comprising: 5. A step of selectively forming a wiring portion on a semiconductor substrate, a step of forming an insulating film on the semiconductor substrate having the wiring portion, and a step of forming a conductive film on the insulating film. Forming a recess for exposing the wiring part by selectively removing the insulating film and the conductive film; and forming a wiring material on the conductive film having the recess at least above the height of the recess. And a polishing step of smoothing the surface of the insulating film and the wiring material by polishing and removing the wiring material with a polishing agent containing cerium oxide using the conductive film as a stopper. A method for manufacturing a characteristic semiconductor device. 6. A step of forming a first insulating film on a semiconductor substrate, a step of selectively forming a wiring portion on the first insulating film, and a wiring portion having the first insulating film. A step of forming an amorphous silicon film, which is to be a second insulating film, on the amorphous silicon film; a step of forming a third insulating film on the amorphous silicon film at least at a height of a wiring portion; As a stopper, a polishing step of smoothing the surface of the third insulating film and the amorphous silicon film by polishing and removing the third insulating film with an abrasive containing cerium oxide, and the amorphous silicon And a step of transforming the film into a second insulating film. 7. The method of manufacturing a semiconductor device according to claim 4, wherein the conductive film used as the stopper is polysilicon, amorphous silicon, titanium nitride, a silicide film or carbon. 8. In a method of manufacturing a semiconductor device for polishing a layer to be processed formed on a semiconductor substrate, friction between the layer to be processed and a surface plate holding an abrasive is measured during polishing, and the friction is measured. Based on the above, the polishing rate of the layer to be processed is calculated, the polishing rate is integrated with time to obtain the polishing amount, and the polishing is terminated when the polishing amount reaches a predetermined amount. Device manufacturing method. 9. In a method of manufacturing a semiconductor device for polishing a layer to be processed formed on a semiconductor substrate, the amount of work performed between the layer to be processed and a surface plate holding an abrasive is integrated, and the integrated amount is calculated. A method of manufacturing a semiconductor device, wherein polishing is terminated when the amount of work performed reaches a predetermined amount. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the friction or the amount of work is obtained by measuring the amount of work of a prime mover that drives the surface plate. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the prime mover is an electric motor, and the work of the prime mover is obtained by measuring a current flowing through the electric motor. 12. The method for manufacturing a semiconductor device according to claim 8, wherein the layer to be processed contains SiO ₂ as a main component, and the polishing agent contains cerium oxide as a main component. 13. A means for polishing a layer to be processed formed on a semiconductor substrate, and a means for measuring a friction between the layer to be processed and a surface plate holding an abrasive during polishing to obtain a polishing amount. A polishing apparatus for a semiconductor device, comprising: 14. A unit for polishing a layer to be processed formed on a semiconductor substrate, and a unit for measuring and integrating the amount of work performed between the layer to be processed and a surface plate holding an abrasive. A polishing apparatus for a semiconductor device, comprising: 15. The polishing apparatus for a semiconductor device according to claim 13, wherein the friction or the amount of work is obtained by measuring the amount of work of a prime mover that drives the surface plate. 16. The polishing apparatus for a semiconductor device according to claim 15, wherein the prime mover is an electric motor, and the work of the prime mover is obtained by measuring a current flowing through the electric motor. 17. The polishing apparatus for a semiconductor device according to claim 13, wherein the layer to be processed has SiO ₂ as a main component, and the polishing agent has cerium oxide as a main component. . 18. A polishing apparatus comprising: a means for polishing and flattening a semiconductor wafer; and a means for detecting an absolute value of a polishing load amount on a wafer polishing surface. 19. The polishing apparatus according to claim 18, wherein the absolute value of the polishing load amount is detected based on the strain amount of the rotary shaft of the polishing surface. 20. The polishing apparatus according to claim 19, wherein the strain amount of the rotating shaft is converted into an electric signal by a strain sensor. 21. A polishing surface is provided on a table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, and between the holding portion and the table. When polishing the object to be polished by sliding the polishing surface and the surface to be polished by applying a pressure, while measuring the first friction between the polishing surface and the surface to be polished, a predetermined time First means for measuring a second friction between the abraded surface and the abraded surface after elapse, and an arithmetic unit for calculating a value of comparison between the first friction and the second friction A second means for determining a time for performing a process for regeneration on the polishing surface from the value of the ratio, and a polishing apparatus. 22. A polishing surface is provided on a table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, and between the holding portion and the table. When polishing the object to be polished by sliding the polishing surface and the surface to be polished by applying a pressure, while measuring the first friction between the polishing surface and the surface to be polished, and for a predetermined time First means for measuring a second friction between the abraded surface and the abraded surface after the elapse, and an arithmetic unit for calculating a value of a ratio of the first friction and the second friction A second means for determining the time to replace the polishing surface from the value of the ratio, and the polishing apparatus. 23. A polishing surface is provided on a table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, and between the holding portion and the table. When the object to be polished is polished by sliding the polishing surface and the surface-to-be-polished with pressure, the first friction between the surface-to-be-polished and the surface-to-be-polished is set, and the predetermined time is maintained. First means for measuring a second friction between the abraded surface and the abraded surface after the elapse, and an arithmetic unit for calculating a value of a ratio of the first friction and the second friction A second means for determining a time to perform a treatment for regeneration on the polishing surface from the value of the ratio, and a third means for determining a time to replace the polishing surface from the value of the ratio. A polishing device characterized by: 24. A step of providing a polishing surface on a table and holding an object to be polished having a surface to be polished on a holding portion provided at a position facing the polishing surface; and rotating the table and the holding portion. Polishing the object to be polished by supplying a polishing agent onto the polishing surface and applying pressure between the holding portion and the table to slide the surface to be polished and the surface to be polished. And a step of measuring a first friction between the polishing surface and the surface to be polished, a second friction between the polishing surface and the surface to be polished after a predetermined time has elapsed, Calculating the value of the ratio of the first friction and the second friction, and determining the value of the ratio from the time of performing the regeneration treatment on the polishing surface and the time of exchanging the polishing surface And a step of judging one of them, and Polishing method. 25. A polishing surface is provided on a table, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, and between the holding portion and the table. When the object to be polished is polished under the first polishing condition by sliding the polishing surface and the surface to be polished by applying pressure, the first friction between the polishing surface and the surface to be polished is reduced. Along with the measurement, a means for measuring the second friction between the polished surface and the surface to be polished after a lapse of a predetermined time, and the value of the ratio between the first friction and the second friction is calculated, A polishing unit comprising: a calculation unit that calculates a second polishing condition that provides the same polishing amount as the first friction amount from the value of this ratio. 26. A step of providing a polishing surface on a table, and holding an object to be polished having a surface to be polished on a holding portion provided at a position facing the polishing surface; and rotating the table and the holding portion. A step of supplying an abrasive to the polishing surface, applying pressure between the holding part and the table, and sliding the polishing surface and the polishing surface to move the polishing object to a first position. A step of polishing under the first polishing condition; a step of measuring a first friction between the polishing surface and the surface to be polished; a second step between the polishing surface and the surface to be polished after a predetermined time has elapsed. A step of measuring friction, a step of calculating a value of a ratio between the first friction and the second friction, and a second amount of polishing which is the same as a polishing amount by the first friction from the value of the ratio And a step of calculating polishing conditions of Polishing method that. 27. The polishing apparatus according to claim 25, wherein the first polishing condition is at least one of a polishing time, a polishing pressure and a rotation speed. 28. The polishing apparatus according to claim 25, wherein the second polishing condition is at least one of a polishing time, a pressure during polishing, and a rotation speed during polishing. 29. The polishing apparatus according to claim 26, wherein the first polishing condition is at least one of a polishing time, a pressure during polishing, and a rotation speed during polishing. 30. The polishing apparatus according to claim 26, wherein the second polishing condition is at least one of a polishing time, a pressure during polishing, and a rotation speed during polishing. 31. A polishing surface is provided on a base plate, and an object to be polished having a surface to be polished is held by a holding portion provided at a position facing the polishing surface, and the polishing surface and the surface to be polished. In a polishing apparatus for polishing the object to be polished by supplying an abrasive between the polishing surface and applying a pressure between the polishing surface and the surface to be polished to slide the polishing surface and the surface to be polished. A method for reclaiming a polished surface, which comprises supplying a surfactant to the polished surface.