JPH06216078A - Equipment and method for capacitive coupling discharge processing of wafer - Google Patents

Abstract

PURPOSE: To improve the uniformity and the processing speed of an MERIE device and a PECVD device by arranging the first electrode, to which a wafer is coupled, and arranging the second electrode having the specified geometric pattern for changing the processing speed with respect to the region on the wafer. CONSTITUTION: A profile setting electrode 10 receives the RF electric power from both a low-frequency source or a high-frequency source. A metal cylinder ring 22 is arranged so as to surround the profile setting electrode 10 so as to change the asymmetry of discharge. The ring changes the ion energy applied on a wafer 14. Furthermore, the ring 22 decreases the loss of electrons in the radius direction and is effective for increasing plasma density. In order to block the generation of the plasma not in uniform, the effective plasma volume can be adjusted on the respective points on the wafer by adequately settling the profile of the electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to the field of semiconductor processing, and more particularly, the present invention relates to a capacitively coupled wafer discharge processing apparatus and method.

[0002]

BACKGROUND OF THE INVENTION Capacitively coupled discharges are commonly used in semiconductor processing. The standard configuration consists of two planar, parallel electrodes or two coaxial cylindrical electrodes. Either or both of these electrodes may be exposed to a radio frequency (R
F) It is bound to the source. The wafer to be processed is placed on either electrode. In another electrode configuration, the RF-powered electrode is a tube placed perpendicular to the installed planar electrode and the process gas is introduced through this tubular electrode.

One device using such an arrangement is a magnetically enhanced reactive ion etching (MERI).
E) A device. In the standard parallel plate electrode configuration,
The effective plasma generation volume is limited by the electrode spacing at every point on the wafer. Therefore, if the plasma generation is not uniform due to the placement of the magnetic field, the processing (etching or deposition) performed will also be uneven. Non-uniformity can also be the result of the process gas not being uniformly introduced into the process chamber or the process gas not being uniformly exhausted from the process chamber. Side effects of plasma non-uniformity include increased gate oxide damage due to non-uniformity of wafer charging. Common solutions include increasing the size of the processing chamber and using movable soft iron slag to modify the magnetic field. Larger processing chambers are not a practical solution as wafer sizes are increasing. Soft iron slag can be used to alter the magnetic field distribution, but the results are not entirely satisfactory.

Plasma-enhanced chemical vapor deposition (PECVD) systems also use the electrode configurations described above and encounter similar process non-uniformity problems. For example, tubular electrodes can increase plasma density to improve processing speed, but the plasma area is not uniform. Therefore, the tubular electrode must be placed away from the wafer in order to achieve uniform processing, which is a compromise with its speed-increasing nature.

[0005]

From the above, MERIE
It has become desirable to provide electrode configurations that improve the uniformity and processing speed of the equipment and PECVD equipment.

[0006]

SUMMARY OF THE INVENTION In accordance with the present invention, a wafer capacitively coupled discharge treatment apparatus and method is provided that substantially eliminates or diminishes the shortcomings and problems associated with conventional apparatus and methods. To do.

One feature of the present invention is that the first electrode to which the wafer is bonded is arranged, and the second electrode is arranged at a predetermined distance from the first electrode. The second electrode has a predetermined geometry for varying the processing rate with respect to the area on the wafer.

Another feature of the present invention is to provide a method for improving the rate of capacitively coupled discharge between two electrodes for treating a wafer. The processing speed for the area on the wafer is first determined. The contours and geometries of the electrodes are then refined to increase the spacing between corresponding areas of the electrodes, thereby increasing the processing speed for selected areas on the wafer. The contours and geometries of the electrodes can be further refined to reduce the spacing between corresponding areas of the electrodes to reduce processing speed for selected areas on the wafer.

Yet another feature of the present invention is that cavities arranged in a predetermined pattern may be formed on the electrodes to locally increase the processing speed.

An important technical advantage of the present invention is that it is
To improve capacitively coupled RF discharge techniques for wafer processing such as etching and deposition. In particular, the uniformity of the magnetically enhanced etching process and the uniformity and processing rate of the plasma enhanced chemical vapor deposition are improved.

[0011]

For a better understanding of the present invention, reference is made to the accompanying drawings. In the accompanying drawings, FIG. 1 shows a particular embodiment of a contour settling electrode constructed generally in accordance with the teachings of the present invention and designated generally by 10. The contour setting electrode 10 is shown in a capacitively coupled discharge treatment chamber or reactor 11. The contour setting electrode 10 faces the chuck 12 on which the wafer 14 is clamped. The processing chamber 11 is further surrounded by a quartz collar 16. The O-ring seal 18 properly isolates the processing chamber 11 from the outside air. The metal base 20 is provided to support the processing chamber 11.

The contour setting electrode 10 can receive RF power from either a low frequency source or a high frequency source (not shown). A metal cylindrical ring 22 is placed around the contour setting electrode 10 to change the asymmetry of the discharge, which changes the energy of the ions impinging on the wafer 14. Further, the ring 22 is effective in reducing electron loss in the radial direction and increasing the plasma density. The use of ring 22 is optional. The contour setting electrode 10 further includes two grounded wire meshes 24 and 26 to prevent the plasma from escaping from the processing chamber 11 via the processing gas inlet / outlet 28. The large entrance / exit 28 is used for
A low operating pressure is provided therein.

In order to prevent the generation of non-uniform plasma, the effective plasma volume can be adjusted on each point on the wafer by appropriate settling of the electrode contours. Furthermore, contouring of one electrode introduces a difference in the ratio of the surface areas of the two electrodes exposed to the plasma. FIG. 1 shows a dome-shaped electrode 10, which effectively increases the plasma volume surrounding the outer region of chamber 11 and increases the processing rate at the outer edge of wafer 14 relative to its central portion. Such electrode contouring is particularly useful for MERIE devices where plasma generation may be very uneven due to the placement of the magnetic field.

The particular contour of contour settling electrode 10 depends on the non-uniformity of the placement or processing of the magnetic field to be corrected.
For a MERIE discharge in which the magnetic field is parallel to the surface of the wafer 14, the dome-shaped design shown in FIG. 1 is most effective in correcting the non-uniformity. In MERIE systems, the magnet assembly is often rotated to block the effects of plasma ExB drift. If a planar counter electrode is used in such an arrangement, the processing speed at the center of the wafer will be much higher than at the edge of the wafer. The dome-shaped contour of the electrode 10 thus effectively prevents non-uniformity of the processing speed on the wafer.

Since the electrode profile is designed according to the non-uniformity of the particular processing method or application, the electrode profile effectively modifies the processing rate on the surface of the wafer to produce the desired result. Properly formatted to achieve. For example, in FIG.
Shown is another example contour setting electrode 30, which introduces a larger plasma volume change into the processing chamber 11. A recessed ring 32 is located within the contour setting electrode 30 to provide an increased plasma volume within that area. The contour settling electrode constructed in this way has a custom designed contour to prevent non-uniformities in processing speed depending on the application and method of processing. Further, contour setting electrodes can be used, if desired, to introduce process speed variations into wafer processing. In the drawings, the same numbers refer to the same elements, and the description thereof will not be repeated.

In FIGS. 4 and 5, the idea of the contour setting electrode is taken one step further. It is known in semiconductor processing technology that cavities or holes in the electrodes that receive RF power locally enhance the plasma. This phenomenon is
Usually called the hollow cathode effect. The hollow cathode effect occurs when any two equipotential surfaces face each other. These faces can be walls of cavities facing each other or planar electrodes. The hollow cathode effect is known in the art as an undesirable phenomenon because it causes hot spots in the chamber and defects in the wafer.

The distributed hollow cathode 40 shown in FIG.
It is essentially a planar electrode having multiple cavities or wells 42-46. The shape and dimensions of the wells 42-46 depend on the processing conditions. Preferably, the diameter and depth of wells 42-46 are at least several times the thickness of the plasma sheath in a particular device. For example, 15.2 cm (6
Wells 42-46 are 0.953 cm (3/8 inch) deep and have a diameter of 0.95 cm.
It may be 3 cm (3/8 inch). Furthermore, well 4
The number and distribution of 2-46 is determined from uniformity considerations.

The electrode 40 is an RF source (not shown).
RF connection 47 coupled to. A process gas distributor 48 is disposed below the wells 42-46 and a plurality of passages 50 connect the gas distributor 48 to each well 42-46. The gas distributor 48 and the passage 50 allow the process gas to flow to the well 4
Effective and uniform injection into 2-46 and process chamber 11 further maximizes gas dissociation. When constructed in this way, each well 42-4
6 retains its own strong plasma volume and causes the process gas flowing into each well to dissociate, increasing the process rate. Distributor 48 and passage 5
0 is too narrow to hold the plasma in them. Therefore, there is no need for a grounded wire mesh.
The distributed hollow electrode 40 may be composed of an aluminum plate 52 disposed on an electrically insulating plate 54 and a grounded bottom plate 56. Insulator plate 54 may be constructed of ceramic or other suitable material known in the art.

By limiting the diameter and depth of wells 42-46, distributed hollow electrode 40 has a significantly higher operating pressure (eg, operating pressure> 500 mTorr) and a smaller plasma sheath thickness (eg, thickness <2 mm). ) Will be most suitable for PECVD applications. Distributed hollow electrode 40
Since the surface area of the ion also tends to be larger than the area of the chuck that is powered by RF, the energy of the ions impinging on the wafer 14 will be modest, even at high input power levels. This is a desirable property for achieving good thin film properties.

FIG. 6 shows a distributed hollow electrode 60 having a plurality of wells 62-66 with tapered walls.
The tapered walls of the wells 62-66 generate and hold the plasma more stably. Furthermore, the distance between the wells is illustrated as increasing towards the center of the electrode 60. This electrode configuration is believed to be suitable for the particular treatment application and conditions, and serves to show how the electrodes can be configured to suit these applications and conditions.

FIG. 7 shows yet another variant of the distributed hollow electrode structure. At the electrode 70, domed contours and distribution wells 72-76 are combined to achieve the desired plasma distribution. In fact, any electrode contour can be combined with the distribution wells in order to obtain a combinatorial effect.

As can be seen from the above, according to the present invention, the shape and structure of the electrode are: (i) the energy of ions incident on the wafer; (ii) the distribution and rate of ionization, excitation, and electron impact gas phase dissociation; (iii) Can be contoured to affect discharge stability and efficiency in capacitively coupled RF discharge applications. In addition, selected surface areas of the electrodes of FIGS. 1-7 may be coated with conductive and / or insulating materials known in the art, which causes further variations in process rates for wafers. Coating with such a material changes the electrical properties of the electrode and thus the processing speed.

Although the present invention has been described in detail above, various modifications thereto without departing from the spirit and scope of the present invention defined by the claims.
It should be understood that substitutions and changes can be made.

With respect to the above description, the following items will be further disclosed. (1) A capacitively coupled discharge processing apparatus for a wafer, comprising a first electrode coupled to the wafer and a second electrode placed at a predetermined distance from the first electrode and having a predetermined geometric shape. And a second electrode for selectively changing the speed of the capacitively coupled discharge processing for the wafer.

(2) The geometrical shape of the second electrode is dome-shaped, so that the distance between the first electrode and the dome-shaped electrode at the outer edge of the wafer is effectively increased. , The dome-shaped second electrode is further increasing the processing speed there, and the dome-shaped second electrode is further reducing the distance between the first electrode and the dome-shaped electrode near the center of the wafer, thereby increasing the processing speed there. Is increasing,
The apparatus according to item 1.

(3) The geometry of the second electrode further defines a plurality of cavities distributed in a predetermined pattern to effectively increase the local processing speed. The apparatus according to item 2. (4) The first electrode geometry further defines a plurality of cavities distributed in a predetermined pattern to effectively increase local processing speed. Equipment.

(5) The apparatus of claim 4 wherein the plurality of cavities have varying dimensions. (6) The plurality of cavities are equidistant from each other,
The apparatus according to item 4. (7) The apparatus according to claim 4, wherein the spacing between the plurality of cavities varies in a predetermined manner.

(8) The apparatus according to claim 1, further comprising a radio frequency source for supplying electric power to at least one of the first and second electrodes. (9) The apparatus of claim 1, wherein the first and second electrodes form two walls of a processing chamber, the second electrode further defining a passageway for fluids to and from the processing chamber.

(10) The apparatus according to claim 9, wherein the second electrode further includes at least one grounded barrier on the passage opening. (11) At least one region in which the second electrode has a predetermined geometric shape at a first distance from the first electrode and a predetermined geometric shape at a second distance from the first electrode. At least one other region having
The device according to the item.

(12) The device of claim 11 wherein said second electrode comprises at least one third region having a predetermined geometrical configuration at a third distance from said first electrode. (13) Capacitively coupled discharge treatment of a wafer including a first electrode and the second electrode having a dome-shaped contour for selectively changing a distance between the first electrode and the second electrode Equipment that uniformly processes wafers in the equipment.

(14) The device according to item 13, wherein the second electrode defines a plurality of cavities arranged in a predetermined pattern. (15) The device of claim 1, further comprising a thin coating of conductive material selectively deposited on the second electrode. (16) The device of claim 1, further comprising a thin coating of insulating material selectively deposited on the second electrode.

(17) A method of improving the rate of capacitively coupled discharge between two electrodes for treating a wafer, the method comprising: determining a treatment rate for an area on the wafer; Increasing the spacing between corresponding areas of the electrodes to increase the processing speed for the area, and increasing the spacing between the corresponding areas of the electrodes to decrease the processing speed for the selected area on the wafer. Reducing, and improving the rate of capacitively coupled discharge between two electrodes for treating a wafer.

18. The method according to claim 17, further comprising the step of: (18) forming a plurality of cavities on one of the electrodes arranged in a predetermined pattern for increasing a processing speed. (19) The method according to claim 18, further comprising the step of changing a distance between the plurality of cavities.

20. The method of claim 18, further comprising the step of varying the dimensions of the plurality of cavities. 21. The method of claim 17, further comprising the step of: contouring the surface of one of the electrodes in response to the determined processing rate. (22) The method according to item 17, further comprising the step of forming a dome-shaped electrode.

(23) The method according to claim 17, further comprising the step of selectively coating the surface of one of the electrodes with a conductive material. (24) The method according to Item 17, further comprising the step of selectively coating the surface of one of the electrodes with an insulating material.

(25) In a capacitively coupled wafer discharge processing apparatus, electrode contours and geometries are responsive to processing rate non-uniformities, ie, selectively increasing the local processing rate for wafer 14. Can be configured to cause and reduce. For example, the dome-shaped electrode 10 increases the processing speed near the outer edge of the wafer 14,
The processing speed near the center of the electrode is reduced, and the electrodes 40, 60, 70 with surface cavities cause a local increase in processing speed.

[Brief description of drawings]

1 is a side cross-sectional view of an embodiment of a contour setting electrode constructed according to the present invention.

FIG. 2 is a plan view of the embodiment shown in FIG.

FIG. 3 is a side cross-sectional view of another embodiment of a contour setting electrode constructed in accordance with the present invention.

FIG. 4 is a side cross-sectional view of an embodiment of a distributed hollow cathode constructed in accordance with the present invention.

5 is a plan view of the embodiment shown in FIG.

FIG. 6 is a side cross-sectional view of another embodiment of a distributed hollow cathode constructed in accordance with the present invention.

FIG. 7 is a side cross-sectional view of the combined electrode configuration of an embodiment constructed in accordance with the present invention.

[Explanation of symbols]

 10 Contour setting electrode 11 Processing chamber 14 Wafer 24 Wire mesh 26 Wire mesh 28 Processing gas inlet / outlet 30 Contour setting electrode 40 Distributed hollow electrode 42 Well 46 Well 60 Distributed hollow electrode 62 Well 66 Well 70 Distributed hollow electrode 72 Well 76 Well

Claims (2)

[Claims] 1. A capacitively coupled discharge processing apparatus for a wafer, comprising: a first electrode to which the wafer is coupled; and a second electrode which is located at a predetermined distance from the first electrode and has a predetermined geometric shape. And a second electrode for selectively changing the speed of the capacitively coupled discharge processing for the wafer. 2. A method for improving the rate of capacitively coupled discharge between two electrodes for processing a wafer, the method comprising: determining a processing rate for an area on the wafer; and a selected area on the wafer. Increasing the spacing between corresponding regions of the electrodes to increase the processing speed for the electrodes, and reducing the spacing between corresponding regions of the electrodes to decrease the processing speed for the selected regions on the wafer. And a step of improving the rate of capacitively coupled discharge between two electrodes for treating a wafer.