JPH0619906B2 - Phase synchronization controller - Google Patents

Description

The present invention relates to a phase synchronization control device used in a peripheral device.

(Description of Prior Art) A phase synchronization control device conventionally used in a peripheral device includes a demodulation circuit 10 for demodulating data read from a medium to obtain a rectangular wave as shown in FIG. A reference pulse generation circuit 20 for generating a reference pulse signal based on a clock signal, and a phase synchronization signal selection circuit 40 for selecting either the output of the demodulation circuit 10 or the output of the reference pulse generation circuit 20. And a phase synchronization circuit 50 for performing phase synchronization of the output signal of the phase synchronization signal selection circuit. In such a phase synchronization control device, the reference pulse generation unit is operated by the phase synchronization signal selection circuit 40 until a command for reading data from the medium is sent.
The output signal of the demodulation circuit 10 was selected by the phase synchronization signal selection circuit 40 and input to the phase synchronization circuit 50 after the output signal of 20 was selected and the command for reading the data from the medium was sent. . Therefore, the phase of the output signal of the reference pulse generation circuit 20 and the phase of the output signal of the demodulation circuit 10 do not match, and the output signal of the reference pulse generation circuit 20 contains a variable factor of the static column interval. Therefore, there is a drawback that it takes time to synchronize the phase of the output signal of the demodulation circuit 10.

(Explanation of Object of the Invention) An object of the present invention is to generate a reference pulse signal which is in phase with an output signal of a demodulation circuit and which includes a variable factor of a static column interval so as to obtain data from a medium. The reference pulse signal is used as the input signal of the phase synchronization circuit until the command for reading is sent, and the input data from the medium is used as the input signal of the phase synchronization circuit after the command for reading the data from the medium is sent. An object of the present invention is to provide a phase synchronization control device having a phase synchronization function that can establish phase synchronization in a short period of time by using an input signal.

(Description of Configuration and Operation of the Invention) In order to achieve the above object, a phase synchronization control device according to the present invention is based on a demodulation circuit for demodulating data read from a medium into a rectangular wave and a reference signal read from the medium. A reference pulse generating circuit for generating a reference pulse signal whose phase is synchronized with the output signal of the demodulation circuit, a reference pulse counting circuit for counting the reference pulse signal sent from the reference pulse generating circuit, and an externally added reference pulse counting circuit. The reference pulse count designation register for registering the reference pulse count designation signal, the count value of the reference pulse count circuit and the reference pulse count designation signal of the reference pulse count designation register are compared, and a match signal is output when they match. And the reference pulse generating circuit while the matching signal is not output from the comparing circuit. And a phase synchronization signal selection circuit that selects the rectangular wave of the demodulation circuit when a coincidence signal is output, and a phase synchronization that performs phase synchronization of the output signal of the phase synchronization signal selection circuit. It is composed of a digitalization circuit.

(Description of Examples) Next, the present invention will be described in detail with reference to the drawings. A block configuration of an embodiment of the phase synchronization control device according to the present invention is shown in FIG.

In FIG. 2, the phase synchronization control device includes a demodulation circuit 10 and
Reference pulse generation circuit 20 and reference pulse count circuit 30
, Reference pulse count designation register 33, and comparison circuit 36
A phase synchronization signal selection circuit 40 and a phase synchronization circuit 50. The demodulation circuit 10 is a signal line 10 from the medium.
The data signal read via 0 is demodulated and the data is converted into a rectangular wave signal. The reference pulse generating circuit 20 generates a reference pulse signal by using a pulse signal such as a servo pulse signal having a phase synchronized with the output signal of the demodulation circuit 10. The reference pulse counting circuit 30 counts reference pulses. The reference pulse count designation register 33 is for registering an externally added reference pulse count designation signal. The reference pulse count designation signal is a signal that designates the value to be counted by the reference pulse count circuit 30, and when this value is reached, the output of the demodulation circuit is connected to the phase synchronization circuit 50 and the data signal read from the medium is read. The demodulation output can be synchronized. The comparison circuit 36 compares the output signal of the reference pulse count circuit 30 with the output signal of the reference pulse count designation register 33. In response to the coincidence output from the comparison circuit 36, the phase synchronization signal selection circuit 40 outputs the output signal of the demodulation circuit 10,
Alternatively, one of the reference pulse signals is selected. The phase synchronization circuit 50 performs phase synchronization of the output signal of the phase synchronization signal selection circuit 40.

Next, the operation and effect of the constituent elements of this embodiment will be specifically described. The above embodiment is an example in which the present invention is applied to a magnetic disk device, and a servo pulse signal which is a reference signal read from a magnetic disk medium is a signal read from the same rotating body as a data signal. Therefore, at the same time that the phases of both signals are synchronized, a factor for varying the static column interval is included. Since the timing of the data signal also has the timing information of the servo pulse signal, the reference pulse signal generated from the servo pulse signal is also synchronized with the phase of the data signal, and includes a variable factor of the static column interval. By inputting such a reference pulse signal to the phase synchronization circuit 50 and performing phase synchronization beforehand, the reference pulse signal can be easily matched with the contents of the reference pulse count designation register. Therefore, when the data signal read from the medium is input to the phase synchronization circuit 50, the synchronization pull-in time can be shortened.

(Explanation of Effect of the Invention) As described above, the present invention provides a demodulation circuit, a reference pulse generation circuit, a reference pulse count designation register, a reference pulse count circuit, a comparison circuit, and a phase synchronization signal selection circuit. By providing a phase synchronization circuit, after starting the read operation, a reference pulse signal such as a servo pulse signal that is phase-synchronized with the output signal of the demodulation circuit is generated and input to the phase synchronization circuit. As a result, there is an effect that the phase synchronization is performed in advance before the command for reading the data from the medium is sent, and the synchronization pull-in time of the phase synchronization control device can be shortened.

In a disk device or the like, the data read from the medium is unstable immediately after the start of the reading operation. This is because it takes time for the read head and the like to stabilize. When this unstable read data is input to the phase synchronization circuit, the phase synchronization circuit is out of synchronization.

The present invention is particularly provided with a reference pulse count designation register, a reference pulse count circuit, and a comparison circuit, and after a fixed time when the read data is stabilized, that is, the set reference pulse count designation signal and the number of reference pulses are set. When they match, the comparison circuit outputs a match signal, which causes the phase-locked signal selection circuit to switch to the read data from the demodulation circuit, thereby preventing the synchronization loss of the phase-locked circuit due to unstable read data. effective.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a conventional phase synchronization control device, and FIG. 2 is a block diagram showing the configuration of the phase synchronization control device according to the present invention. 10 …… Demodulation circuit 20 …… Reference pulse generation circuit 30 …… Reference pulse count circuit 33 …… Reference pulse count designation register 36 …… Comparison circuit 40 …… Phase synchronization signal selection circuit 50 …… Phase synchronization circuit

Claims (1)

[Claims] 1. A demodulation circuit for demodulating data read from a medium into a rectangular wave, and a reference pulse generation for generating a reference pulse signal in phase with an output signal of the demodulation circuit based on a reference signal read from the medium. A circuit, a reference pulse count circuit for counting the reference pulse signal sent from the reference pulse generation circuit, a reference pulse count designation register for registering a reference pulse count designation signal applied from the outside, the reference pulse A comparison circuit that compares the count value of the count circuit with the reference pulse count designation signal of the reference pulse count designation register and outputs a match signal when they match, and the reference pulse while the match signal is not output from the comparison circuit. When the reference pulse signal of the generation circuit is selected and a coincidence signal is output, the rectangle of the demodulation circuit A phase synchronizing signal selection circuit for selecting, the phase synchronization control apparatus characterized by being configured from the phase synchronization circuit for phase synchronization of the output signal of the phase synchronizing signal selection circuit.