JPH06178287A - Picture coder - Google Patents

Abstract

(57) [Abstract] [Purpose] An object of the present invention is to provide an image coding apparatus which has little influence on the reproduced image quality even when the code amount after variable length coding exceeds the target code amount. The data after DCT processing is rearranged by the shuffling circuit 6 from the data in the central portion of the screen to the data in the peripheral portion, and the quantizing circuit 8 is sequentially arranged based on the quantization table selected by the code amount estimating circuit 7. Quantize with. The code amount accumulating circuit 11 counts the accumulated code amount after the variable length coding, and the quantization control circuit 9 resets the quantization step for each macro block according to the accumulated code amount in the middle. When the target code amount is exceeded on the way, the data output from the variable length coding circuit 10 thereafter is terminated. At the time of decoding, the transmission block detection circuit 20 detects the area where the data is discontinued based on the timing at which EOB is detected from the decoded data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding apparatus for compressing information of a video signal of a television or the like and recording or transmitting the information on a VTR or the like.

[0002]

2. Description of the Related Art As an international standard for a high-efficiency image coding method, a method for compressing information by DCT and variable length coding is adopted. In this method, a two-dimensional DCT is first performed on a video signal converted into digital image data.
By processing, it is converted into frequency components in the horizontal and vertical directions. Next, low-frequency coefficients are finely quantized, and high-frequency coefficients are coarsely quantized. DC for the quantized DCT coefficient
The components are subjected to variable length coding by DPCM and Huffman coding, and the AC components are zigzag scanned to be rearranged in order from the low frequency range, and then variable length coding is performed by Huffman coding and run length coding to compress information.

When the above-mentioned coding method is applied to a VTR or the like, it is necessary to control the code amount so that it does not exceed a predetermined data rate, for example, every frame. The code amount is generally controlled by changing the quantization step when quantizing each DCT coefficient. If the quantization step is made fine, the code amount increases, and conversely, if the quantization step is made coarse, the code amount decreases. Before the actual quantization, the following processing is performed in order to find the optimum value of the quantization step that maximizes the code amount below the target code amount.

First, one image data is divided into M areas. When the scale factor corresponding to the quantization step width is α, the amount of code when variable length coding is performed by quantization based on α of each of the M areas is calculated, and the scale in the image to be encoded here is calculated. The relationship between the factor α and the code amount is calculated. From this relationship, the optimum scale factor α for achieving the target code amount is calculated. Since the quantization table is selected as a function of the scale factor α, the optimum quantization table is selected as the initial value from the above calculation result. Each DCT coefficient of the encoded image data is
Based on the selected quantization table, it is actually quantized by the corresponding quantization step and variable-length coded.

As described above, since the quantization table selected as the initial value is the predicted value and is not always the optimum value, the entire image of the code amount control unit (for example, one frame) is variable length coded. There is no guarantee that the total code amount after this will always be less than or equal to the target code amount. In order to correct the error, the quantization table is set to a format that can be reset for each macroblock consisting of multiple coded blocks, and it is determined that the target code amount will eventually be exceeded from the cumulative code amount in the middle. In such a case, the quantization table after that point is reset so that the quantization step becomes coarser, so that the data rate is adjusted to be equal to or lower than a certain data rate.

In the image data compression method disclosed in Japanese Patent Laid-Open No. 4-81184, if the total code amount after variable length coding exceeds the target code amount, upper and lower lines of the image are trimmed. The amount of data is reduced and the amount of code is controlled by reducing the size of the image to be encoded.

[0007]

However, the above-mentioned first problem
In the conventional image coding apparatus, the quantization table after that time is changed in the middle of coding, so that the last coded block in one image is coded in the first half. There is a possibility that the distortion will be larger than the above-mentioned one, and the cumulative code amount may exceed the target code amount in the middle only by changing the quantization table, and the data thereafter may be truncated. Therefore, for example, the image quality at the central portion of the screen may be significantly deteriorated or the data may be truncated, and in this case, the quality of the reproduced image is greatly affected.

Further, in the second conventional image coding apparatus, the quality of the central portion of the screen is guaranteed, but the size of the screen changes depending on the image, so that it can be applied to the coding of a still image. However, it is not suitable for video coding. Further, in this method, trimming, DCT, quantization, and variable length coding processing are repeated for one image until the data rate becomes equal to or lower than a predetermined data rate. Therefore, for example, the time required for coding such as a still image file encoder. However, it is difficult to apply it to a moving image recording device such as a VTR because it requires real-time encoding processing.

The present invention solves the above-mentioned problems of the prior art, and has a simple structure, and even when the code amount after variable-length coding exceeds the target code amount, an image code that has little influence on the reproduced image quality. It is an object of the present invention to provide a chemical conversion device.

[0010]

In order to achieve this object, the image coding apparatus according to the first aspect of the present invention comprises means for estimating a coding parameter which becomes a target code amount for each code amount control unit,
With the estimated coding parameters, means for sequentially coding from the central pixel on the screen of the image signal toward the peripheral portion, means for integrating the code amount after the encoding, and the integrated code amount Has a target code amount, the subsequent data is cut off.

The second aspect of the present invention further comprises means for estimating a coding parameter that becomes a target code amount for each code amount control unit, and means for performing encoding with the estimated coding parameter when the image is encoded. , Means for accumulating the code amount after the encoding, means for aborting the subsequent data when the accumulated code amount exceeds a target code amount, and detecting the aborted data when decoding Means and means for replacing the area on the screen indicated by the aborted data with the data of the already transmitted frame or field.

[0012]

According to the present invention, coding is performed in order from the central block on the screen, so that the data rate is limited within a predetermined rate, so that a region with a rough quantization step or a part of data in the block is used. Alternatively, since all the blocks that are truncated are concentrated in the peripheral area of the screen, the data in the central area, which has a large visual impact on the screen, is protected. Also,
By replacing the block in which the data has been truncated with the data of the previous frame that has already been transmitted, it is possible to reduce image quality deterioration even when the target code amount is finally exceeded. Furthermore, by changing the encoding order for each frame, even if the data is continuously truncated, the data in the same block is not always truncated.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the image coding apparatus of the present invention will be described below with reference to the drawings. FIG. 1 is a signal processing block diagram in an embodiment of the present invention, and FIG. 2 is an explanatory diagram of a coding order of blocks in an embodiment of the present invention.

In FIG. 1, 1 is a video signal input terminal and 2 is a video signal input terminal.
Is an A / D converter that converts an analog video signal into digital image data, 3 is a block division circuit that divides 1 frame of image data into blocks of 8 lines * 8 pixels, and 4 is a DCT process for each block A DCT processing circuit for performing 5), 5 is a shuffling rule switching signal input terminal, 6 is a shuffling circuit, 7 is a code amount estimation circuit for estimating a code amount after variable-length encoding and selecting an optimum quantization table, 8 is A quantization circuit for quantizing each DCT coefficient,
Reference numeral 9 is a quantization control circuit that resets the quantization step according to the cumulative code amount, 10 is a variable length coding circuit that performs variable length coding on the quantization result, and 11 is a code amount integrating circuit that sequentially integrates the code amounts. , 12 is a data multiplexing circuit for multiplexing the variable length code, the shuffling rule switching signal and the quantization table number, 13 is a recording signal processing circuit, 14 is a recording head, and 15 is a recording medium.

Reference numeral 16 is a reproducing head, 17 is a reproduction signal processing circuit,
18 is a data separation circuit for separating a variable length code, a shuffling rule switching signal and a quantization table number from a reproduced signal, 19 is a variable length decoding circuit, 20 is a transmission block detection circuit, 21 is an inverse quantization circuit, 22 Is a reverse shuffling circuit,
23 is an inverse DCT circuit, 24 is a block integrated circuit, 25 is a D / A
The converter 26 is a video signal output terminal.

The operation of the image coding apparatus configured as described above will be described below. For simplicity, the case where the input video signal is only the luminance signal will be described. First, the video signal input from the input terminal 1 is A /
It is converted into digital image data by the D converter 2. The block division circuit 3 divides the image data into blocks each consisting of 8 lines * 8 pixels, and sequentially outputs the image data for every 64 pixels. In the DCT processing circuit 4, 2 for each block
Dimensional DCT processing is performed, and 8 * 8 DCT coefficients are sequentially output.

The shuffling circuit 6 writes the DCT coefficients for one frame in the memory. Further, a signal for distinguishing an odd-numbered frame from an even-numbered frame is input from the shuffling rule switching signal input terminal 5, and one of two types of shuffling rules is selected according to the signal, and Based on this, each DCT coefficient is output from the shuffling circuit 6 for each block.

FIG. 2 shows an example of two types of shuffling rules. In FIG. 2, when one frame image has 512 lines * 768 pixels (64 * 96 blocks), 8 blocks adjacent in the horizontal direction and 4 blocks adjacent in the vertical direction are 32 blocks in total, and one macroblock is defined as each block. The coding order is set for each macroblock. Here, the encoding order corresponding to the odd-numbered frames is (a)
And the coding order corresponding to the even-numbered frames is shown in (b). The encoding order, that is, the output from the shuffling circuit 6 is the DC of the block in the center of the screen
It outputs in order from the T coefficient.

Regarding the blocks in the peripheral portion of the screen, the odd-numbered frames output the upper end portion before the lower end portion as shown in FIG. 2A, and conversely, the even-numbered frames are output as shown in FIG.
As shown in (b), the lower end is output before the upper end.
The code amount estimation circuit 7 selects the optimum initial value of the quantization table for the image of the frame in a time corresponding to one frame. The quantization circuit 8 quantizes each DCT coefficient based on the quantization table input from the quantization control circuit 9, and outputs quantized data. The quantization control circuit 9 predicts the final code amount of one frame from the accumulated code amount input from the code amount integration circuit 11, and if it is determined that the target code amount is exceeded, the quantization after that time is performed. The table is changed in macroblock units and output to the quantization circuit 8 and the data multiplexing circuit 12.

In the variable-length coding circuit 10, the DC component of the coefficient is subjected to the DPCM processing, the Huffman coding is performed on the quantized data, and the AC component is zigzag-scanned in the order from the low frequency component to the high frequency component. Variable length coding by Huffman coding and run length coding,
Outputs a variable length code. At this time, in the data string of AC component, EOB (End of
Block) is inserted.

The code amount integrating circuit 11 integrates the code amounts after variable-length coding within one frame and outputs it to the quantization control circuit 9. Further, when the cumulative code amount exceeds the preset target code amount, a coded cutoff signal is output to the variable length coding circuit 10. All the data input to the variable length coding circuit 10 after the coded truncation signal is input are truncated.

The data multiplexing circuit 12 multiplexes the shuffling rule switching signal input from the shuffling rule switching signal input terminal 5 and the quantization table number input from the quantization control circuit 9 into a variable length code. The recording signal processing circuit 13 adds an error correction signal, a synchronization signal and I
D addition and recording modulation processing are performed, and recording is performed on the recording medium 15 via the recording head 14.

At the time of reproduction, the reproducing head 16 is removed from the recording medium 15.
The reproduction signal processing circuit 17 performs reproduction equalization, code detection, synchronization detection, reproduction demodulation, and error correction processing on a signal reproduced via the data reproduction circuit 17 and outputs the signal to the data separation circuit 18. The data separation circuit 18 separates the reproduced data into a variable length code, a shuffling rule switching signal, and a quantization table number and outputs the separated data. The variable length decoding circuit 19 decodes a variable length code and outputs an EOB detection signal when an EOB inserted in each coded block is detected. The decoded data and the EOB detection signal output from the variable length decoding circuit 19 are output at constant timing for each block.

The transmission block detection circuit 20 determines whether or not the EOB detection signal from the variable length decoding circuit 19 is output at a predetermined timing, and after the block where the EOB detection signal is not output at the predetermined timing, It judges that the data is not transmitted and outputs the memory write inhibit signal to the reverse shuffling circuit 22.

In the inverse quantization circuit 21, the variable length decoding circuit 19
The data decoded in (1) is converted into DCT coefficient data based on the quantization table number input from the data separation circuit 18. The inverse shuffling circuit 22 writes the DCT coefficient data in the memory in accordance with the shuffling rule switching signal separated by the data separating circuit 18. When a memory write inhibit signal is input from the transmission block detection circuit 20, writing to the memory is interrupted at that point. That is, the data of the previous frame is held as the data after that time. After a lapse of time for one frame, data is read from the memory, subjected to inverse DCT, block integration, D / A conversion, and then output from the video signal output terminal 26.

As described above, according to the present embodiment, the pixels near the center of the screen are encoded first, so that the quantization step becomes coarse to adjust the code amount, or the data is truncated. As a result, the areas where image quality may become large are concentrated in the peripheral area of the screen,
Data in the center of the screen, which is visually important, can be protected.

Further, even when the data is finally truncated beyond the target code amount, deterioration of the image quality can be reduced by replacing only that portion with the data of the already transmitted frame. Further, in this case, by encoding in two consecutive frames, that is, in a different order for each code amount control unit, even if the target code amount is continuously exceeded, the data of two or more frames before is not replaced.

The shuffling rule indicating the order of encoding and the setting of the macroblock are not limited to those shown in this embodiment, and a complicated shuffling rule or another macroblock setting can be used. In addition, although a case has been described with the present embodiment where DCT is used as an encoding method, the present invention can be similarly applied to the case where another encoding method such as subband encoding or predictive encoding is used. Furthermore, in the present embodiment, the unit of code amount control is the frame unit,
The above effect can be obtained even when the code amount is controlled in units other than the frame unit. It is needless to say that the image encoding device of the present invention is not limited to the VTR, and the same effect can be obtained when applied to other recording / reproducing devices and transmission devices.

[0029]

As described above, according to the first aspect of the present invention, the means for estimating the encoding parameter that becomes the target code amount for each code amount control unit, and the estimated encoding parameter are used for the center of the image signal on the screen. Means for sequentially encoding from the pixels of the part toward the peripheral portion, means for accumulating the code amount after the encoding,
When the accumulated code amount exceeds the target code amount, it has means for cutting off the subsequent data, so that the data in the central portion of the screen can be protected and the code amount can be controlled with a simple structure. An image coding device can be realized.

The second aspect of the present invention further comprises means for estimating an encoding parameter that will be a target code amount for each code amount control unit in image encoding, and means for encoding with the estimated encoding parameter. , Means for accumulating the code amount after the encoding, means for aborting the subsequent data when the accumulated code amount exceeds a target code amount, and detecting the aborted data when decoding By providing the means and the means for replacing the area on the screen indicated by the aborted data with the data of the already transmitted frame or field, the image quality is less deteriorated even when the target code amount is finally exceeded. It is possible to realize an excellent image encoding device.

[Brief description of drawings]

FIG. 1 is a signal processing block diagram of an image coding apparatus according to an embodiment of the present invention.

FIG. 2A is an explanatory diagram of a coding order of blocks in an embodiment of the present invention. FIG. 2B is an explanatory diagram of an encoding order of other blocks in an embodiment of the present invention.

[Description of Codes] 3 block division circuit 4 DCT processing circuit 5 shuffling rule switching signal input terminal 6 shuffling circuit 7 code amount estimation circuit 8 quantization circuit 9 quantization control circuit 10 variable length coding circuit 11 code amount integration circuit 12 Data multiplexing circuit 18 Data separation circuit 19 Variable length decoding circuit 20 Transmission block detection circuit 21 Inverse quantization circuit 22 Inverse shuffling circuit 23 Inverse DCT circuit 24 Block integration circuit

Claims (3)

[Claims] 1. When high-efficiency encoding is performed on an image signal,
A means for estimating the encoding parameter that becomes the target code amount for each code amount control unit, and the estimated encoding parameter,
A means for sequentially encoding from the central pixel on the screen of the image signal toward the peripheral portion, a means for accumulating the code amount after the encoding, and a case where the accumulated code amount exceeds a target code amount. And a means for cutting off subsequent data. 2. When highly efficient coding is performed on an image signal,
Means for estimating a coding parameter that becomes the target code amount for each code amount control unit, means for encoding with the estimated coding parameter, means for accumulating the code amount after the encoding, and the means for accumulating When the code amount exceeds the target code amount, means for terminating the subsequent data, means for detecting the censored data when decoding the high efficiency code, and an area on the screen indicated by the censored data And a means for replacing with already transmitted frame or field data. 3. The image coding apparatus according to claim 2, wherein the coding order is changed for each code amount control unit.