JPH06177685A - Gain control circuit - Google Patents

Abstract

PURPOSE:To provide a gain control circuit advantageous to miniaturization and light weight of a portable telephone set, long talking time and cost reduction. CONSTITUTION:A circuit is provided with a source grounded dual gate FET 40 and a transistor(TR) 61 of emitter follower. First and second elements 63, 64 connected in series are provided between the emitter of the TR 61 and a voltage source -VEE opposite in polarity to a voltage VDD fed to the drain of the dual gate FET 40, and a control voltage V12 of the same polarity as the voltage VDD fed to the drain of the dual gate FET 40 is fed to the base of the TR 61. A control voltage V121 changing over a positive and negative voltage range is extracted from a connection midpoint between the 1st and 2nd elements 63, 64 corresponding to the control voltage V12. The extracted control voltage V121 is fed to the gate of the dual gate FET 40 to control the gain.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gain control circuit for high frequency signals.

[0002]

2. Description of the Related Art In a mobile phone system such as a mobile phone or a car phone, for example, a cellular phone system, a base station is designed to control or change the transmission output of the mobile station. This allows the same frequency to be used in the service area (cell) of another base station by limiting the transmission output of the mobile station to the minimum value required by the base station, thereby utilizing the system. This is to increase the number of people who can do it.

In order to change the transmission output in such a manner, the transmission circuit of the mobile station is constructed, for example, as shown in FIG.

That is, in FIG. 3, the voice signal from the transmitter 1 is supplied to the digital processing circuit 2 to be converted into a digital signal of a predetermined format, and this digital signal is supplied to the modulation circuit 3 and orthogonally modulated. Transmitted signal S3
Is converted to. Then, the transmission signal S3 is supplied to the transmission / reception antenna 8 through the signal line of the gain control circuit 4 → class B power amplifier 5 → isolator 6 → antenna duplexer 7 and transmitted to the base station. The frequency band used for transmission is, for example, 940 to 960 MHz.

Further, in this case, a part of the transmission signal S3 from the power amplifier 5 is supplied to the detection circuit 11, a detection signal indicating the level (amplitude) of the transmission signal S3 is taken out, and this detection signal is controlled. It is supplied to the circuit 12. Then, in the control circuit 12, the data indicating the transmission level instructed by the base station is compared with the detection signal, and the output voltage V12 of the comparison is supplied to the gain control circuit 4 as its control voltage.

In this way, the gain of the gain control circuit 4 is controlled by the control voltage V12 so that the level of the detection signal from the detection circuit 11 is controlled to a predetermined value, and as a result, the transmission signal S3 transmitted from the antenna 8 is transmitted. Is controlled to the transmission level instructed by the base station.

Further, at this time, the detection circuit 11 also detects the waveform distortion of the transmission signal S3 from the amplifier 5 due to the non-linearity of the input / output characteristics of the power amplifier 5, and the signal for correcting the waveform distortion. The component is also added to the control voltage V12. As a result, the gain control circuit 4 also controls the instantaneous level of the transmission signal S3 and corrects the waveform distortion of the transmission signal S3 transmitted from the antenna 8.

Thus, in the transmission circuit of FIG. 3, the transmission output of the mobile station can be suppressed to the minimum value required by the base station, so that the same frequency should be used in the service areas of other base stations. It is possible to increase the subscription capacity of the system.

Further, in the transmission circuit of FIG. 3, the gain control circuit 4 controls the transmission output by controlling the level of the transmission signal S3, so that the power efficiency is good and the built-in battery is used as the power source. It is particularly advantageous in mobile phones.

FIG. 4 shows an example of the gain control circuit 4. That is, the dual gate FET 40 is provided, and the transmission signal S3 from the modulation circuit 3 is transmitted to the microstrip line 4
The coil 44 is connected between the gate and the ground while being supplied to the first gate of the FET 40 through the signal line of 1 → capacitor 42 → microstrip line 43. The elements 41 to 44 form an input matching circuit. The source of the FET 40 is grounded through the resistor 46 and the bypass capacitor 47, and the drain thereof is the microstrip line 51,
It is connected to the positive power supply terminal T1 through the series circuit of the coil 52 and the resistor 48, the bypass capacitor 49 is connected between the connection midpoint of the elements 52 and 48 and the ground, and the elements 51 and 52 are connected. The midpoint is the power amplifier 5 through the capacitor 53 and the microstrip line 54.
Connected to. The elements 51 to 54 form an output matching circuit.

Further, the control voltage V12 from the control circuit 12
Through the operational amplifier 55 and the resistor 56
A bypass capacitor 57 is connected between the second gate and the ground.

Therefore, the FET 40 operates as a grounded source amplifier, and the transmission signal S3 from the transmission circuit 3 is
It is supplied to the power amplifier 5 through the FET 40. Then, at this time, the DC voltage of the second gate of the FET 40 changes according to the control voltage V12 from the control circuit 12,
Since the gain of the FET 40 changes due to this voltage change,
The level of the transmission signal S3 supplied to the amplifier 5 can be controlled.

[0013]

By the way, the FET 40
The relationship between the second gate voltage VG2, the gain AV and the distortion IM3 has a characteristic as shown in FIG. 5, for example. That is, this figure shows that FET40: voltage of 3SK166 terminal T1 VDD: 5V value of resistor 52: value of 22Ω resistor 46: value of 180Ω input signal level: −20 dBm, gain AV and distortion of FET40 with respect to the second gate voltage VG2 This is the case when IM3 is measured.

According to this measurement result, when the second gate voltage VG2 is in the region A, the second gate voltage V
The gain AV can be controlled by monotonically increasing with respect to G2. Further, when the second gate voltage VG2 is in the region B, the gain AV monotonously decreases with respect to the second gate voltage VG2, and the gain AV can be controlled.
However, since the region B has more distortion IM3 than the region A, the region B cannot be used and the region A is used.

However, in the region A, as is clear from FIG. 5, the second gate voltage VG2 changes from negative to positive. The control voltage V12 output from the control circuit 12 in FIG. 4 changes only in a positive range, for example, in accordance with the power supply voltage. For this reason, in the circuit of FIG. 4, the DC level of the control voltage V12 from the control circuit 12 is shifted in the negative direction to the region A by the operational amplifier 55, and the gain control is performed in the region A.

However, in the operational amplifier 55, in order to shift the DC level of the control voltage V12 to the area A,
A positive voltage VDD1 and a negative voltage −VSS1 are required as power sources for the operational amplifier 55. Moreover, at this time, the control voltage V12 is also a control voltage for correcting the waveform distortion of the transmission signal S3, and changes at a considerably high speed in response to the transmission signal S3. Therefore, the operational amplifier 55 can operate at high speed, that is, It must have a large gain bandwidth product. In general, an operational amplifier having a large gain bandwidth product consumes a large amount of current.

Therefore, in the circuit of FIG. 4, because of the operational amplifier 55, the positive voltage VDD1 and the negative voltage -VS
In addition to requiring S1 and their voltage sources, they must be able to supply a sufficiently large current, for example of the order of 10 mA.

However, since the mobile phone uses a battery as a power source, a positive voltage VDD1 can be easily obtained, but a negative voltage -VSS1 can be output and a voltage source capable of outputting a sufficiently large current is provided. This is not preferable for a mobile phone in terms of downsizing, weight reduction, extension of talk time, and the like.

The present invention is intended to solve the above problems.

[0020]

Therefore, in the present invention, when the reference numerals of the respective parts correspond to the embodiments described later, the dual-gate FET 40 whose source is grounded,
An emitter follower transistor 61, a voltage source -VEE having a polarity opposite to the voltage VDD supplied to the emitter of the transistor 61 and the drain of the dual gate FET 40.
And the first and second elements 63, 64 connected in series between
And. The voltage V supplied to the drain of the dual gate FET 40 is applied to the base of the transistor 61.
A control voltage V12 having the same polarity as that of DD is supplied, and a control voltage V121 that changes the positive and negative voltage range corresponding to the control voltage V12 is taken out from the connection midpoint of the first and second elements 63 and 64. The control voltage V121 thus taken out is supplied to the gate of the dual gate FET 40 to control the gain thereof.

[0021]

The original control voltage V12 is level-shifted to the control voltage V121 in the voltage range suitable for the gain control region of the FET 40 by the elements 63 and 64, and such a control voltage V121 is supplied to the gate of the FET 40 to gain the gain. Control is executed.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION In FIG. 1, a gain control circuit 4 is constituted by a dual gate FET 40 as described above. Then, a transistor 61 is provided, and the control voltage V12 from the control circuit 12 is supplied to the transistor 6 via the resistor
1, the collector of the transistor 61 is connected to the positive power supply terminal T2, and the emitter of the transistor 61 is connected to the negative power supply terminal T3 through the series circuit of the constant voltage diode 63 and the resistor 64. Further, the elements 63, 64
The connection midpoint of is connected to the second gate of the FET 40 through the resistor 56.

As an example, the voltage Vcc of the terminal T2: 5V The voltage of the terminal T3 -Vss: -5V The voltage of the diode 63 Vz: 2V The value of the resistor 62: 1kΩ The value of the resistor 64: 1kΩ It is the same as the circuit.

According to such a configuration, the transistor 6
1 operates as an emitter follower, the control circuit 1
The control voltage V12 from 2 is taken out to the emitter of the transistor 61 and further supplied to the second gate of the FET 40 through the constant voltage diode 63 and the resistor 56.

In this case, the control voltage V12 supplied to the base of the transistor 61 is shifted in the negative direction by the magnitude of the base-emitter voltage VBE of the transistor 61, and further the voltage VZ is applied by the constant voltage diode 63.
Is shifted in the negative direction only and then supplied to the FET 40. That is, V121: V121 = V12-VBE-VZ (1), where V121 is the value of the control voltage V12 when being supplied to the second gate of the FET 40.

Therefore, by previously setting the change range of the original control voltage V12 and the voltage VZ, the original control voltage V12 is applied to the second gate of the FET 40.
According to the control voltage V12
Can supply 1.

Also in this circuit, the negative voltage −
Although VEE is required, the transistor 61 only needs to pass the minimum value of current at which it operates as an emitter follower, that is, less than 1 mA. Then, the current having such a magnitude can be easily distributed from another circuit used in the mobile phone, for example, a power amplifier, and it is not necessary to provide a negative voltage source again. Therefore, the direct current level of the control voltage V12 can be shifted to the area A without providing a special voltage source.

Further, since it is only necessary to provide the simple elements 61 to 64 instead of providing the special voltage source or the operational amplifier, downsizing and weight saving of the mobile phone, extension of the talk time,
Furthermore, it is advantageous in terms of cost.

Moreover, as is clear from the equation (1), F
The control voltage V121 supplied to the ET 40 has only the DC level changed (shifted) as compared with the original control voltage V12, and the change width of the control voltage V121 is the same as the original control voltage V12.
Is equal to the change range of. Therefore, the control sensitivity for the FET 40 does not decrease.

In the example shown in FIG. 2, a resistor 65 is connected instead of the constant voltage diode 63.
Incidentally, as an example, the voltage of the terminal T3 -VEE: -4V, the value R65 of the resistor 65: 10 kΩ, the value R64: 10 kΩ of the resistor 64, and others are the same as the circuit of FIG.

According to such a configuration, the transistor 6
1 operates as an emitter follower, the control circuit 1
The control voltage V12 from 2 is taken out to the emitter of the transistor 61, and is further fed through the resistors 65 and 56 to the FE.
It is supplied to the second gate of T40.

In this case, the control voltage V12 supplied to the base of the transistor 61 is negatively shifted by the magnitude of the base-emitter voltage VBE of the transistor 61, and further divided by the resistors 65 and 64. Being F
Supplied to ET40. That is, in this case, V121 = −VEE + {(V12−VBE) − (− VEE)} × R64 / (R65 + R64) (2)

Therefore, by previously setting the change range of the original control voltage V12 and the values R65 and R64 of the resistors 65 and 64, the second control gate of the FET 40 is set to the original control voltage V12. Therefore, the control voltage V121 that changes within the range of the region A can be supplied.

Also in this circuit, since a current of less than 1 mA only needs to flow through the transistor 61, this current can be distributed from other circuits, and no special voltage source is provided. , The DC level of the control voltage V12 can be shifted to the area A. Moreover, since the resistor 65 is used instead of the constant voltage diode 63, the cost can be reduced also from this point.

[0035]

When gain control is performed using the dual gate FET 40, even if the original control voltage V12 is, for example, a voltage that changes in the positive range, the original control is applied to the second gate of the FET 40. According to the voltage V12, it is possible to supply a control voltage V121 that changes within the range of the area A.

Furthermore, since a current of less than 1 mA only needs to flow through the transistor 61, this current can be distributed from other circuits, and the control voltage V12 of the control voltage V12 can be distributed without providing a special voltage source. The DC level can be shifted to area A. Moreover, it is only necessary to provide the simple elements 61 to 64 instead of providing a special voltage source or an operational amplifier, which is advantageous in terms of downsizing and weight saving of the mobile phone, longer talk time, and cost. is there.

[Brief description of drawings]

FIG. 1 is a connection diagram showing an example of the present invention.

FIG. 2 is a connection diagram showing another example of the present invention.

FIG. 3 is a system diagram showing an example of a transmission circuit of a mobile phone.

FIG. 4 is a connection diagram for explaining the present invention.

FIG. 5 is a diagram showing an example of FET characteristics.

[Explanation of symbols]

 3 Modulation circuit 4 Gain control circuit 5 Power amplifier 12 Control circuit 40 Dual gate FET 61 Transistor 63 Constant voltage diode

Claims (4)

[Claims] 1. A dual gate FE whose source is grounded.
T, an emitter follower transistor, the emitter of this transistor, and the dual gate F
A first and a second element connected in series between a voltage source having a polarity opposite to that of the voltage supplied to the drain of ET, and the dual gate FE at the base of the transistor.
A control for supplying a control voltage having the same polarity as the voltage supplied to the drain of T, and changing the positive and negative voltage ranges corresponding to the control voltage from the connection midpoint of the first and second elements. A gain control circuit for extracting a voltage and supplying the extracted control voltage to the gate of the dual gate FET to control the gain thereof. 2. A dual gate FE whose source is grounded.
T, an emitter follower transistor, the emitter of this transistor, and the dual gate F
A constant voltage diode and a resistor connected in series between a voltage source having a polarity opposite to that of the voltage supplied to the drain of ET, and the dual gate FE at the base of the transistor.
A control voltage having the same polarity as the voltage supplied to the drain of T is supplied, and a control voltage that shifts the DC level and changes the positive and negative voltage ranges from the connection midpoint of the constant voltage diode and the resistor. A gain control circuit which takes out and supplies the control voltage thus taken out to the gate of the dual gate FET to control the gain thereof. 3. A dual-gate FE whose source is grounded
T, an emitter follower transistor, the emitter of this transistor, and the dual gate F
A first and a second resistor connected in series with a voltage source having a polarity opposite to the voltage supplied to the drain of ET, and the dual gate FE at the base of the transistor.
A control voltage having the same polarity as the voltage supplied to the drain of T is supplied, and the first and second resistors are connected to each other from the middle point of connection.
And a control voltage which is divided by the second resistor and whose direct current level is shifted to change the positive and negative voltage ranges, and which is supplied to the gate of the dual gate FET to obtain the control voltage. A gain control circuit for controlling the gain. 4. A dual gate FE whose source is grounded.
T, an emitter follower transistor, the emitter of this transistor, and the dual gate F
A first and a second element connected in series between a voltage source having a polarity opposite to that of the voltage supplied to the drain of ET, and supplying a transmission signal to the first gate of the dual gate FET. The transmission signal is taken out from the drain, and the dual gate FE is connected to the base of the transistor.
A control for supplying a control voltage having the same polarity as the voltage supplied to the drain of T, and changing the positive and negative voltage ranges corresponding to the control voltage from the connection midpoint of the first and second elements. A gain control circuit for extracting a voltage and supplying the extracted control voltage to the second gate of the dual gate FET to control the level of the transmission signal extracted from the drain.