JPH06177487A - Manufacture of high-resistance buried layer - Google Patents

Abstract

PURPOSE:To obtain a flat high-resistance buried layer when a mesa to be buried is deep or even in any substrate orientation by forming undoped InAlAs at a specific growth temperature through a molecular-beam epitaxial method and burying the high resistance layer in high-resistance layer burying. CONSTITUTION:An n-type InP clad-layer undoped InGaAs active layer 4, a p-type InP clad layer 5 and a p-type InGaAsP electrode layer 6 having high mesa structure are formed onto the top face of an n-type InP substrate 2 while undoped high-resistance InAlAs 23 is buried flatly on both sides of the high mesa stripe as high-resistance buried layers. The flat high-resistance buried layer is acquired even in any substrate orientation and in any stripe direction through the manufacture of the high-resistance buried layer. When the method is applied to an actual element, the element excellent in high-speed response, high-speed modulation characteristics and transverse-mode stability can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to improve the performance of devices such as semiconductor light sources, optical modulators, photodetectors, and optical nonlinear devices used in the field of optical communication or optical information processing. The present invention relates to a method of manufacturing a high resistance buried layer.

[0002]

2. Description of the Related Art A conventional high resistance layer embedding method is
A laser will be taken as an example of the semiconductor element and described below.
FIG. 8 shows the basic structure of an InGaAsP / InP semiconductor laser. In the figure, 1 is n-type Au-Ge-Ni
Electrodes 2, n-type InP substrate, 3 n-type InP cladding layer, 4 undoped InGaAsP active layer, 5 p-type I
An nP clad layer, 6 is a p-type InGaAsP electrode layer, and 7 is a p-type Au-Zn-Ni electrode.

Generally, in order to reduce the current between oscillations and the capacitance of the element, the electrode stripe may be narrowed to have a high mesa structure. However, in this structure, there is a problem that the lateral mode is unstable because the difference in refractive index in the lateral direction near the active layer is too large.

Therefore, as shown in FIG. 9, Fe-doped InP is formed as a high resistance buried layer on both sides of the narrow stripe laser.
By arranging the buried layers 8 and 8 respectively and reducing the difference in refractive index from the active layer, a stable single laser in the transverse mode is realized.

[0005]

By the way, in the prior art, Fe-doped InP selectively grown by the metal organic chemical vapor deposition method is used for the high resistance buried layer, and the molecular beam epitaxy method is used. It was not used.

Therefore, this conventional method has the following problems. (A) Abnormal growth often occurs from the edge of the mesa when the mesa to be embedded is deep or depending on the crystallographic direction of the stripe. Therefore, it cannot be embedded evenly, which seriously hinders the subsequent element manufacturing process. (B) Since the high resistance layer is obtained by doping the InP layer with Fe, the resistance may not be high depending on the distribution of Fe. This problem is particularly problematic in the above-described growth on the processed substrate shown in FIG.

The above two problems are related to the fact that the metal-organic vapor phase epitaxy is a growth in a state relatively close to thermal equilibrium. That is, in the metal organic chemical vapor deposition method, the growth rate and Fe
This is because the doping characteristics of are dependent on the crystal plane.

In view of the above problems, it is an object of the present invention to provide a method for manufacturing a high resistance buried layer, which can obtain a flat high resistance buried layer even when the mesa to be buried is deep and in any substrate plane orientation. And

[0009]

A method of manufacturing a high resistance buried layer according to the present invention, which achieves the above object, comprises a step of forming an etching mask of a silicon oxide film or a silicon nitride film on a semiconductor wafer, and a chemical wet process. Etching a semiconductor wafer into a mesa by etching or plasma dry etching or a combination of the two; a step of embedding the semiconductor mesa in a high resistance semiconductor layer; and a silicon oxide film or silicon of the semiconductor wafer by chemical wet etching. In a method of burying a high resistance layer, which comprises a step of lifting off a polycrystalline high resistance semiconductor on a nitride film, the high resistance layer burying is performed by forming undoped InAlAs at a growth temperature of 600 ° C. or less by a molecular beam epitaxy method. It is characterized by embedding a high resistance layer.

[0010]

EXAMPLES Examples of the present invention will be described in detail below.

First, the fact that a high resistance layer can be realized by the method of the invention and the relationship between the specific resistance and the growth temperature will be shown prior to the description of the embodiments. FIG. 5 shows current-voltage characteristics of the device having the structure shown in FIG. In FIG. 6, a device was prepared by sequentially growing a high-resistance InAlAs (h: 1 μm) 12 and an n-type InGaAs electrode layer 13 on an n-type InP substrate 11 by using a molecular beam epitaxy method, and then producing a diameter (d: 100 μm). )
Was formed, and Au-Ge-Ni electrodes 14 were formed on the upper and lower sides.

InA by the molecular beam epitaxy method at this time
The growth temperature of 1As was 500 ° C. As can be seen from FIG. 5, high resistance InAlAs is obtained under this growth condition.
The specific resistance at this time is 10 ⁹ to 10 ¹⁰ Ωcm. Figure 7
Indicates the relationship between the specific resistance of InAlAs thus obtained and the growth temperature. As is clear from the figure, 10 ⁹ Ω
To obtain a specific resistance of cm or more, it is necessary to keep the growth temperature at 600 ° C. or lower.

Next, a method of forming an actual buried structure using the manufacturing method of the present invention will be described.

FIG. 1 shows an example of a semiconductor device obtained by this method. As shown in the figure, an n-type InP clad layer 3, an undoped InGaAs active layer 4, a p-type InP clad layer 5, and a p-type InGaAsP electrode layer having a high mesa structure are formed on the upper surface of the n-type InP substrate 2, and the high-level mesa structure is formed. Undoped high-resistance InAlAs 23 is flatly buried as a high-resistance buried layer on both sides of the mesa stripe. The method of manufacturing the high resistance buried layer will be specifically described below.

First, the manufacturing method starts from a semiconductor wafer having a device structure as shown in FIG. 8 of the prior art.
FIG. 2A shows a semiconductor wafer having a laser structure having the same structure as FIG. 8, in which 2 is an n-type InP substrate and 3 is an n-type InP substrate.
-Type InP clad layer, 4 undoped InGaAsP active layer, 5 p-type InP clad layer and 6 p-type InGa
Each AsP electrode layer is illustrated. This structure will be described below as an example.

First, a silicon oxide film or silicon nitride film 21 is formed on the p-type InGaAsP electrode layer 6 by thermal CVD, plasma CVD, or sputtering to a thickness of 0.3 μm. (FIG. 2 (B)).

A resist is transferred onto the above by ordinary photo-exposure, electron-electric exposure or X-ray exposure, and an oxide film or a nitride film is formed by chemical wet etching such as HF or dry etching using CF ₄ gas. 21 is transferred (FIG. 2 (C)).

Thereafter, the semiconductor wafer is etched into a mesa shape by dry etching or chemical wet etching such as HCI system. At this time, side etching is intentionally introduced to form a mask eave 21a of about 0.8 μm. (FIG. 3 (A)).

Thereafter, using the molecular beam epitaxy method, as described above, InAlA at a growth temperature of 600 ° C. or lower is used.
s is grown (FIG. 3 (B)).

In this process, since there is a mask on the mesa, InAlAs on it becomes polycrystalline InAlAs22. In the molecular beam epitaxy method, each raw material (In, In
Since Al, As) fly in a beam shape, the eaves 21a of the mask becomes a shadow at the mesa end to obstruct the beam. Therefore, swelling of InAlAs 23 at the mesa edge can be prevented, and as a result, a flat buried layer can be realized. Finally, the mask is etched in dilute HF or the like, and the polycrystalline InAlAs formed on the mask is removed by lift-off to obtain the undoped InAlAs 23 as the flat high resistance buried layer shown in FIG.

Further, in this method, since the molecular beam epitaxy method is growth in a non-equilibrium state, there is an advantage that the crystal plane of the side wall appearing in the trapezoidal mesa is not affected and the mesa can be oriented in any direction. Further, since the crystal plane of the substrate itself is not affected, the manufacturing process of the present invention can be applied to any substrate plane orientation. In the present invention, since undoped InAlAs is used as the high resistance layer, Fe
There is also an advantage that a stable high resistance layer is formed without being affected by the distribution of impurities such as.

FIG. 4 shows the IV characteristics of the embedded laser thus manufactured. The reverse breakdown voltage is also several volts, which shows that a good buried layer is formed.

In the embodiment of the present invention, InGaAsP / I is used.
The nP-based laser has been described as an element, but the material to be embedded is InGaAsP / InAlAs.
It goes without saying that the present invention can be applied to optical modulators, photodetectors, etc., as examples of elements such as a system and GaAsP / InGaAsP system.

[0024]

The method of manufacturing a high resistance buried layer according to the present invention has an effect that a flat high resistance buried layer can be obtained in any substrate plane orientation and in any stripe direction, and this method can be applied to an actual device. If adapted, an element having excellent high-speed response, high-speed modulation characteristics, and transverse mode stability can be realized.

[Brief description of drawings]

FIG. 1 is a schematic view of a semiconductor device having a flat high resistance layer formed thereon.

FIG. 2 is a process drawing of a manufacturing process of a high resistance buried layer.

FIG. 3 is a process drawing of a manufacturing process of a high resistance buried layer.

FIG. 4 is an IV characteristic diagram of an embedded laser.

FIG. 5 is a current-voltage characteristic diagram of high resistance InAlAs.

FIG. 6 is a structural diagram of an element produced by the molecular beam epitaxy method, which obtained the result of FIG.

FIG. 7 is a relationship diagram between the specific resistance of InAlAs and the growth temperature.

FIG. 8 is a structural diagram of an InGaAsP / InP based semiconductor laser.

FIG. 9 is a structural diagram of a conventional embedded laser.

[Explanation of symbols]

 1 n-type Au-Ge-Ni electrode 2 n-type InP substrate 3 n-type InP clad layer 4 undoped InGaAsP active layer 5 p-type InP clad layer 6 p-type InGaAs layer 7 p-type Au-Zn-Ni electrode 8 Fe-doped InP buried layer Embedded layer 11 n-type InP substrate 12 high resistance InAlAs 13 n-type InGaAs electrode layer 14 Au-Ge-Ni electrode 21 silicon oxide film or silicon nitride film 21a eaves 22 polycrystal InAlAs 23 undoped InAlAs

Claims (1)

[Claims] 1. A step of forming an etching mask of a silicon oxide film or a silicon nitride film on a semiconductor wafer,
A step of shaving a semiconductor wafer into a mesa by chemical wet etching or plasma dry etching or a combination of the two, a step of embedding the semiconductor mesa in a high resistance semiconductor layer, and a silicon oxide film of the semiconductor wafer by chemical wet etching. Alternatively, in a high resistance layer burying method including a step of lifting off a polycrystalline high resistance semiconductor on a silicon nitride film, the high resistance layer burying is performed by forming undoped InAlAs at a growth temperature of 600 ° C. or less by a molecular beam epitaxy method. A method for manufacturing a high resistance buried layer, comprising: