JPH06163677A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture a plurality of SOI substrates having the different thicknesses in the same chip. CONSTITUTION:A thermal oxide film 12 is formed on the surface of a first silicon substrate 11. A first Si epitaxial growing layer 14 is formed in a first opening 13, which is formed in response to a transistor forming region. An oxide film 15 is formed on the entire surface of this chip. Then, a second opening 16 is formed so as to include the oxide film 15. A second Si epitaxial layer 17 is formed in the second hole 16. The surface is covered with an oxide film 18 again. Thereafter, a third opening 19 is formed. A third Si epitaxial layer 20 is formed in the opening 19. After the oxide film is removed, an oxide film for insulation and separation is formed, and a polysilicon layer is formed. After the layer is flattened, a second silicon substrate is bonded to the flattened surface. The first silicon substrate 11 is polished. The first to third Si epitaxial layers are exposed as the transistor regions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention forms elements such as a high speed MOS transistor, an SOI type bipolar transistor, or an SOI type MOS transistor on a one-chip semiconductor substrate.
The present invention relates to a method for manufacturing a semiconductor device in which OI substrates are integrated with high density.

[0002]

2. Description of the Related Art As a means for producing an SOI substrate, a direct wafer bonding method, a recrystallization method such as laser annealing, or SIMOX is known. Among them, as the wafer direct bonding method, there is known a method of manufacturing SOI substrates having different thicknesses as shown in, for example, Japanese Patent Laid-Open No. 1-203739, but in the method shown here, for example, MO with 500 Angstrom thick SOI substrate
In order to form a high-speed device such as an S-transistor, it is difficult to form an ultra-thin film SOI substrate because the polishing step controls the time in this method. Further, since the trench isolation method is used for lateral isolation, the process is complicated.

[0003]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and a plurality of SOI substrates having different thicknesses are provided so that the thickness of the SOI substrate is not determined by the time control of the polishing process or the like. The SOI substrate can be easily formed, and in particular, an ultra-thin SOI substrate can be easily and surely manufactured, and lateral separation between elements can be easily performed to enable high-density integration. An object of the present invention is to provide a method for manufacturing a semiconductor device as described above.

[0004]

In a method of manufacturing a semiconductor device according to a first aspect of the present invention, a thick first insulating film is formed on a single crystal substrate and a first semiconductor element forming region is formed. Then, a first opening reaching the single crystal substrate is formed in the thick first insulating film, and a first single crystal semiconductor layer having a first thickness is epitaxially grown in the first opening to form a first opening.
Forming a semiconductor layer. In addition, a thin second insulating film is formed on the first insulating film and the first single crystal semiconductor layer,
A second opening including the second insulating film is formed in the first insulating film corresponding to the second semiconductor element formation region, and a second opening reaching the single crystal substrate is formed. A second opening is formed in the second opening. A second single crystal semiconductor layer is epitaxially grown to a thickness of 2 to form a second semiconductor layer, and the second semiconductor layer is formed on the first insulating film and the first insulating film.
And a third insulating film is formed in common over the second single crystal semiconductor layer. Then, a filling material whose surface is flattened is formed on the third insulating film to form a flattening layer, and a substrate to be a base is bonded to the flattened surface of the flattening layer, The single crystal substrate is cut and polished until the first insulating film is exposed, and the first exposed by the polishing.
Further, independent semiconductor elements are formed in the second single crystal semiconductor layer and the second single crystal semiconductor layer, respectively.

Further, in the second invention, if the first opening is formed, the first opening including the first opening is formed.
A thin second insulating film is formed on the second insulating film, and the first insulating film including the second insulating film is formed corresponding to the second semiconductor element forming region, and the second insulating film is formed to reach the single crystal substrate. To form an opening. Then, using the second insulating film as a mask, the second insulating film is removed after the first single crystal semiconductor layer having the first film thickness is formed in the second opening, and the second insulating film is removed in the first opening. And a second single crystal semiconductor layer having a second film thickness is formed on the first single crystal semiconductor layer, and the second single crystal semiconductor layer and the third single crystal semiconductor layer are formed on the first insulating film. Of the first single crystal substrate is exposed to the first insulating film after the insulating film and the filling material are flattened and the flattening surface of the flattening layer is joined to the substrate to be the base. Cutting and polishing until

[0006]

In both of the first and second inventions described above, an opening is formed in the first insulating film corresponding to the first and second semiconductor element forming regions, and an attempt is made to form the opening in this opening. A single crystal semiconductor layer having a film thickness required for the semiconductor element is formed, and independent semiconductor elements are formed in the openings. In this case, the film thickness of the SOI substrate for forming each of the semiconductor elements is determined by polishing the single crystal substrate using the first insulating film as a stopper, and it is easy to make it ultra-thin. Is. In addition, the first insulating film having the openings surely separates the semiconductor element regions from each other, so that high-density integration can be easily realized.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 to 4 sequentially show the manufacturing process. First, as shown in FIG. 1A, a thermal oxide film 12 is formed on the main surface of an N-type single crystal silicon substrate 11.
The thermal oxide film 12 has a relatively thick film thickness of 2 μm, for example, and a predetermined transistor is formed surrounded by the thermal oxide film 12 portion. First, corresponding to a first transistor formation region for forming a bipolar transistor, for which a relatively thick semiconductor region is required,
As shown in (B) of FIG.
The opening 13 is opened. This opening 13 is formed in the first thermal oxide film 12
It is formed to a depth that penetrates through and reaches the surface of the silicon substrate 11.

When the first opening 13 is formed in this way, the single crystal silicon exposed on the bottom surface of the opening 13 is formed by a silicon epitaxial growth method such as photo-CVD as shown in FIG. From the surface of the substrate 11 to the first single crystal Si
The epitaxial growth layer 14 is grown. This first S
The film thickness of the i epitaxial growth layer 14 is set to the first film thickness required for the transistor to be formed in this region.

If the first Si epitaxial growth layer 14 controlled to have the first film thickness is formed inside the first opening 13, as shown in FIG. Including the surface of the Si epitaxial growth layer 14 of No. 1, thermal oxide film 12
A relatively thin oxide film 15 having a thickness of, for example, 500 angstrom is formed on the entire surface of. This oxide film 15 is the first S formed in FIG.
i It is formed to protect the surface of the epitaxial growth layer 14 so that silicon is not formed on the epitaxial growth layer 14, and the film thickness is not particularly limited as long as the purpose can be achieved. .

In this way, if the first Si epitaxial growth layer 14 is formed inside the first opening 13 and the oxide film 15 is formed thereon, as shown in FIG. The C-MOS and the transistor element required to withstand the voltage are formed on the first silicon substrate 11 including the oxide film 15 by photoetching such as dry etching corresponding to the substrate region, that is, the second transistor formation region. A second opening 16 reaching the surface is formed.

When the second opening 16 is formed in this way, the second opening 16 is formed in the second opening 16 as shown in FIG.
The epitaxial growth layer 17 of the second single crystal Si is formed again by the silicon epitaxial growth method. This second
The Si epitaxial growth layer 17 of is a second epitaxial layer 17 corresponding to the film thickness required for the transistor formed in the second region.
It is set to the film thickness of.

Then, again including the surface of the second Si epitaxial growth layer 17 and forming an oxide film 18 with a thickness of 500 Å on the entire surface of the oxide film 15 as shown in FIG. , For example, corresponding to a third transistor formation region for forming a high-speed MOS transistor for communication, a third opening including the oxide films 15 and 18 to the thermal oxide film 12 and reaching the surface of the first silicon substrate 11. 19 is opened by photoetching. Inside the third opening 19, a third single crystal Si epitaxial growth layer 20 is formed by epitaxial growth with a thin third film thickness suitable for forming a communication high-speed MOS transistor.

As described above, the first to third openings 1
First to third Si epitaxial growth layers 14, 17 having different film thicknesses corresponding to 3, 16, and 19 respectively.
When and 20 are formed, the oxide films 15 and 18 formed on the surface of each epitaxial growth layer are removed with dilute HF as shown in FIG. 3A, and as shown in FIG. Each exposed Si epitaxial growth layer 14,
Si on the entire surface of the thermal oxide film 12 including the surfaces of 17 and 20
A thermal oxide film 21 is formed. The film thickness of the Si thermal oxide film 21 is
It may be about 1 μm.

On the entire surface of the Si thermal oxide film 21, a polysilicon layer 22 having a film thickness of, for example, 3 μm is formed as shown in FIG. 3C, and the surface of the polysilicon layer 22 is flattened. To polish. Then, the second silicon substrate 23 is directly bonded to the flattened polished surface of the polysilicon layer 22 as shown in FIG. 4D (the first silicon substrate 11 shown so far in this figure is Shown inside out).

After the second silicon substrate 23 is bonded in this manner, the first silicon substrate 11 is polished from its back surface side as shown in FIG. 4, and this polishing exposes the surface of the thermal oxide film 12. Do it until done. That is, the first silicon substrate 11 is polished and removed by using the thermal oxide film 12 as a stopper. In this state, the first to third Si epitaxial growth layers 14, 17 and 20 are exposed on the surface. .

The first to third Si epitaxial growth layers 14, 17 and 20 are formed so as to have different film thicknesses, and thereafter, a gate oxide film forming process and a gate polysilicon film are formed based on a normal transistor manufacturing process. As shown in FIG. 5, MOS transistors and bipolar transistors etc. are respectively formed in the first to third transistor formation regions corresponding to the first to third Si epitaxial growth layers 14, 17 and 20 by the formation step, the ion implantation step, etc. Is formed.

For example, SO having a film thickness of 500 angstrom
When a high-speed device including a MOS transistor having an I substrate is to be formed, if the film thickness control of 500 angstrom is controlled by the polishing time, it is actually difficult to control the ultra-thin film. Further, if an attempt is made to perform insulation isolation between a plurality of integrated elements by using a trench, the trench forming process becomes complicated, and it is very difficult to increase the density.

However, if the SOI substrate is manufactured by the manufacturing method described in the embodiment, each SOI
The film thickness of the substrate can be set to an arbitrary thickness by controlling the epitaxial growth without being controlled by the polishing time. In particular, it becomes easy to form an ultra-thin structure, and a high-speed device can be easily incorporated. Further, in this polishing step, the thermal oxide film 12 comes to function as a stopper, and the thermal oxide film 12 comes to function as an insulating isolation film between each transistor, so that it is particularly necessary to provide a trench isolation structure. Absent. Therefore, not only the process for area separation is simplified, but also various S
It is easy to integrate the OI substrate with high density.

In the above embodiment, anisotropic etching must be performed outside the epitaxial film forming chamber in order to form the first to third openings 13, 16 and 19. Therefore, in the process of this embodiment, three epitaxial growth processes are performed.
I was trying to run it in batches. However, it is also possible to complete the three epitaxial growth layers having different thicknesses by a single Si epitaxial film forming process, and an example of the manufacturing process will be described below.

First, in the same manner as shown in FIGS. 1A and 1B, 2 μm is formed on the surface of the single crystal first silicon substrate 11.
Then, a layer of the thermal oxide film 12 is formed to a thickness of 1, and a first opening 31 corresponding to the first transistor formation region reaching the silicon substrate 11 is formed in the thermal oxide film 12 by photoetching. This area is for example a thin S for forming high speed devices.
It is an OI substrate formation region.

Using the silicon substrate 11 in which the first opening 31 is formed in this manner, as shown in FIG. 6 (A), 500 angstroms is formed on the surface of the thermal oxide film 12 including the inside of the opening 31. A thick oxide film 32 is formed by thermal oxidation.

Next, as shown in FIG. 3B, a thermal oxide film 12 having an oxide film 32 formed on the surface thereof is formed by, for example, a normal MOS.
The second opening 33 is opened by photoetching at a depth up to the surface of the first silicon substrate 11 corresponding to the second transistor formation region for forming a transistor. Then, an oxide film 34 having a thickness of 500 Å is formed again on the surface of the oxide film 32 including the inside of the second opening 33 by thermal oxidation. Then, as shown in (D) of the figure, the thermal oxide film including the oxide films 32 and 34 is provided corresponding to the third transistor formation region in which the thick SOI film is formed.
A third opening 35 that reaches the surface of the first silicon substrate 11 is formed for 12.

When the first to third openings 31, 33 and 35 are formed in the thermal oxide film 12 in this way, the oxide film 34 is used as a mask as shown in FIG. In this way, the first epitaxial growth is performed in the third opening 35 by the silicon epitaxial growth method such as the photo CVD method, and the first single crystal Si epitaxial growth layer 36 is formed.
Is selectively formed. In this case, the film thickness of the epitaxial growth layer 36 is set to the first film thickness of 1.5 μm, for example.

Thus, the first Si epitaxial growth layer is formed.
Once 36 is formed, the surface oxide film 34 is etched to a thickness of 500 angstroms, for example, by photoetching in the same chamber without exposure to the atmosphere.

By this etching, for example, if a clean surface of the first silicon substrate 11 appears, specifically, if the oxide film 34 portion is etched and the bottom portion of the second opening 33 appears, A second epitaxial growth is performed by using the oxide film 32 as a mask, and the second single crystal Si epitaxial growth layer 37 is formed inside the second opening 33 together with the surface of the first Si epitaxial growth layer 36 in the third opening 35.
1 and 372 are deposited. Here, the film thickness of the second Si epitaxial growth layers 371 and 372 is set to be different from the film thickness of the first epitaxial growth layer 36, and is set to be thinner than that of the first Si epitaxial growth layer 36, for example.

Next, as shown in FIG. 3C, the oxide film 32 remaining in the same chamber without being exposed to the atmosphere again.
To etch. This etching is performed to a thickness of 500 angstroms and a clean silicon substrate 11
Is performed until the surface of appears. Then, if a clean silicon surface appears, a third epitaxial growth is further performed, and Si epitaxial growth layers 371, 372 are formed.
The third single crystal Si epitaxial growth layers 381, 382 and 383 are selectively formed inside the first opening 31 together with the surface of the above.

By performing the first to third epitaxial growths as described above, the third opening is formed inside the first opening 31.
The third Si epitaxial growth layer 383 is formed by the epitaxial growth of the second Si epitaxial growth layer 383, and the second Si epitaxial growth layer is formed inside the second opening 33.
372 and the third Si epitaxial growth layer 382, an epitaxial growth film having a thickness of two layers is formed.
In the opening 35, three epitaxial growth films of the first to third Si epitaxial growth layers 36, 371 and 381 are formed by the first to third epitaxial growth, respectively.

That is, an SOI film having a different thickness and a controlled film thickness is formed corresponding to each of the first to third transistor formation regions. Thereafter, as shown in (D) of the same figure, an oxide film 39 for insulation separation from the substrate portion is formed on the entire surface to a thickness of 0.5 μm (5000 angstrom).

After the oxide film 39 is formed in this way, a polysilicon layer 40 having a thickness of 3 μm is formed on the surface of the oxide film 39 as shown in FIG. 8A, and the surface is polished. Flatten. Then, the second silicon substrate 23 is bonded to the flat surface of the flattened polysilicon layer 40 as shown in FIG. 7B, and the first silicon substrate 23 is further bonded as shown in FIG. By polishing the silicon substrate 11 until the thermal oxide film 12 is exposed, three different film thicknesses are formed in the same chip.
Two SOI regions are formed.

[0030]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a plurality of SOI regions having different thicknesses are formed in the same chip, and the SOI regions are formed in accordance with the thicknesses thereof. A semiconductor element having a set function is formed. In such a manufacturing method, each SO
The control of the thickness of the I region is controlled by epitaxial growth and is not controlled by polishing. Therefore, even when a particularly thin SOI film is required such as a high-speed device, this can be easily dealt with. Further, the plurality of element regions to be formed in the same chip are surely insulated and separated by the thermal oxide film having the openings formed corresponding to the respective regions, and are easily and surely integrated. The density can be improved.

[Brief description of drawings]

1A to 1D are S according to an embodiment of the present invention.
FIG. 6 is a cross-sectional configuration diagram for sequentially explaining the manufacturing process of the OI substrate.

2A to 2D are sectional configuration diagrams sequentially illustrating a manufacturing process subsequent to the process of FIG.

3A to 3D are sectional configuration diagrams sequentially explaining a manufacturing process subsequent to the process of FIG.

FIG. 4 is a cross-sectional configuration diagram showing an SOI substrate manufactured by the manufacturing process.

FIG. 5 is a cross-sectional configuration diagram of a semiconductor device manufactured using the SOI substrate.

6A to 6D are cross-sectional configuration diagrams sequentially illustrating a manufacturing process of an SOI substrate according to another embodiment of the present invention.

7A to 7D are sectional configuration diagrams sequentially explaining a manufacturing process subsequent to the process of FIG.

8A to 8C are sectional configuration diagrams sequentially explaining a manufacturing process subsequent to the process of FIG.

[Explanation of symbols]

11 ... First silicon substrate, 12 ... Thermal oxide film, 13, 16, 19,
31, 33, 35 ... Opening, 15, 18, 32, 34 ... Oxide film, 14, 17,
20, 36, 371, 372, 381 to 383 ... Si epitaxial growth layer, 22, 40 ... Polysilicon layer, 23 ... Second silicon substrate.

Claims (2)

[Claims] 1. A first insulating film forming step of forming a thick first insulating film on a single crystal substrate, and the single crystal formed on the thick first insulating film corresponding to a first semiconductor element formation region. First forming a first opening to the substrate
An opening forming step, a first semiconductor layer forming step of epitaxially growing a first single crystal semiconductor layer with a first thickness in the first opening, the first insulating film and the first single crystal A second insulating film forming step of forming a thin second insulating film on the semiconductor layer; and including the second insulating film corresponding to a second semiconductor element forming region in the first insulating film. A second opening forming step of forming a second opening reaching the crystal substrate; and a second semiconductor layer forming step of epitaxially growing a second single crystal semiconductor layer with a second thickness in the second opening. A third insulating film forming step of commonly forming a third insulating film on the first insulating film and on the first and second single crystal semiconductor layers, and a surface on the third insulating film. A flattening layer forming step of forming a flattened filling material, and the flattening of the flattening layer. A substrate bonding step of bonding a substrate to be a base to the patterned surface, and a substrate polishing step of cutting and polishing the single crystal substrate until the first insulating film is exposed are provided. A method of manufacturing a semiconductor device, wherein independent semiconductor elements are formed in the first and second single crystal semiconductor layers. 2. A first insulating film forming step of forming a thick first insulating film on a single crystal substrate, and the single crystal formed on the thick first insulating film corresponding to a first semiconductor element formation region. First forming a first opening to the substrate
Corresponding to the second semiconductor film forming region, the second insulating film forming process of forming a thin second insulating film on the first insulating film including the first opening, A second insulating film including the second insulating film, a second insulating film reaching the single crystal substrate,
A second opening forming step of forming a second opening, and a first semiconductor layer forming a first single crystal semiconductor layer having a first film thickness in the second opening using the second insulating film as a mask. Forming step, and removing the second insulating film to form a second single crystal semiconductor layer having a second thickness in the first opening and on the first single crystal semiconductor layer; And the second single crystal semiconductor layer formed corresponding to each of the first and second openings, and further forming a third insulating film and a filling material on the first insulating film. And a flattening layer forming step of flattening the surface thereof, a substrate joining step of joining a substrate to be a stand to the flattened surface of the flattening layer, and the single crystal substrate to the first insulating layer. A substrate polishing step of cutting and polishing until the film is exposed. And a method of manufacturing a semiconductor device in which the second semiconductor element independent on the single crystal semiconductor layer in the opening, characterized in that it has to be formed.