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JPH06163305A - Chip component - Google Patents

Chip component

Info

Publication number
JPH06163305A
JPH06163305A JP4313847A JP31384792A JPH06163305A JP H06163305 A JPH06163305 A JP H06163305A JP 4313847 A JP4313847 A JP 4313847A JP 31384792 A JP31384792 A JP 31384792A JP H06163305 A JPH06163305 A JP H06163305A
Authority
JP
Japan
Prior art keywords
chip component
solder
shape
electrodes
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4313847A
Other languages
Japanese (ja)
Inventor
Kazuo Yoneyama
和雄 米山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP4313847A priority Critical patent/JPH06163305A/en
Publication of JPH06163305A publication Critical patent/JPH06163305A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Landscapes

  • Details Of Resistors (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To provide a chip component including electrodes each having a side feature consisting of a thin upper part and a lower part protruding sideward, which are divided in the middle by a horizontal plane so as to prevent excess molten solder from adhering to the electrodes. CONSTITUTION:A chip component A is composed of a main body 1 in the shape of a parallelepiped, and electrodes 2 attached to opposite sides of the body. The electrodes 2 each have a side feature 3 consisting of a thin upper part 3a and a lower part 3b protruding sideward, which are divided in the middle by a horizontal plane 4. According to this structure, molten solder adheres only to the lower parts of the electrodes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、基板上にハンダ付けさ
れるチップ部品に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip component soldered on a substrate.

【0002】[0002]

【従来の技術】チップ部品をハンダ付けする方法として
リフロー炉を用いた方法があり、このハンダ付け工程が
図5に示されている。図5において、基板5上にはラン
ド部6が設けられ(図5(a))、このランド部6上に
クリーム状のハンダ7を印刷する(図5(b))。この
ハンダ7を印刷したランド部6にチップ部品Aを載置し
(図5(c))、この状態でリフロー炉に入れる。リフ
ロー炉で加熱すると、ハンダ7が溶融してハンダ7がチ
ップ部品Aの電極部2と基板5のランド部6とに溶着さ
れる(図5(d))。
2. Description of the Related Art As a method for soldering chip parts, there is a method using a reflow furnace, and this soldering process is shown in FIG. In FIG. 5, a land portion 6 is provided on the substrate 5 (FIG. 5A), and creamy solder 7 is printed on the land portion 6 (FIG. 5B). The chip part A is placed on the land portion 6 on which the solder 7 is printed (FIG. 5C), and put in the reflow furnace in this state. When heated in the reflow furnace, the solder 7 is melted and the solder 7 is welded to the electrode portion 2 of the chip component A and the land portion 6 of the substrate 5 (FIG. 5D).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、ランド
部(銅泊)6の表面張力よりチップ部品Aの電極部2の
表面張力が大きく、又、ハンダ7の漏れ性がランド部6
よりチップ部品Aの電極部2の方が良いため、図6に示
すように、ハンダ7が電極部2側に片寄って付着する、
いわゆるテンブラが発生する。特に、電極部2の側面3
の面積が大きい大型のチップ部品Aではその傾向が顕著
に現れる。
However, the surface tension of the electrode part 2 of the chip part A is larger than the surface tension of the land part (copper board) 6, and the leakability of the solder 7 is due to the land part 6.
Since the electrode part 2 of the chip component A is better, the solder 7 sticks to the electrode part 2 side while being offset, as shown in FIG.
A so-called tempura occurs. In particular, the side surface 3 of the electrode portion 2
This tendency is remarkable in the large chip component A having a large area.

【0004】そこで、本発明はハンダが電極部に必要以
上に付着することによるハンダ付け不良が生じないチッ
プ部品を提供することを課題とする。
Therefore, it is an object of the present invention to provide a chip component in which soldering failure due to excessive adhesion of solder to electrode portions does not occur.

【0005】[0005]

【課題を解決するための手段】上記課題を達成するため
の本発明に係るチップ部品は、部品本体の両端に電極部
を設け、この各電極部と基板のランド部とにハンダを溶
着して前記基板に取付けるチップ部品において、前記各
電極部の側面の略中央に急激に形状変化する形状変化面
をそれぞれ設け、この形状変化面で前記側面を上方面と
下方面とに画成したものである。
In order to achieve the above object, a chip component according to the present invention is provided with electrode portions at both ends of a component body, and solder is welded to each electrode portion and a land portion of a substrate. In the chip component to be mounted on the substrate, a shape-changing surface that rapidly changes shape is provided substantially at the center of the side surface of each electrode portion, and the side surface is defined by the shape-changing surface as an upper surface and a lower surface. is there.

【0006】[0006]

【作用】溶融したハンダは表面張力やハンダの漏れ性の
比較によって電極部の側面に付着し易いが、側面の下方
面と上方面の境に形状変化面があるためハンダは上方面
にまで延びることがなく下方面にのみ付着する。
The molten solder tends to adhere to the side surface of the electrode portion by comparing the surface tension and the leakability of the solder, but since the shape change surface exists at the boundary between the lower surface and the upper surface of the side surface, the solder extends to the upper surface. It adheres only to the lower surface without any damage.

【0007】[0007]

【実施例】以下、本発明の実施例を図面を用いて説明す
る。図1(a)及び図1(b)は本発明の第1実施例を
示す。図1(a)にはチップ部品Aの斜視図が示されて
いる。図1(a)において、チップ部品Aは長方体状の
部品本体1とこの部品本体1の両側にそれぞれ固定され
た各電極部2とから成る。各電極部2の側面3の略中央
には急激に形状変化する形状変化面4が設けられてお
り、この形状変化面4により電極部2の側面3は上方面
3aと下方面3bに画成されている。この実施例では、
形状変化面4は上方面3aに対して下方面3bが外方に
突出され、上方面3aと下方面3bとの間に形成された
水平面として構成されている。
Embodiments of the present invention will be described below with reference to the drawings. 1A and 1B show a first embodiment of the present invention. FIG. 1A shows a perspective view of the chip part A. In FIG. 1A, a chip component A is composed of a rectangular parallelepiped component body 1 and electrode portions 2 fixed to both sides of the component body 1. A shape-changing surface 4 that rapidly changes in shape is provided substantially at the center of the side surface 3 of each electrode portion 2. The side surface 3 of the electrode portion 2 is defined by the shape-changing surface 4 into an upper surface 3a and a lower surface 3b. Has been done. In this example,
The shape-changing surface 4 has a lower surface 3b protruding outward with respect to the upper surface 3a, and is configured as a horizontal surface formed between the upper surface 3a and the lower surface 3b.

【0008】上記構成のチップ部品Aをリフロー炉を用
いた方法によりハンダ付けすると、溶融したランド部6
のハンダ7が表面張力等により電極部2の側面に付着す
るが、形状変化面4によって表面張力等によるハンダ7
の上昇が妨げられるため、図1(b)に示すように、ハ
ンダ7は下方面3bにのみ付着する。従って、ハンダ7
は基板5のランド部6とチップ部品Aの電極部2とに均
等に溶着される。
When the chip component A having the above structure is soldered by a method using a reflow furnace, the land portion 6 melted
The solder 7 adheres to the side surface of the electrode portion 2 due to surface tension or the like, but the shape change surface 4 causes the solder 7 due to surface tension or the like.
Of the solder 7, the solder 7 adheres only to the lower surface 3b, as shown in FIG. 1 (b). Therefore, solder 7
Is evenly welded to the land portion 6 of the substrate 5 and the electrode portion 2 of the chip component A.

【0009】また、左右の電極部2のハンダ付け量の相
違やハンダ付けの残留応力によって図1(b)の矢印方
向の応力が発生する。しかし、ハンダ7が側面3の下方
面3bにしか付着しないので、図6に示す従来例と比較
して発生する応力が小さく、且つ、ハンダ7の付着量が
左右で均一となるためクラックの発生を極力防止でき
る。
Further, due to the difference in the amount of soldering of the left and right electrode portions 2 and the residual stress of soldering, stress in the direction of the arrow in FIG. 1B is generated. However, since the solder 7 adheres only to the lower surface 3b of the side surface 3, the stress generated is smaller than that in the conventional example shown in FIG. 6, and the amount of the solder 7 adhered is uniform on the left and right, so that cracks occur. Can be prevented as much as possible.

【0010】図2(a)及び図2(b)は本発明の第2
実施例を、図3(a)及び図3(b)は本発明の第3実
施例を、図4(a)及び図4(b)は本発明の第4実施
例をそれぞれ示す。図2(a)、図3(a)及び図4
(a)には各実施例のチップ部品Aの斜視図が、図2
(b)、図3(b)及び図4(b)には各実施例のハン
ダ付け状態の断面図がそれぞれ示されている。
2 (a) and 2 (b) show a second embodiment of the present invention.
3 (a) and 3 (b) show a third embodiment of the present invention, and FIGS. 4 (a) and 4 (b) show a fourth embodiment of the present invention. 2 (a), 3 (a) and 4
FIG. 2A is a perspective view of the chip part A of each embodiment.
3 (b), 3 (b) and 4 (b) are cross-sectional views of the soldered state of each example.

【0011】第2実施例から第4実施例のチップ部品A
が前記第1実施例のものと比較して異なるのは、形状変
化面4の構成のみで他の構成は前記第1実施例と同一で
あるため、図面に同一符号を付してその説明を省略す
る。即ち、第2実施例の形状変化面4は、下方面3bに
対して上方面3aが外方に突出され、下方面3bと上方
面3aとの間に形成された円弧面として構成されてい
る。第3実施例の形状変化面4は、同一平面上の上方面
3aと下方面3bの境の凹面として構成されている。第
4実施例の形状変化面4は、同一平面上の上方面3aと
下方面3bの境の凸面として構成されている。
Chip parts A of the second to fourth embodiments
Is different from that of the first embodiment only in the configuration of the shape-changing surface 4, and the other configurations are the same as those of the first embodiment. Omit it. That is, the shape change surface 4 of the second embodiment is configured as an arc surface formed between the lower surface 3b and the upper surface 3a, with the upper surface 3a protruding outward with respect to the lower surface 3b. . The shape-changing surface 4 of the third embodiment is configured as a concave surface at the boundary between the upper surface 3a and the lower surface 3b on the same plane. The shape-changing surface 4 of the fourth embodiment is formed as a convex surface on the boundary between the upper surface 3a and the lower surface 3b on the same plane.

【0012】第2実施例から第4実施例においても前記
第1実施例と略同様の作用・効果を有する。尚、形状変
化面4の形状は第1実施例から第4実施例に限定される
ものではなく、側面3の略中央を急激に変化させるもの
であれば良い。
The second to fourth embodiments have substantially the same actions and effects as those of the first embodiment. The shape of the shape-changing surface 4 is not limited to the first to fourth embodiments, and may be any shape as long as it changes the substantial center of the side surface 3 rapidly.

【0013】[0013]

【発明の効果】以上述べたように請求項1から請求項5
の発明によれば、電極部の側面に上方面と下方面とを画
成する形状変化面を設けたので、溶融したハンダが下方
面にしか溶着しないため、ハンダが電極部に必要量以上
付着することがなく、テンプラ等のハンダ付け不良を生
じないという効果を奏する。特に、電極部の面積が大き
い大型のチップ部品について効果がある。又、電極部の
下方面にしかハンダが付着しないためにハンダ付けの残
留応力が小さくクラックの発生を極力防止できるという
効果も奏する。
As described above, the first to fifth aspects of the invention are described.
According to the invention, since the shape changing surface that defines the upper surface and the lower surface is provided on the side surface of the electrode portion, the molten solder adheres only to the lower surface. This is effective in preventing soldering defects such as tempura. In particular, it is effective for a large chip component having a large electrode area. In addition, since the solder adheres only to the lower surface of the electrode portion, the residual stress of soldering is small and the occurrence of cracks can be prevented as much as possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)はチップ部品の斜視図、(b)はチップ
部品のハンダ付け状態の断面図(第1実施例)。
1A is a perspective view of a chip component, and FIG. 1B is a cross-sectional view of a soldered state of the chip component (first embodiment).

【図2】(a)はチップ部品の斜視図、(b)はチップ
部品のハンダ付け状態の断面図(第2実施例)。
2A is a perspective view of a chip component, and FIG. 2B is a cross-sectional view of a soldered state of the chip component (second embodiment).

【図3】(a)はチップ部品の斜視図、(b)はチップ
部品のハンダ付け状態の断面図(第3実施例)。
3A is a perspective view of a chip component, and FIG. 3B is a cross-sectional view of a soldered state of the chip component (third embodiment).

【図4】(a)はチップ部品の斜視図、(b)はチップ
部品のハンダ付け状態の断面図(第4実施例)。
4A is a perspective view of a chip component, and FIG. 4B is a cross-sectional view of a soldered state of the chip component (fourth embodiment).

【図5】(a),(b),(c),(d)はそれぞれリ
フロー炉を用いたハンダ付けの各工程を示す図。
5 (a), (b), (c) and (d) are diagrams showing respective steps of soldering using a reflow furnace.

【図6】チップ部品のハンダ付け状態の断面図(従来
例)。
FIG. 6 is a cross-sectional view of a soldered state of a chip component (conventional example).

【符号の説明】[Explanation of symbols]

A…チップ部品 1…部品本体 2…電極部 3…側面 3a…上方面 3b…下方面 4…形状変化面 5…基板 6…ランド部 7…ハンダ A ... Chip component 1 ... Component body 2 ... Electrode part 3 ... Side surface 3a ... Upper surface 3b ... Lower surface 4 ... Shape change surface 5 ... Board 6 ... Land part 7 ... Solder

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 部品本体の両端に電極部を設け、この各
電極部と基板のランド部とにハンダを溶着して前記基板
に取付けるチップ部品において、 前記各電極部の側面の略中央に急激に形状変化する形状
変化面をそれぞれ設け、この形状変化面で前記側面を上
方面と下方面とに画成したことを特徴とするチップ部
品。
1. A chip component in which electrode parts are provided at both ends of a component body, and solder is welded to each electrode part and a land part of the substrate to be mounted on the substrate. 1. A chip component, characterized in that each of the shape changing surfaces is provided with a shape changing surface, and the side surfaces are defined by the shape changing surface as an upper surface and a lower surface.
【請求項2】 前記形状変化面は、前記上方面と前記下
方面との間に形成された水平面であることを特徴とする
請求項1に記載するチップ部品。
2. The chip component according to claim 1, wherein the shape changing surface is a horizontal plane formed between the upper surface and the lower surface.
【請求項3】 前記形状変化部は、前記上方面と前記下
方面との間に形成された円弧面であることを特徴とする
請求項1に記載するチップ部品。
3. The chip component according to claim 1, wherein the shape changing portion is an arc surface formed between the upper surface and the lower surface.
【請求項4】 前記形状変化面は、凹面であることを特
徴とする請求項1に記載するチップ部品。
4. The chip component according to claim 1, wherein the shape changing surface is a concave surface.
【請求項5】 前記形状変化面は、凸面であることを特
徴とする請求項1に記載するチップ部品。
5. The chip component according to claim 1, wherein the shape change surface is a convex surface.
JP4313847A 1992-11-25 1992-11-25 Chip component Pending JPH06163305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4313847A JPH06163305A (en) 1992-11-25 1992-11-25 Chip component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4313847A JPH06163305A (en) 1992-11-25 1992-11-25 Chip component

Publications (1)

Publication Number Publication Date
JPH06163305A true JPH06163305A (en) 1994-06-10

Family

ID=18046230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4313847A Pending JPH06163305A (en) 1992-11-25 1992-11-25 Chip component

Country Status (1)

Country Link
JP (1) JPH06163305A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016015471A (en) * 2014-06-13 2016-01-28 株式会社村田製作所 Multilayer capacitor mounting structure
JP2018107411A (en) * 2016-12-28 2018-07-05 株式会社村田製作所 Method for manufacturing laminated electronic component and laminated electronic component
JP2018107412A (en) * 2016-12-28 2018-07-05 株式会社村田製作所 Method for manufacturing laminated electronic component and laminated electronic component
JP2018139248A (en) * 2017-02-24 2018-09-06 パナソニックIpマネジメント株式会社 Mounting structure of chip resistor
JP2021180291A (en) * 2020-05-15 2021-11-18 Koa株式会社 Resistor
WO2024262239A1 (en) * 2023-06-21 2024-12-26 ローム株式会社 Electronic device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016015471A (en) * 2014-06-13 2016-01-28 株式会社村田製作所 Multilayer capacitor mounting structure
JP2018107411A (en) * 2016-12-28 2018-07-05 株式会社村田製作所 Method for manufacturing laminated electronic component and laminated electronic component
JP2018107412A (en) * 2016-12-28 2018-07-05 株式会社村田製作所 Method for manufacturing laminated electronic component and laminated electronic component
CN108281274A (en) * 2016-12-28 2018-07-13 株式会社村田制作所 The manufacturing method and laminated electronic component of laminated electronic component
CN108305760A (en) * 2016-12-28 2018-07-20 株式会社村田制作所 The manufacturing method and laminated electronic component of laminated electronic component
US10886060B2 (en) 2016-12-28 2021-01-05 Murata Manufacturing Co., Ltd. Multilayer electronic component manufacturing method and multilayer electronic component
US10886061B2 (en) 2016-12-28 2021-01-05 Murata Manufacturing Co., Ltd. Multilayer electronic component manufacturing method and multilayer electronic component
JP2018139248A (en) * 2017-02-24 2018-09-06 パナソニックIpマネジメント株式会社 Mounting structure of chip resistor
JP2021180291A (en) * 2020-05-15 2021-11-18 Koa株式会社 Resistor
WO2024262239A1 (en) * 2023-06-21 2024-12-26 ローム株式会社 Electronic device

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