JPH06151720A - Constructing method monolithic integrated circuit - Google Patents

Abstract

PURPOSE:To simultaneously align a plurality of lift-off films accurately, and to eliminate contamination on adhesive interface by a method wherein a hole- provided elastic sheet is adhered to a thin film before it is lifted off, then the thin film is lifted off, and the thin film and the second substrate are adhered. CONSTITUTION:A thin film 2, to be lifted off, is formed on a GaAs substrate 1. Then, a protective film 5 is added to the element which is not lifted off. Wax 6 is added to the surface of the thin film 2 which is desired to be lifted off. After the wax has been solidified, a reticulate carrier sheet 7 is adhered. In the stage where the carrier sheet 7 and the GaAs substrate 1 have been adhered, the film is lifted off by fluoric acid. In the stage where an etching operation is finished, the GaAs substrate 1 and the carrier sheet 7 are mechanically separated. Then, the material is cleaned, and after fluoric acid has been washed away, the thin film 2 is aligned in such a manner that the thin film 2 is placed on the prescribed position of the silicon substrate 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is a monolithic assembly of a plurality of electronic integrated circuits or optical integrated circuits having different functions and characteristics based on the epitaxial lift-off technology, and thus the functionality and economy which cannot be obtained by individual circuits. The present invention relates to a method for constructing a monolithic integrated circuit that can exhibit characteristics such as performance.

[0002]

2. Description of the Related Art Different types of semiconductor devices such as low cost, large-scale integrated circuit feasibility, large-area, lightweight, high-strength, photothermal conductivity, and other silicon devices, and ultra-high-speed circuits and optical devices By combining and integrating compound semiconductor elements such as GaAs and InP in a monolithic manner, it is possible to realize a circuit with high performance, high functionality or low cost that has never been achieved. 2. Description of the Related Art Heretofore, an epitaxial growth technique for growing a compound semiconductor such as gallium arsenide on a silicon substrate and a device (on-silicon device) on the silicon substrate have been vigorously studied for the purpose of realizing such an element. . As a result, it has been possible to obtain characteristics comparable to those on a bulk substrate in a single device or small-scale circuit, but the nature of the existence of antiphase grains and the presence of dislocations due to lattice mismatch, etc. However, it is difficult to realize highly integrated circuits and high-performance devices. Also, there are many problems to be solved such as device yield and long-term reliability.

Under such circumstances, recently, hybridization by a film bonding technique based on the epitaxial lift-off method has been proposed and has been attracting attention as a promising technique. This technology aims to realize a monolithic device by constructing a device close to an individual ideal on a perfect crystal obtained at present and bonding them together.

In this technique, the etching rate of AlAs with respect to hydrofluoric acid is 10 compared with other materials such as GaAs.
By taking advantage of the fact that it is extremely large, about 7 to the power of 7, A (thickness: about 10 nm to 50 nm)
The lAs layer is inserted and a layer for realizing the device is grown thereon. After the device manufacturing process (or in the middle of the process or before the process), the layer above AlAs is lifted off by wet etching with hydrofluoric acid. In order to avoid damage to the lifted-off thin film due to bubbles generated during lift-off, select etching conditions that do not cause vigorous reaction, and apply apiezon wax to the surface of the part that will become the release film before lift-off. , The technology that uses the stress caused by it to escape the bubbles that came out has been developed and has become fully usable. The thickness of the thin film to be lifted off depends on the structure of the device and the presence / absence of a buffer layer.
It is about 0 nm to several μm, and the size can be about 1 to 2 cm.

Although there is a method of using an adhesive for sticking the thin film on the substrate, the adhesion by Van der Waals force is the most suitable method from the viewpoint of ensuring the contamination and flatness of the substrate.

[0006] Conventionally, there is a demand for a power device or the like to thin a chip on which a device is mounted by etching, and therefore, a method of scraping a substrate by mechanical polishing is adopted. However, this technique has a limitation in thinning the layer, and is limited to the order of 100 μm. There is also a method of melting and removing the entire substrate by etching, but it is not a practical method because the process is complicated. On the other hand, even though it is a method based on a simple technique called lift-off, there is almost no damage to the device by lift-off, there is no problem of defects such as a thin film formed by epitaxial growth, and the film thickness is further increased. Since it is extremely small, it has the feature that it can be integrated into a circuit after it is attached.

[0007]

However, this technique having such a feature also has a serious problem that the compatibility with the integration process is poor. It is difficult to precisely position the lifted-off thin film at a predetermined position when it is attached to the substrate, it is difficult to handle an element with a precise structure, and it is virtually impossible to handle many thin films. Therefore, even if a small number of thin films are handled, there is a problem that productivity is extremely low.

As a method for solving these problems, the wax is peeled off from the lifted-off thin film, the wax is arranged side by side on a transparent sheet and then adhered to the substrate (bonding).
Although a method of doing so has been proposed, in this case, it is difficult to perform precise alignment on the sheet, and there is the problem that dimensional accuracy cannot be obtained when aligning multiple thin films at the same time. There is a serious problem that the adhesion reliability is deteriorated due to the contamination.

The present invention is a monolithic integration technique based on a bonding technique using an epitaxial lift-off method, which makes it possible to accurately align a plurality of lift-off films at the same time and to bond them without contamination of the bonding interface. An object of the present invention is to provide a method for constructing a monolithic integrated circuit having good compatibility with an integrated circuit manufacturing process.

[0010]

In order to achieve the above object, the present invention according to claim 1 has a multilayer semiconductor film including an upper layer for realizing a device and a lower layer which is a lift-off layer. In a method of constructing a monolithic integrated circuit in which a lower layer of a semiconductor substrate is removed by etching, an upper layer is separated as a thin film, and the thin film is attached to a second semiconductor substrate, an elastic carrier sheet having holes before lift-off of the thin film is formed. The thin film is adhered to the thin film to be used as a carrier sheet, and then lifted off to place the thin film on the second substrate in a state of being stuck to the carrier sheet, and the thin film and the second substrate are stuck to each other. It is characterized by

The invention according to claim 2 is characterized in that a stress-applying film is added onto the thin film, and the carrier sheet is stuck thereon.

According to a third aspect of the present invention, the carrier sheet is placed directly on the thin film, and a stress-imparting film is added later also for adhering the thin film and the carrier sheet.

According to a fourth aspect of the present invention, an alignment mark is provided on the carrier sheet or on the surface of the stress applying film,
Alternatively, it is arranged on the thin film.

[0014]

In the method of constructing a monolithic integrated circuit according to the present invention, the bonding step is arranged so as to be the basis of the layout on silicon when manufacturing a plurality of elements to be lifted off, and the periphery is arranged so as to maintain the position information. Is attached to a clamped knitted carrier sheet, lifted off in that state, attached to the silicon substrate as it is, and then the wax is removed.

In the method for constructing a monolithic integrated circuit according to the present invention, a knitted sheet is used as a carrier sheet so that the reaction solution and bubbles can freely move between the reaction point and the outside without being obstructed by the carrier at the time of lift-off. There is.
Also, the lift-off is performed only after the wax on the surface on which the device to be peeled off is placed and the stitched carrier sheet are adhered, that is, the location information so that each thin film is not peeled independently. At the same time, it is peeled from the growth substrate. Further, since the lift-off surface is adhered to the substrate as it is and pressure is applied to the substrate, the lift-off surface does not go through an extra step after the peeling, and therefore, in a clean state, the lift-off surface is aligned and pressed at a place to be adhered and adhered.

That is, according to the present invention, in the monolithic integration technique based on the bonding technique using the epitaxial lift-off method, a plurality of lift-off films can be accurately aligned at the same time, and the bonding interface is bonded without contamination. Therefore, it is possible to realize a method having good compatibility with the integration process.

[0017]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a process diagram of an embodiment of the present invention for an embodiment in which a GaAs circuit and a Si circuit are monolithically integrated, and FIG. 2 is a schematic sectional view of a device corresponding to each process of FIG. . In the figure, 1 is a compound semiconductor substrate, 2 is a thin film to be lifted off, 3 is a layer that constitutes a device, 4 is a layer that is etched during liftoff (liftoff layer), and 5 is a protective film layer that is not lifted off. , 6 is a stress imparting film made of wax, 7 is a stitch-shaped carrier sheet, and 8 is a silicon substrate.

FIGS. 3 to 9 are assembly explanatory views for explaining the overall state when the assembly procedure of the embodiment of the present invention shown in FIG. 1 is carried out. FIG. 3 shows a stitched carrier sheet C.
9A is a schematic cross-sectional view of the same, FIG. 9B is a schematic top view of the same, FIG. 9C is an enlarged top view of a part of the carrier sheet, 9 is a frame for supporting the carrier sheet, and 10 is a position. Alignment marks, 13 are small portions of the carrier sheet, and 14 are holes in the carrier sheet. Figure 4 shows a thin film 2 to be lifted off
FIG. 6 is a schematic top view showing a pattern image of a compound semiconductor substrate 1 containing a, FIG. 5 shows a state in which the lifted-off thin film 2 is attached to a carrier sheet 7, (A) is a schematic cross-sectional view thereof, and (B) is shown. Is a schematic top view thereof. FIG. 6 shows an overall image of the silicon substrate 8, (A) is a schematic sectional view thereof, (B) is a schematic top view thereof, 11 is a silicon LSI circuit portion, 12 is a position where a thin film is bonded. Show. Further, FIG. 7A is a schematic cross-sectional view showing alignment and FIG. 7B is a schematic cross-sectional view showing a state of adhesion, and FIG. 8 is a schematic top view of a wafer after completion of a monolithic integrated circuit after completion of adhesion. FIG. 9 is a schematic sectional view showing a state of the substrate before lift-off.

The knitted carrier sheet 7 has a structure in which a large number of small holes 14 are formed in a polymer film such as polyimide. Therefore, the carrier sheet 7 has elasticity and can absorb the strain applied to the carrier sheet 7 even if the strain is applied. The size of the hole 14 and the film thickness of the film as the carrier sheet are not particularly specified, but the size needs to be a fraction or less of the size of the thin film 2 because it is necessary to support the thin film 2 to be peeled off. The film thickness may be any thickness as long as it can be mechanically handled in a film state. In the case of a polymer film, a size of several μm may be possible.

The stress-applying film 6 is provided to warp and curve the thin film 2 at the time of lift-off to allow bubbles to escape and to perform lift-off completely. In this embodiment, Apiezon black wax is used. Any material may be used as long as it has the same function.

The process procedure will be described below with reference to FIGS. 1 and 2. First, as the first step (a), the thin film 2 to be lifted off is formed on the GaAs substrate 1. The basic process may be the same as the conventional GaAs device manufacturing process for lift-off. That is, the AlAs layer (lift male layer) 4 for lift-off is thinly formed on the substrate 1, and the element layer 3 for realizing the device is grown on the AlAs layer 4 and the element is realized there.
In the illustrated case, the element layer 3 is composed of three layers including the thin film 2 to be lifted off, but is not particularly limited to this.

At this time, in this embodiment, in addition to the element which is lifted off at one time on the substrate, another element is simultaneously manufactured, and only the necessary element is lifted off according to the transfer pattern. Next, with respect to the element which is not lifted off, a film is peeled off during the lift off step, and a step of adding a protective film 5 to the surface is performed to avoid damage such as surface damage due to etching (steps (b) to (d)). At this time, an important point is to protect the etching layer (lift-off layer) 4 of the element in which the solution does not lift-off during etching. Of course, when all the elements on the GaAs substrate 1 are lifted off at the same time, this step can be omitted. The protective film 5 may be of any type as long as it does not damage the lower layer as a necessary condition, can be removed later, and is resistant to hydrofluoric acid. The material may be a molecular film, an insulating film or a metal.

Next, wax 6 is added on the thin film 2 to be lifted off. This step is performed by a method such as a wax coating method using a metal mask (step (e)).

When the wax 6 is applied and dried, a tensile stress is applied to the wax.

After the wax is solidified, the stitch-shaped carrier sheet 7 is adhered (step (f)). Several methods are possible for this bonding method. The simplest method is to secure the adhesiveness to other materials by applying a peelable adhesive to the surface of the carrier sheet or applying a surface treatment. In this case, it can be peeled off when a force of a certain level or more is applied, but the adhesiveness can be easily maintained in the solution or against a slight bending stress. The other method is a method in which the adhesive is dropped only on the wax portion while the carrier sheet in the form of a stitch is laid, and the carrier sheet and the thin film 2 are firmly bonded. In this case, selective adhesion can be automatically and efficiently performed by using an adhesive such as an ultraviolet curable resin. In addition, in order to facilitate mechanical handling, it is necessary to fix the carrier sheet to a strong frame as shown in FIG. Further, in order to facilitate the alignment at the time of transfer, it is effective to add alignment marks for alignment on the carrier sheet as shown in FIGS. The mark may be processed on the carrier sheet itself, or may be added by a method such as printing or vapor deposition on the carrier sheet.

When the carrier sheet 7 and the GaAs substrate 1 are bonded, the film is lifted off with hydrofluoric acid.
The etching solution permeates from between the stitches of the sheet, and a reaction occurs in the lift-off layer 4 made of exposed AlAs immediately below the thin film 2 to be lifted off, and gradually starts to dissolve immediately below the periphery of the thin film. Since the thin film is subjected to the stress of wax and the thin film itself has elasticity, the surrounding AlAs melts and the thin film 2 warps and the periphery is lifted. Furthermore, as the etching solution permeates further into the back, bubbles generated during the reaction move out from the periphery,
It is released to the outside through the stitch. As a result, the lift-off layer 4 immediately below the thin film is etched without damaging the thin film. The portion covered with the protective film during this etching remains as it is on the substrate.

When the etching is completed, the GaAs substrate 1 and the carrier sheet 7 are mechanically separated (step (g)). At this time, the carrier sheet 7 has a relatively weak adhesive force because the carrier sheet 7 is in a peelable interface state even if it is bonded to the substrate 1, and can be easily peeled off. Further, since the thin film 2 is completely separated from the substrate, it is in a state of being attached to the carrier sheet. FIG. 5 schematically shows this state.

Next, after cleaning the carrier sheet on which the thin film 2 is mounted and washing out the hydrofluoric acid, the carrier sheet is placed on the silicon substrate 8 and aligned so that the thin film 2 comes to a predetermined position on the silicon substrate 8 ( Step (h)). The position of the thin film 2 and the bonding position 12 on the silicon substrate are actually aligned, or the alignment mark 10 is added on the silicon substrate 8 and the carrier sheet 7, the wax 6 and the thin film 2 to perform the alignment.

When the alignment is completed, the thin film 2 and the silicon substrate 8 are brought into contact with each other, and the thin film 2 to be connected and the wax 6 are pressed together (step (i)). At that time, if a small amount of water droplets or a liquid such as ammonium sulfide is dropped on the contact interface, the adhesion becomes strong. At this time, if the alignment accuracy is not required, a plurality of thin films may be collectively pressed as shown in the figure.

The desired monolithic integrated circuit can be obtained by removing the carrier sheet 7 and the wax 6 after the adhesion, and further performing a wiring step and a step of adding a passivation film. The wax can be removed with an organic solvent, and the carrier sheet can be removed by mechanical peeling unless fixed with a strong adhesive. In the case of batch processing, it is easy to remove the wax at the same time as it is removed.

When highly accurate alignment is required in the above-mentioned method, the thin films are aligned one by one or in units of a few, and after applying pressure, they are bonded together.
The procedure of peeling the carrier sheet 7 from the wax portion of the adhered thin film 2 and positioning / adhering another circuit may be repeated. In this case, since it takes time to complete the bonding, the bonding after each alignment process should be a temporary bonding, and should be a simple pressure welding that is sufficient to remove the carrier sheet, and should be permanent after the entire layout is completed. A pressure procedure for adhesion may be taken.

It goes without saying that various modifications can be made without changing the basic idea of the present invention. In this embodiment, the carrier sheet is symmetrical about the chip in the area over the entire wafer, but the transfer unit may be limited to a partial area. In the process of FIG. 2, the protective film process is performed with a different material, but the wax itself can be used as the protective film. In this case
As shown in FIG. 5, a step of removing a part of the wax by etching may be performed so that only the AlAs (lift-off layer) directly below the thin film 2 desired to be lifted off is exposed on the surface.

It is also possible to cover the carrier sheet before applying the wax and apply the wax only to the portion of the thin film to be lifted off. FIG. 10 is a schematic sectional view showing such an embodiment. Those shown by the same symbols in the drawings are the same as those in the first embodiment. In this case, the wax at the position corresponding to the holes 14 of the carrier sheet 7 flows down into the holes 14, and the wax layer 6 has concave portions having a pattern corresponding to the distribution of the holes 14. Since the wax is also present in the holes 14 as described above, it also serves as an adhesive between the thin film and the carrier sheet.

[0035]

As described above, according to the present invention, in the monolithic integration technique based on the bonding technique using the epitaxial lift-off method, a plurality of lift-off films can be accurately aligned at the same time and there is no contamination at the bonding interface. The present invention provides a method capable of being adhered in a state and having good compatibility with an integrated circuit process. With this technology, it is possible to realize an excellent monolithic integrated circuit that combines the features of compound semiconductor-based elements such as ultra-high-speed elements or optical elements, which were not good at silicon technology, and silicon elements such as large-scale integrated low power, with high mass productivity. It can be realized at low cost. Moreover, this technology is applicable not only to silicon and compound semiconductors, but also to compounds and compounds or piezoelectric / magnetic /
Monolithic integration of dissimilar materials such as superconductors and compounds can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a process procedure of an embodiment of the device of the present invention.

FIG. 2 is a schematic cross-sectional view of a device corresponding to each step of FIG. 1, where (a) is a GaAs device manufacturing step and (b) is a step.
Is a separation processing step, (c) is a resist coating step, (d) is a non-lift-off portion protecting step, (e) is a stress imparting film forming step, (f) is a carrier sheet bonding step, (g) is a lift-off step, ( h) represents an alignment process and (i) an adhesion process.

FIG. 3 is a mounting view of a carrier sheet, (A) is a schematic sectional view, (B) is a schematic top view, and (C) is a partially enlarged top view.

FIG. 4 is a schematic top view showing a pattern image of a substrate.

5A and 5B are diagrams showing a state in which a lift-off thin film is attached to a carrier sheet, FIG. 5A is a schematic sectional view, and FIG. 5B is a schematic top view.

FIG. 6 is a diagram showing an overall image of a silicon substrate,
(A) is a schematic sectional view and (B) is a schematic top view.

7A is a schematic cross-sectional view showing a state of alignment, and FIG. 7B is a schematic cross-sectional view showing a state of adhesion.

FIG. 8 is a schematic top view of a completed wafer.

FIG. 9 is a schematic cross-sectional view showing a state of a substrate before lift-off.

FIG. 10 is a schematic cross-sectional view illustrating another embodiment of the present invention.

[Explanation of symbols]

 1 semiconductor substrate 2 thin film to be lifted off 3 layer constituting device 4 etching layer (lift-off layer) 5 protective film layer 6 wax 7 stitched carrier sheet 8 silicon substrate 9 sheet supporting frame 10 alignment mark 11 silicon LSI circuit part 12 Adhesion position of thin film 13 Small part of carrier sheet 14 Hole

Claims (4)

[Claims] 1. A lower layer of a first semiconductor substrate having a multilayer semiconductor film including an upper layer realizing a device and a lower layer which is a lift-off layer is removed by etching, the upper layer is separated as a thin film, and the thin film is separated into In a method of constructing a monolithic integrated circuit attached to a second semiconductor substrate, an elastic carrier sheet having holes before the thin film lift-off is adhered to the thin film so as to be used as the thin film carrier sheet, and then lifted off to remove the thin film. A method for constructing a monolithic integrated circuit, which is arranged on the second substrate while being attached to the carrier sheet, and the thin film and the second substrate are attached. 2. The method for constructing a monolithic integrated circuit according to claim 1, wherein a stress applying film is applied onto the thin film, and the carrier sheet is attached thereon. 3. The structure of a monolithic integrated circuit according to claim 1, wherein the carrier sheet is placed directly on the thin film, and a stress-imparting film is added later also for adhering the thin film and the carrier sheet. Law. 4. The method for constructing a monolithic integrated circuit according to claim 1, wherein an alignment mark is arranged on the carrier sheet, the surface of the stress applying film, or the thin film.